Add mcbist L2 function

Change-Id: I8b98c188d6a642eb49d89deffcbd697d9cf7afdc
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23895
Tested-by: Jenkins Server
Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com>
Reviewed-by: Andre A. Marin <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24667
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 100 insertions, 11 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C
index ed2b00e89..6646b0daf 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C
@@ -56,16 +56,27 @@ extern "C"
             return fapi2::FAPI2_RC_SUCCESS;
         }
 
-        // Dump the registers of these MC
-        for (auto c : i_target.getChildren<TARGET_TYPE_MCS>())
+        // While we're doing the scominit in here, lets do it for all ports before we dump the MCS regs.
+        for (auto p : i_target.getChildren<TARGET_TYPE_MCA>())
         {
-            FAPI_TRY( mss::dump_regs<TARGET_TYPE_MCS>(c) );
+            mss::mc<TARGET_TYPE_MCS> l_mc;
+
+            // Don't do this yet - leverage the sim inits for the moment
+#if 0
+            // All the scominit for this MCA
+            l_mc.scominit(p);
+#endif
+            // Setup the MC port/dimm address translation registers
+            FAPI_TRY( l_mc.setup_xlate_map(p) );
         }
 
         for (auto p : l_mca)
         {
+
             // Set the IML Complete bit MBSSQ(3) (SCOM Addr: 0x02011417) to indicate that IML has completed
-            // Can't find MBSSQ or the iml_complete bit - asked Steve BRS.
+            // Can't find MBSSQ or the iml_complete bit - asked Steve. Gary VH created this bit as a scratch
+            // 'you are hre bit' and it was removed for Nimbus. Gary VH asked for it to be put back in. Not
+            // sure if that happened yet. BRS (2/16).
 
             // Reset addr_mux_sel to “0” to allow the MCA to take control of the DDR interface over from CCS.
             // (Note: this step must remain in this procedure to ensure that data path is placed into mainline
@@ -92,6 +103,83 @@ extern "C"
             FAPI_TRY( mss::enable_read_ecc(p) );
 
             // At this point the DDR interface must be monitored for memory errors. Memory related FIRs should be unmasked.
+
+            // Cram a fast write, followed by a read in here for giggles
+            {
+                mss::mcbist::program<TARGET_TYPE_MCBIST> l_program;
+                uint64_t l_start = 0;
+                uint64_t l_end = 0;
+                uint64_t l_pattern = 0;
+
+                // Write
+                {
+                    // Uses address register set 0
+                    mss::mcbist::subtest_t<TARGET_TYPE_MCBIST> l_fw_subtest =
+                        mss::mcbist::write_subtest<TARGET_TYPE_MCBIST>();
+                    l_fw_subtest.enable_port(mss::index(p));
+
+                    // HACK: We only need to worry about the DIMM in slot 0 right now
+                    l_fw_subtest.enable_dimm(0);
+                    l_program.iv_subtests.push_back(l_fw_subtest);
+                }
+
+                // Read
+                {
+                    // Uses address register set 0
+                    mss::mcbist::subtest_t<TARGET_TYPE_MCBIST> l_fr_subtest =
+                        mss::mcbist::read_subtest<TARGET_TYPE_MCBIST>();
+                    l_fr_subtest.enable_port(mss::index(p));
+
+                    // HACK: We only need to worry about the DIMM in slot 0 right now
+                    l_fr_subtest.enable_dimm(0);
+                    l_program.iv_subtests.push_back(l_fr_subtest);
+                }
+
+
+                FAPI_TRY( mss::mcbist_start_addr(p, l_start) );
+                FAPI_TRY( mss::mcbist_end_addr(p, l_end) );
+
+                // TK: calculate proper polling based on address range
+
+                // Setup a nice pattern for writing
+                FAPI_TRY( mss::mcbist_write_data(i_target, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD0Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD1Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD2Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD3Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD4Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD5Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD6Q, l_pattern) );
+                FAPI_TRY( mss::putScom(i_target, MCBIST_MCBFD7Q, l_pattern) );
+
+                // Sanity check - can't do much if end is before start.
+                // This is either a programming error or a mistake in attribute settings. So we'll just assert.
+                if (l_end < l_start)
+                {
+                    FAPI_ERR("mcbist end address is less than mcbist starting address. s: 0x%x e: 0x%x", l_start, l_end);
+                    fapi2::Assert(false);
+                }
+
+                // By default we're in maint address mode so we do a start + len and the 'BIST increments for us.
+                // By default, the write subtest uses the 0'th address start/end registers.
+                mss::mcbist::config_address_range0(i_target, l_start, l_end - l_start);
+
+                // Just one port for now. Per Shelton we need to set this in maint adress mode
+                // even tho we specify the port/dimm in the subtest.
+                fapi2::buffer<uint8_t> l_port;
+                l_port.setBit(mss::pos(p));
+                l_program.select_ports(l_port >> 4);
+
+                // Kick it off, wait for a result
+                FAPI_TRY( mss::mcbist::execute(i_target, l_program) );
+
+                // Just because the program executed and no MCBIST failure was reported, it is poosible that
+                // there were address errors. An address error in the only address in a range causes the
+                // 'BIST to skip that command. Since it's the only address, the subtest (or program) can
+                // complete succedssfully even though nothing actually happend.
+                // For now, just dump the registers and vgrep for errors. BRS
+                FAPI_TRY( mss::dump_regs<TARGET_TYPE_MCBIST>(i_target) );
+            }
         }
 
     fapi_try_exit:
diff --git a/src/import/hwpf/fapi2/include/ffdc.H b/src/import/hwpf/fapi2/include/ffdc.H
index 684fb6617..b13d91bd6 100644
--- a/src/import/hwpf/fapi2/include/ffdc.H
+++ b/src/import/hwpf/fapi2/include/ffdc.H
@@ -70,7 +70,8 @@ class FirstFailureData
         //  problem.
         ///
         FirstFailureData(void):
-            iv_info( nullptr ), iv_platDataPtr(nullptr)
+            iv_info( nullptr )
+//            iv_info( nullptr ), iv_platDataPtr(nullptr)
         {}
 
         ///
@@ -178,7 +179,7 @@ class FirstFailureData
         {
             iv_info = nullptr;
         }
-
+#if 0
         ///
         /// @brief Returns the platform data pointer value to the caller.
         ///
@@ -196,14 +197,14 @@ class FirstFailureData
             static_cast<R*>(this)->operator=(FAPI2_RC_PLAT_ERR_SEE_DATA);
             iv_platDataPtr = i_ptr;
         };
-
+#endif
     private:
 
         // Pointer to the error info
         std::shared_ptr<ErrorInfo> iv_info;
 
         // free format data, to be used by the platform
-        void*    iv_platDataPtr;
+//        void*    iv_platDataPtr;
 };
 
 }
diff --git a/src/import/hwpf/fapi2/tools/parseErrorInfo.mk b/src/import/hwpf/fapi2/tools/parseErrorInfo.mk
index 474043c75..4cb2faedd 100644
--- a/src/import/hwpf/fapi2/tools/parseErrorInfo.mk
+++ b/src/import/hwpf/fapi2/tools/parseErrorInfo.mk
@@ -7,7 +7,7 @@
 #
 # EKB Project
 #
-# COPYRIGHT 2015
+# COPYRIGHT 2015,2016
 # [+] International Business Machines Corp.
 #
 #
@@ -32,7 +32,7 @@ TARGETS += collect_reg_ffdc.H
 TARGETS += set_sbe_error.H
 
 define parseErrorInfo_RUN
-		$(C1) $$< --output-dir=$$($(GENERATED)_PATH) $$(filter-out $$<,$$^)
+		$(C1) $$< --empty-ffdc-classes --output-dir=$$($(GENERATED)_PATH) $$(filter-out $$<,$$^)
 endef
 
 $(call BUILD_GENERATED)
diff --git a/src/import/hwpf/fapi2/tools/parseErrorInfo.pl b/src/import/hwpf/fapi2/tools/parseErrorInfo.pl
index 61a626673..c591e3eae 100755
--- a/src/import/hwpf/fapi2/tools/parseErrorInfo.pl
+++ b/src/import/hwpf/fapi2/tools/parseErrorInfo.pl
@@ -1225,7 +1225,7 @@ foreach my $argnum (0 .. $#ARGV)
             print ECFILE "      }\n";
             print ECFILE "      else\n";
             print ECFILE "      {\n";
-            print ECFILE "        fapi2::createPlatLog(iv_rc, " .
+            print ECFILE "     //   fapi2::createPlatLog(iv_rc, " .
                                   "(i_sev == fapi2::FAPI2_ERRL_SEV_UNDEFINED)".
                                   " ? iv_sev : i_sev);\n";
             print ECFILE "      }\n\n";