Updating HW414700 to also apply to Cumulus DD10

Change-Id: I565fe99adc16d8b2c56d6ca8365c77ae5bad0aef
CQ: HW414700
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50287
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50370
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 198 insertions, 31 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_unmask_errors.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_unmask_errors.C
index d5865fe2a..64337ec3e 100755
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_unmask_errors.C
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_unmask_errors.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -299,6 +299,15 @@ fapi2::ReturnCode mss_unmask_inband_errors(const fapi2::Target<fapi2::TARGET_TYP
     fapi2::buffer<uint64_t> l_mbs_fir_action1;
 
     uint8_t l_dd2_fir_bit_defn_changes = 0;
+    uint8_t l_hw414700 = 0;
+
+    fapi2::Target<fapi2::TARGET_TYPE_DMI> l_attached_dmi_target = i_target.getParent<fapi2::TARGET_TYPE_DMI>();
+    fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_attached_proc_target =
+        l_attached_dmi_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+
+    // Get attribute for HW414700 workaround
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, l_attached_proc_target, l_hw414700),
+             "Error getting ATTR_CHIP_EC_FEATURE_HW414700");
 
     // Get attribute that tells us if mbspa 0 cmd complete attention is fixed for dd2
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_CENTAUR_EC_FEATURE_DD2_FIR_BIT_DEFN_CHANGES, i_target,
@@ -374,9 +383,20 @@ fapi2::ReturnCode mss_unmask_inband_errors(const fapi2::Target<fapi2::TARGET_TYP
     l_mbs_fir_mask_or.setBit<9>();
 
     // 10    cache_srw_ue           recoverable         mask (until unmask_fetch_errors)
-    l_mbs_fir_action0.clearBit<10>();
-    l_mbs_fir_action1.setBit<10>();
-    l_mbs_fir_mask_or.setBit<10>();
+    //       hw414700               channel checkstop   mask (until unmask_fetch_errors)
+
+    if (l_hw414700)
+    {
+        l_mbs_fir_action0.clearBit<10>();
+        l_mbs_fir_action1.clearBit<10>();
+        l_mbs_fir_mask_or.setBit<10>();
+    }
+    else
+    {
+        l_mbs_fir_action0.clearBit<10>();
+        l_mbs_fir_action1.setBit<10>();
+        l_mbs_fir_mask_or.setBit<10>();
+    }
 
     // 11    cache_srw_sue          recoverable         mask (forever)
     l_mbs_fir_action0.clearBit<11>();
@@ -389,9 +409,19 @@ fapi2::ReturnCode mss_unmask_inband_errors(const fapi2::Target<fapi2::TARGET_TYP
     l_mbs_fir_mask_or.setBit<12>();
 
     // 13    cache_co_ue            recoverable         mask (until unmask_fetch_errors)
-    l_mbs_fir_action0.clearBit<13>();
-    l_mbs_fir_action1.setBit<13>();
-    l_mbs_fir_mask_or.setBit<13>();
+    //       hw414700               channel checkstop   mask (until unmask_fetch_errors)
+    if (l_hw414700)
+    {
+        l_mbs_fir_action0.clearBit<13>();
+        l_mbs_fir_action1.clearBit<13>();
+        l_mbs_fir_mask_or.setBit<13>();
+    }
+    else
+    {
+        l_mbs_fir_action0.clearBit<13>();
+        l_mbs_fir_action1.setBit<13>();
+        l_mbs_fir_mask_or.setBit<13>();
+    }
 
     // 14    cache_co_sue           recoverable         mask (forever)
     l_mbs_fir_action0.clearBit<14>();
@@ -459,9 +489,9 @@ fapi2::ReturnCode mss_unmask_inband_errors(const fapi2::Target<fapi2::TARGET_TYP
     l_mbs_fir_action1.setBit<26>();
     l_mbs_fir_mask_or.setBit<26>();
 
-    // 27    srb_buffer_ue           recoverable         mask (until unmask_fetch_errors)
+    // 27    srb_buffer_ue           channel checkstop   mask (until unmask_fetch_errors)
     l_mbs_fir_action0.clearBit<27>();
-    l_mbs_fir_action1.setBit<27>();
+    l_mbs_fir_action1.clearBit<27>();
     l_mbs_fir_mask_or.setBit<27>();
 
     // 28    srb_buffer_sue          recoverable         mask (forever)
@@ -863,10 +893,20 @@ fapi2::ReturnCode mss_unmask_draminit_errors(const fapi2::Target<fapi2::TARGET_T
     uint8_t l_dd2_fir_bit_defn_changes = 0;
     fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP> l_targetCentaur;
     uint8_t l_dimm_type = 0;
+    uint8_t l_hw414700 = 0;
 
     // Get Centaur target for the given MBA
     l_targetCentaur = i_target.getParent<fapi2::TARGET_TYPE_MEMBUF_CHIP>();
 
+    // Get DMI target for given Centaur, and processor for given DMI
+    fapi2::Target<fapi2::TARGET_TYPE_DMI> l_attached_dmi_target = l_targetCentaur.getParent<fapi2::TARGET_TYPE_DMI>();
+    fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_attached_proc_target =
+        l_attached_dmi_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+
+    // Get attribute for HW414700 workaround
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, l_attached_proc_target, l_hw414700),
+             "Error getting ATTR_CHIP_EC_FEATURE_HW414700");
+
     // Get attribute that tells us if mbspa 0 cmd complete attention is fixed for dd2
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_CENTAUR_EC_FEATURE_DD2_FIR_BIT_DEFN_CHANGES, l_targetCentaur,
                            l_dd2_fir_bit_defn_changes), "Error getting ATTR_CEN_CENTAUR_EC_FEATURE_DD2_FIR_BIT_DEFN_CHANGES");
@@ -954,9 +994,20 @@ fapi2::ReturnCode mss_unmask_draminit_errors(const fapi2::Target<fapi2::TARGET_T
     l_mbacalfir_mask_or.setBit<8>();
 
     // 9    mba_wrd ue                  recoverable         mask (until mainline traffic)
-    l_mbacalfir_action0.clearBit<9>();
-    l_mbacalfir_action1.setBit<9>();
-    l_mbacalfir_mask_or.setBit<9>();
+    //      hw414700                    channel checkstop   mask (until mainline traffic)
+
+    if (l_hw414700)
+    {
+        l_mbacalfir_action0.clearBit<9>();
+        l_mbacalfir_action1.clearBit<9>();
+        l_mbacalfir_mask_or.setBit<9>();
+    }
+    else
+    {
+        l_mbacalfir_action0.clearBit<9>();
+        l_mbacalfir_action1.setBit<9>();
+        l_mbacalfir_mask_or.setBit<9>();
+    }
 
     // 10   mba_wrd ce                  recoverable         mask (until mainline traffic)
     l_mbacalfir_action0.clearBit<10>();
@@ -964,9 +1015,19 @@ fapi2::ReturnCode mss_unmask_draminit_errors(const fapi2::Target<fapi2::TARGET_T
     l_mbacalfir_mask_or.setBit<10>();
 
     // 11   mba_maint ue                recoverable         mask (until after draminit_training_adv)
-    l_mbacalfir_action0.clearBit<11>();
-    l_mbacalfir_action1.setBit<11>();
-    l_mbacalfir_mask_or.setBit<11>();
+    //      hw414700                    channel checkstop   mask (until after draminit_training_adv)
+    if (l_hw414700)
+    {
+        l_mbacalfir_action0.clearBit<11>();
+        l_mbacalfir_action1.clearBit<11>();
+        l_mbacalfir_mask_or.setBit<11>();
+    }
+    else
+    {
+        l_mbacalfir_action0.clearBit<11>();
+        l_mbacalfir_action1.setBit<11>();
+        l_mbacalfir_mask_or.setBit<11>();
+    }
 
     // 12   mba_maint ce                recoverable         mask (until after draminit_training_adv)
     l_mbacalfir_action0.clearBit<12>();
@@ -984,9 +1045,19 @@ fapi2::ReturnCode mss_unmask_draminit_errors(const fapi2::Target<fapi2::TARGET_T
     l_mbacalfir_mask_or.setBit<14>();
 
     // 15   wrq_data_ue                 recoverable         mask (until mainline traffic)
-    l_mbacalfir_action0.clearBit<15>();
-    l_mbacalfir_action1.setBit<15>();
-    l_mbacalfir_mask_or.setBit<15>();
+    //      hw414700                    channel checkstop   mask (until mainline traffic)
+    if (l_hw414700)
+    {
+        l_mbacalfir_action0.clearBit<15>();
+        l_mbacalfir_action1.clearBit<15>();
+        l_mbacalfir_mask_or.setBit<15>();
+    }
+    else
+    {
+        l_mbacalfir_action0.clearBit<15>();
+        l_mbacalfir_action1.setBit<15>();
+        l_mbacalfir_mask_or.setBit<15>();
+    }
 
     // 16   wrq_data_sue                recoverable         mask (forever)
     l_mbacalfir_action0.clearBit<16>();
@@ -1421,6 +1492,15 @@ fapi2::ReturnCode mss_unmask_maint_errors(const fapi2::Target<fapi2::TARGET_TYPE
     fapi2::buffer<uint64_t> l_mbeccfir_action1;
 
     uint8_t l_mbspa_0_fixed_for_dd2 = 0;
+    uint8_t l_hw414700 = 0;
+
+    fapi2::Target<fapi2::TARGET_TYPE_DMI> l_attached_dmi_target = i_target.getParent<fapi2::TARGET_TYPE_DMI>();
+    fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_attached_proc_target =
+        l_attached_dmi_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+
+    // Get attribute for HW414700 workaround
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, l_attached_proc_target, l_hw414700),
+             "Error getting ATTR_CHIP_EC_FEATURE_HW414700");
 
     // Get attribute that tells us if mbspa 0 cmd complete attention is fixed for dd2
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_CENTAUR_EC_FEATURE_HW217608_MBSPA_0_CMD_COMPLETE_ATTN_FIXED, i_target,
@@ -1678,9 +1758,20 @@ fapi2::ReturnCode mss_unmask_maint_errors(const fapi2::Target<fapi2::TARGET_TYPE
         l_mbeccfir_mask_or.setBit<18>();
 
         // 19   Memory UE                   recoverable         mask (until mainline traffic)
-        l_mbeccfir_action0.clearBit<19>();
-        l_mbeccfir_action1.setBit<19>();
-        l_mbeccfir_mask_or.setBit<19>();
+        //      hw414700                    channel checkstop   mask (until mainline traffic)
+
+        if (l_hw414700)
+        {
+            l_mbeccfir_action0.clearBit<19>();
+            l_mbeccfir_action1.clearBit<19>();
+            l_mbeccfir_mask_or.setBit<19>();
+        }
+        else
+        {
+            l_mbeccfir_action0.clearBit<19>();
+            l_mbeccfir_action1.setBit<19>();
+            l_mbeccfir_mask_or.setBit<19>();
+        }
 
         // 20:27    Maint MPE Rank 0:7      recoverable         mask (forever)
         // NOTE: FW wants to mask these and rely instead on detecting the
@@ -1743,9 +1834,19 @@ fapi2::ReturnCode mss_unmask_maint_errors(const fapi2::Target<fapi2::TARGET_TYPE
         l_mbeccfir_mask_or.setBit<43>();
 
         // 44   Memory RCD parity error     recoverable         mask (forever)
-        l_mbeccfir_action0.clearBit<44>();
-        l_mbeccfir_action1.setBit<44>();
-        l_mbeccfir_mask_or.setBit<44>();
+        //      hw414700                    channel checkstop   mask (until mainline traffic)
+        if (l_hw414700)
+        {
+            l_mbeccfir_action0.clearBit<44>();
+            l_mbeccfir_action1.clearBit<44>();
+            l_mbeccfir_mask_or.setBit<44>();
+        }
+        else
+        {
+            l_mbeccfir_action0.clearBit<44>();
+            l_mbeccfir_action1.setBit<44>();
+            l_mbeccfir_mask_or.setBit<44>();
+        }
 
         // 45   Maint RCD parity error.     recoverable         mask (forever)
         l_mbeccfir_action0.clearBit<45>();
@@ -1848,6 +1949,11 @@ fapi2::ReturnCode mss_unmask_fetch_errors(const fapi2::Target<fapi2::TARGET_TYPE
     fapi2::buffer<uint64_t> l_mba_dsm0;
     fapi2::buffer<uint64_t> l_mba_farb0;
 
+    uint8_t l_hw414700 = 0;
+
+    fapi2::Target<fapi2::TARGET_TYPE_DMI> l_attached_dmi_target = i_target.getParent<fapi2::TARGET_TYPE_DMI>();
+    fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_attached_proc_target =
+        l_attached_dmi_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
 
     //*************************
     //*************************
@@ -2091,6 +2197,10 @@ fapi2::ReturnCode mss_unmask_fetch_errors(const fapi2::Target<fapi2::TARGET_TYPE
     // here is unmask errors requiring mainline traffic which would be
     // considered valid after the mss_thermal_init procedure.
 
+    // Get attribute for HW414700 workaround
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, l_attached_proc_target, l_hw414700),
+             "Error getting ATTR_CHIP_EC_FEATURE_HW414700");
+
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_CENTAUR_EC_FEATURE_DD2_FIR_BIT_DEFN_CHANGES, i_target,
                            l_dd2_fir_bit_defn_changes),
              "Error getting ATTR_CEN_CENTAUR_EC_FEATURE_DD2_FIR_BIT_DEFN_CHANGES");
@@ -2291,6 +2401,12 @@ fapi2::ReturnCode mss_unmask_fetch_errors(const fapi2::Target<fapi2::TARGET_TYPE
         // 43   Prefetch Memory UE          recoverable         unmask
         l_mbeccfir_mask_and.clearBit<43>();
 
+        // 44   Memory RCD Parity Error     channel checkstop   unmask (hw414700)
+        if (l_hw414700)
+        {
+            l_mbeccfir_mask_and.clearBit<44>();
+        }
+
         // Write mask AND
         FAPI_TRY(fapi2::putScom(i_target,
                                 l_mbeccfir_mask_and_address[l_mbaPosition],
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_cen_framelock.C b/src/import/chips/p9/procedures/hwp/perv/p9_cen_framelock.C
index a63796d92..b30332d6f 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_cen_framelock.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_cen_framelock.C
@@ -1533,6 +1533,14 @@ fapi2::ReturnCode p9_cen_framelock_exit_procedure(const fapi2::Target<fapi2::TAR
     fapi2::buffer<uint64_t> l_mci_data;
     fapi2::buffer<uint64_t> l_writeMask;
 
+    // check EC feature to determine if special handling for UE/SUE errors
+    // should be engaged (HW414700)
+    uint8_t l_hw414700;
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700,
+                           i_pu_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(),
+                           l_hw414700),
+             "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_HW414700");
+
     // (Action0, Action1, Mask)
     // ------------------------
     // (0,0,0) = Checkstop Error
@@ -1562,7 +1570,7 @@ fapi2::ReturnCode p9_cen_framelock_exit_procedure(const fapi2::Target<fapi2::TAR
     l_action0_data.setBit<DATAPATH_FIR_CENTAUR_SPECIAL_ATTN_FAIL_BIT>();
 
     // Recoverable errors
-    l_action1_data.setBit<DATAPATH_FIR_SCOM_WR_PERR_BIT>()                     // Bit 0
+    l_action1_data.setBit<DATAPATH_FIR_SCOM_WR_PERR_BIT>()       // Bit 0
     .setBit<DATAPATH_FIR_MCICFGQ_PARITY_ERROR_BIT>()             // Bit 1
     .setBit<DATAPATH_FIR_DSRC_NO_FORWARD_PROGRESS_BIT>()         // Bit 2
     .setBit<DATAPATH_FIR_DSRC_PERF_DEGRAD_BIT>()                 // Bit 3
@@ -1595,6 +1603,27 @@ fapi2::ReturnCode p9_cen_framelock_exit_procedure(const fapi2::Target<fapi2::TAR
     .setBit<DATAPATH_FIR_DBGWAT_PERR_BIT>()                      // Bit 60
     .setBit<DATAPATH_FIR_DSFF_TIMEOUT_BIT>();                    // Bit 61
 
+    // Checkstop errors
+    if (l_hw414700)
+    {
+        l_action0_data.clearBit<DATAPATH_FIR_CENTAUR_CHECKSTOP_FAIL_BIT>();  // Bit 16
+
+        l_action1_data.clearBit<DATAPATH_FIR_DSRC_NO_FORWARD_PROGRESS_BIT>() // Bit 2
+        .clearBit<DATAPATH_FIR_DMI_CHANNEL_FAIL_BIT>()                       // Bit 4
+        .clearBit<DATAPATH_FIR_CHANNEL_INIT_TIMEOUT_BIT>()                   // Bit 5
+        .clearBit<DATAPATH_FIR_CHANNEL_INTERLOCK_FAIL_BIT>()                 // Bit 6
+        .clearBit<DATAPATH_FIR_CRC_ERR_BIT>()                                // Bit 8
+        .clearBit<DATAPATH_FIR_REPLAY_BUFFER_UE_BIT>()                       // Bit 12
+        .clearBit<DATAPATH_FIR_REPLAY_BUFFER_OVERRUN_BIT>()                  // Bit 14
+        .clearBit<DATAPATH_FIR_DATA_FLOW_PARITY_ERROR_BIT>()                 // Bit 15
+        .clearBit<DATAPATH_FIR_CENTAUR_CHECKSTOP_FAIL_BIT>()                 // Bit 16
+        .clearBit<DATAPATH_FIR_DSFF_TAG_OVERRUN_BIT>()                       // Bit 32
+        .clearBit<DATAPATH_FIR_SFF_MCA_ASYNC_CMD_ERROR_PERR_BIT>()           // Bit 40
+        .clearBit<DATAPATH_FIR_SFF_MCA_ASYNC_CMD_ERROR_SEQERR_BIT>()         // Bit 41
+        .clearBit<DATAPATH_FIR_DSFF_SEQ_ERROR_BIT>()                         // Bit 42
+        .clearBit<DATAPATH_FIR_DSFF_TIMEOUT_BIT>();                          // Bit 61
+    }
+
     // ----------------------------------
     // Set P9 DATAPATH FIR Mask
     // ----------------------------------
@@ -1607,15 +1636,30 @@ fapi2::ReturnCode p9_cen_framelock_exit_procedure(const fapi2::Target<fapi2::TAR
     // (1,1,0) = UNIT_CS
     l_dataPathFirMask = ~(l_action0_data | l_action1_data);
 
-    //TODO: To be removed, see SW413273
-    l_dataPathFirMask.setBit<DATAPATH_FIR_SFF_MCA_ASYNC_CMD_ERROR_SEQERR_BIT>();
-
     // Any bit that is clear in both ACTION0 & ACTION1 reg, but
     // we want to have a checkstop, we need to explicitly clear
     // the mask bit.
     // (0,0,0) = Checkstop Error
+    if (l_hw414700)
+    {
+        l_dataPathFirMask.clearBit<DATAPATH_FIR_DSRC_NO_FORWARD_PROGRESS_BIT>() // Bit 2
+        .clearBit<DATAPATH_FIR_DMI_CHANNEL_FAIL_BIT>()                          // Bit 4
+        .clearBit<DATAPATH_FIR_CHANNEL_INIT_TIMEOUT_BIT>()                      // Bit 5
+        .clearBit<DATAPATH_FIR_CHANNEL_INTERLOCK_FAIL_BIT>()                    // Bit 6
+        .clearBit<DATAPATH_FIR_CRC_ERR_BIT>()                                   // Bit 8
+        .clearBit<DATAPATH_FIR_REPLAY_BUFFER_UE_BIT>()                          // Bit 12
+        .clearBit<DATAPATH_FIR_REPLAY_BUFFER_OVERRUN_BIT>()                     // Bit 14
+        .clearBit<DATAPATH_FIR_DATA_FLOW_PARITY_ERROR_BIT>()                    // Bit 15
+        .clearBit<DATAPATH_FIR_CENTAUR_CHECKSTOP_FAIL_BIT>()                    // Bit 16
+        .clearBit<DATAPATH_FIR_DSFF_TAG_OVERRUN_BIT>()                          // Bit 32
+        .clearBit<DATAPATH_FIR_SFF_MCA_ASYNC_CMD_ERROR_PERR_BIT>()              // Bit 40
+        .clearBit<DATAPATH_FIR_SFF_MCA_ASYNC_CMD_ERROR_SEQERR_BIT>()            // Bit 41
+        .clearBit<DATAPATH_FIR_DSFF_SEQ_ERROR_BIT>()                            // Bit 42
+        .clearBit<DATAPATH_FIR_DSFF_TIMEOUT_BIT>();                             // Bit 61
+    }
 
-    // None for now
+    //TODO: To be removed, see SW413273
+    l_dataPathFirMask.setBit<DATAPATH_FIR_SFF_MCA_ASYNC_CMD_ERROR_SEQERR_BIT>();
 
     // Write to ACTION0 reg
     l_writeMask = l_action0_data;
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 1119b5f7d..17edf3e59 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -5123,9 +5123,9 @@
 
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW414700</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
     <description>
-      Nimbus DD2.0 only -- set all UE FIRs to checkstop
+      Nimbus DD2.0, Cumulus DD1.0 -- set all UE FIRs to checkstop
     </description>
     <chipEcFeature>
       <chip>
@@ -5135,6 +5135,13 @@
           <test>EQUAL</test>
         </ec>
       </chip>
+      <chip>
+        <name>ENUM_ATTR_NAME_CUMULUS</name>
+        <ec>
+          <value>0x10</value>
+          <test>EQUAL</test>
+        </ec>
+      </chip>
     </chipEcFeature>
   </attribute>