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authorJoe McGill <jmcgill@us.ibm.com>2017-01-12 16:13:13 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-01-24 11:23:41 -0500
commit3bcd6c564bb8d67ec19cbd761bc7f72213c577ab (patch)
tree053ddf8136cff2f16bf3445d9e149b2f44cbabfd /src/import
parent7b5c5bc1e97e98329b026840134458a1ea0c852d (diff)
downloadtalos-hostboot-3bcd6c564bb8d67ec19cbd761bc7f72213c577ab.tar.gz
talos-hostboot-3bcd6c564bb8d67ec19cbd761bc7f72213c577ab.zip
FBC updates for HW383616, HW384245
Change-Id: I3b65925b1cadb6f4db5d64868f997ebf4ff7e625 CQ: HW383616 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34810 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34816 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C24
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C82
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H6
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml36
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml2
5 files changed, 129 insertions, 21 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
index c5f89c9cd..1b4e0135f 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
@@ -47,6 +47,7 @@ constexpr uint64_t literal_0b0001100 = 0b0001100;
constexpr uint64_t literal_2 = 2;
constexpr uint64_t literal_0x1F = 0x1F;
constexpr uint64_t literal_0x3E = 0x3E;
+constexpr uint64_t literal_0x40 = 0x40;
constexpr uint64_t literal_0x3C = 0x3C;
constexpr uint64_t literal_0b0101 = 0b0101;
@@ -80,6 +81,8 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
(literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
uint64_t l_def_X1_ENABLED = (l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_1] != literal_0);
uint64_t l_def_X2_ENABLED = (l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_2] != literal_0);
+ fapi2::ATTR_CHIP_EC_FEATURE_HW384245_Type l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245;
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW384245, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245));
fapi2::buffer<uint64_t> l_scom_buffer;
{
FAPI_TRY(fapi2::getScom( TGT0, 0x501340aull, l_scom_buffer ));
@@ -299,11 +302,16 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
l_scom_buffer.insert<24, 5, 59, uint64_t>(literal_0x1F );
}
- if (l_def_X0_ENABLED)
+ if ((l_def_X0_ENABLED && (l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245 != literal_0)))
{
l_scom_buffer.insert<1, 7, 57, uint64_t>(literal_0x3E );
l_scom_buffer.insert<33, 7, 57, uint64_t>(literal_0x3E );
}
+ else if (l_def_X0_ENABLED)
+ {
+ l_scom_buffer.insert<1, 7, 57, uint64_t>(literal_0x40 );
+ l_scom_buffer.insert<33, 7, 57, uint64_t>(literal_0x40 );
+ }
if (l_def_X0_ENABLED)
{
@@ -327,11 +335,16 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
l_scom_buffer.insert<24, 5, 59, uint64_t>(literal_0x1F );
}
- if (l_def_X1_ENABLED)
+ if ((l_def_X1_ENABLED && (l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245 != literal_0)))
{
l_scom_buffer.insert<1, 7, 57, uint64_t>(literal_0x3E );
l_scom_buffer.insert<33, 7, 57, uint64_t>(literal_0x3E );
}
+ else if (l_def_X1_ENABLED)
+ {
+ l_scom_buffer.insert<1, 7, 57, uint64_t>(literal_0x40 );
+ l_scom_buffer.insert<33, 7, 57, uint64_t>(literal_0x40 );
+ }
if (l_def_X1_ENABLED)
{
@@ -355,11 +368,16 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
l_scom_buffer.insert<24, 5, 59, uint64_t>(literal_0x1F );
}
- if (l_def_X2_ENABLED)
+ if ((l_def_X2_ENABLED && (l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245 != literal_0)))
{
l_scom_buffer.insert<1, 7, 57, uint64_t>(literal_0x3E );
l_scom_buffer.insert<33, 7, 57, uint64_t>(literal_0x3E );
}
+ else if (l_def_X2_ENABLED)
+ {
+ l_scom_buffer.insert<1, 7, 57, uint64_t>(literal_0x40 );
+ l_scom_buffer.insert<33, 7, 57, uint64_t>(literal_0x40 );
+ }
if (l_def_X2_ENABLED)
{
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C
index d84a7614d..6db6d96fe 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_no_hp_scom.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -97,6 +97,8 @@ fapi2::ReturnCode p9_fbc_no_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_1]) + l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_2]) +
l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_3]) + l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_4]) +
l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_5]) + l_TGT0_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG[literal_6]);
+ fapi2::ATTR_CHIP_EC_FEATURE_HW383616_Type l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616;
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW383616, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616));
fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE));
fapi2::buffer<uint64_t> l_scom_buffer;
@@ -114,10 +116,28 @@ fapi2::ReturnCode p9_fbc_no_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
l_scom_buffer.insert<4, 1, 61, uint64_t>(l_PB_COM_PB_CFG_CHIP_IS_SYSTEM_OFF );
}
- constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 = 0x102040;
- l_scom_buffer.insert<16, 7, 43, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 );
- constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 = 0x102040;
- l_scom_buffer.insert<23, 7, 43, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 );
+ if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616 != literal_0))
+ {
+ constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_63 = 0xfdfbf;
+ l_scom_buffer.insert<16, 7, 43, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_63 );
+ }
+ else if (( true ))
+ {
+ constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 = 0x102040;
+ l_scom_buffer.insert<16, 7, 43, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 );
+ }
+
+ if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616 != literal_0))
+ {
+ constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_63 = 0xfdfbf;
+ l_scom_buffer.insert<23, 7, 43, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_63 );
+ }
+ else if (( true ))
+ {
+ constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 = 0x102040;
+ l_scom_buffer.insert<23, 7, 43, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 );
+ }
+
constexpr auto l_PB_COM_PB_CFG_LCL_HW_MARK_CNT_42 = 0x2aaaa;
l_scom_buffer.insert<30, 6, 46, uint64_t>(l_PB_COM_PB_CFG_LCL_HW_MARK_CNT_42 );
FAPI_TRY(fapi2::putScom(TGT0, 0x501180aull, l_scom_buffer));
@@ -136,10 +156,28 @@ fapi2::ReturnCode p9_fbc_no_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
l_scom_buffer.insert<4, 1, 62, uint64_t>(l_PB_COM_PB_CFG_CHIP_IS_SYSTEM_OFF );
}
- constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 = 0x102040;
- l_scom_buffer.insert<16, 7, 50, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 );
- constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 = 0x102040;
- l_scom_buffer.insert<23, 7, 50, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 );
+ if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616 != literal_0))
+ {
+ constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_63 = 0xfdfbf;
+ l_scom_buffer.insert<16, 7, 50, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_63 );
+ }
+ else if (( true ))
+ {
+ constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 = 0x102040;
+ l_scom_buffer.insert<16, 7, 50, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 );
+ }
+
+ if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616 != literal_0))
+ {
+ constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_63 = 0xfdfbf;
+ l_scom_buffer.insert<23, 7, 50, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_63 );
+ }
+ else if (( true ))
+ {
+ constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 = 0x102040;
+ l_scom_buffer.insert<23, 7, 50, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 );
+ }
+
constexpr auto l_PB_COM_PB_CFG_LCL_HW_MARK_CNT_42 = 0x2aaaa;
l_scom_buffer.insert<30, 6, 52, uint64_t>(l_PB_COM_PB_CFG_LCL_HW_MARK_CNT_42 );
FAPI_TRY(fapi2::putScom(TGT0, 0x5011c0aull, l_scom_buffer));
@@ -1660,10 +1698,28 @@ fapi2::ReturnCode p9_fbc_no_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
l_scom_buffer.insert<4, 1, 63, uint64_t>(l_PB_COM_PB_CFG_CHIP_IS_SYSTEM_OFF );
}
- constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 = 0x102040;
- l_scom_buffer.insert<16, 7, 57, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 );
- constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 = 0x102040;
- l_scom_buffer.insert<23, 7, 57, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 );
+ if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616 != literal_0))
+ {
+ constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_63 = 0xfdfbf;
+ l_scom_buffer.insert<16, 7, 57, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_63 );
+ }
+ else if (( true ))
+ {
+ constexpr auto l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 = 0x102040;
+ l_scom_buffer.insert<16, 7, 57, uint64_t>(l_PB_COM_PB_CFG_SP_HW_MARK_CNT_64 );
+ }
+
+ if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW383616 != literal_0))
+ {
+ constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_63 = 0xfdfbf;
+ l_scom_buffer.insert<23, 7, 57, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_63 );
+ }
+ else if (( true ))
+ {
+ constexpr auto l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 = 0x102040;
+ l_scom_buffer.insert<23, 7, 57, uint64_t>(l_PB_COM_PB_CFG_GP_HW_MARK_CNT_64 );
+ }
+
constexpr auto l_PB_COM_PB_CFG_LCL_HW_MARK_CNT_42 = 0x2aaaa;
l_scom_buffer.insert<30, 6, 58, uint64_t>(l_PB_COM_PB_CFG_LCL_HW_MARK_CNT_42 );
FAPI_TRY(fapi2::putScom(TGT0, 0x501200aull, l_scom_buffer));
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 1f9fa92a4..cd331558c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -27300,7 +27300,7 @@ fapi_try_exit:
/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
/// @note Processor SMP topology configuration. 0 = default = 1 or 2 hop topology (PHYP
-/// image spans system) 1 = 3 hop topology (PHYP image spans group). Provided by the
+/// image spans system) Provided by the
/// MRW.
///
inline fapi2::ReturnCode proc_fabric_ccsm_mode(uint8_t& o_value)
@@ -27362,8 +27362,8 @@ fapi_try_exit:
/// @param[out] uint8_t& reference to store the value
/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Processor memory map configuration. 0 = default = large system address map 1 =
-/// small system address map Provided by the
+/// @note Processor memory map configuration. 0 = default = large system address map
+/// Provided by the
/// MRW.
///
inline fapi2::ReturnCode proc_fabric_addr_bar_mode(uint8_t& o_value)
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index d593028b4..f3983814c 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -1797,6 +1797,42 @@
</chip>
</chipEcFeature>
</attribute>
+ <!-- ******************************************************************** -->
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_HW383616</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Nimbus DD1 only: enable workaround for HW383616
+ Restrict GP/SP high water mark
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ******************************************************************** -->
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_HW384245</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Nimbus DD1 only: enable workaround for HW384245
+ Restrict TL DOB limit
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
<!-- ******************************************************************** -->
<!-- Memory Section -->
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index 3367f0efd..2168b07f4 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -239,7 +239,6 @@
<description>
Processor SMP topology configuration.
0 = default = 1 or 2 hop topology (PHYP image spans system)
- 1 = 3 hop topology (PHYP image spans group).
Provided by the MRW.
</description>
<valueType>uint8</valueType>
@@ -327,7 +326,6 @@
<description>
Processor memory map configuration.
0 = default = large system address map
- 1 = small system address map
Provided by the MRW.
</description>
<valueType>uint8</valueType>
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