Adds ccs workaround to support SRE/SRX

Change-Id: I04d953b6139a82ce1320ed0fff5563c425a06b04
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52010
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52041
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

2 files changed, 73 insertions, 8 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H
index a92097f8f..579c0a317 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H
@@ -173,9 +173,12 @@ namespace mss
 
 static constexpr uint64_t CKE_HIGH = 0b1111;
 static constexpr uint64_t CKE_LOW  = 0b0000;
-// CKE setup for rank 0-7. Currently only support 0, 1, 4, 5
+
+// CKE setup for rank 0-7 to support
+// Currently only support 0, 1, 4, 5
 // Not supported ranks will always get 0
-static constexpr uint64_t CKE_ARY[]  =
+// For self_refresh_entry_command()
+static constexpr uint64_t CKE_ARY_SRE[]  =
 {
     //   0,      1, 2, 3,
     0b0111, 0b1011, 0, 0,
@@ -183,6 +186,15 @@ static constexpr uint64_t CKE_ARY[]  =
     0b0111, 0b1011, 0, 0
 };
 
+// For self_refresh_exit_command()
+static constexpr uint64_t CKE_ARY_SRX[]  =
+{
+    //   0,      1, 2, 3,
+    0b1000, 0b0100, 0, 0,
+    //   4,      5, 6, 7
+    0b1000, 0b0100, 0, 0
+};
+
 namespace ccs
 {
 
@@ -750,7 +762,7 @@ inline instruction_t<T> self_refresh_entry_command( const fapi2::Target<fapi2::T
     fapi2::buffer<uint64_t> l_boilerplate_arr1;
 
     // Set all CKE to high except the rank passed in
-    l_boilerplate_arr0.insertFromRight<TT::ARR0_DDR_CKE, TT::ARR0_DDR_CKE_LEN>(CKE_ARY[i_rank]);
+    l_boilerplate_arr0.insertFromRight<TT::ARR0_DDR_CKE, TT::ARR0_DDR_CKE_LEN>(CKE_ARY_SRE[i_rank]);
 
     // ACT is high
     l_boilerplate_arr0.setBit<TT::ARR0_DDR_ACTN>();
@@ -783,11 +795,8 @@ inline instruction_t<T> self_refresh_exit_command( const fapi2::Target<fapi2::TA
     fapi2::buffer<uint64_t> l_boilerplate_arr0;
     fapi2::buffer<uint64_t> l_boilerplate_arr1;
 
-    // Bring all CKE to high
-    // This in theory will take all ranks out of self refresh
-    // The rank passed in will see NOP (CKE = high, CS = low)
-    // All the other ranks will see DES (CKE = high, CS = high)
-    l_boilerplate_arr0.insertFromRight<TT::ARR0_DDR_CKE, TT::ARR0_DDR_CKE_LEN>(CKE_HIGH);
+    // Set all CKE to low except the rank passed in
+    l_boilerplate_arr0.insertFromRight<TT::ARR0_DDR_CKE, TT::ARR0_DDR_CKE_LEN>(CKE_ARY_SRX[i_rank]);
 
     // ACT is high
     l_boilerplate_arr0.setBit<TT::ARR0_DDR_ACTN>();
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.H
index ded4f9891..f6f6d53d1 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.H
@@ -77,6 +77,62 @@ fapi2::ReturnCode exit( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
 fapi2::ReturnCode enable_pda_shadow_reg( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
         const uint64_t i_rank );
 
+///
+/// @brief Holds the given cke low in a CCS instruction
+/// @param[in,out] io_cke - the cke bit that needs to remain low
+/// @param[in,out] io_inst - the CCS instruction
+///
+inline void hold_cke_low_helper( fapi2::buffer<uint8_t>& io_cke,
+                                 ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST>& io_inst )
+{
+    fapi2::buffer<uint8_t> l_cur_cke;
+    io_inst.arr0.extractToRight<MCBIST_CCS_INST_ARR0_00_DDR_CKE, MCBIST_CCS_INST_ARR0_00_DDR_CKE_LEN>(l_cur_cke);
+    io_cke &= l_cur_cke;
+    io_inst.arr0.insertFromRight<MCBIST_CCS_INST_ARR0_00_DDR_CKE, MCBIST_CCS_INST_ARR0_00_DDR_CKE_LEN>(io_cke);
+}
+
+///
+/// @brief Holds the lower order rank cke low in higher order rank instruction
+/// @param[in,out] io_program - CCS program with instructions on multi-rank DIMM
+///
+inline void hold_cke_low( ccs::program<fapi2::TARGET_TYPE_MCBIST>& io_program )
+{
+    fapi2::buffer<uint8_t> l_cke(CKE_HIGH);
+
+    for ( auto& l_inst : io_program.iv_instructions )
+    {
+        hold_cke_low_helper( l_cke, l_inst );
+    }
+}
+
+///
+/// @brief Holds the given cke high in a CCS instruction
+/// @param[in,out] io_cke - the cke bit that needs to remain high
+/// @param[in,out] io_inst - the CCS instruction
+///
+inline void hold_cke_high_helper( fapi2::buffer<uint8_t>& io_cke,
+                                  ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST>& io_inst )
+{
+    fapi2::buffer<uint8_t> l_cur_cke;
+    io_inst.arr0.extractToRight<MCBIST_CCS_INST_ARR0_00_DDR_CKE, MCBIST_CCS_INST_ARR0_00_DDR_CKE_LEN>(l_cur_cke);
+    io_cke |= l_cur_cke;
+    io_inst.arr0.insertFromRight<MCBIST_CCS_INST_ARR0_00_DDR_CKE, MCBIST_CCS_INST_ARR0_00_DDR_CKE_LEN>(io_cke);
+}
+
+///
+/// @brief Holds the lower order rank cke high in higher order rank instruction
+/// @param[in,out] io_program - CCS program with instructions on multi-rank DIMM
+///
+inline void hold_cke_high( ccs::program<fapi2::TARGET_TYPE_MCBIST>& io_program )
+{
+    fapi2::buffer<uint8_t> l_cke(CKE_LOW);
+
+    for ( auto& l_inst : io_program.iv_instructions )
+    {
+        hold_cke_high_helper( l_cke, l_inst );
+    }
+}
+
 namespace wr_lvl
 {