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author | Alvin Wang <wangat@tw.ibm.com> | 2019-04-01 04:53:40 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-05-11 09:21:00 -0500 |
commit | 18527d404f0f7487b8ac06f64a8d48e1523a39b0 (patch) | |
tree | 00bb49fb8ae17b40ca6566e283be89ef5354789f /src/import | |
parent | 431fd07bcd5f5e17b73c7e82c71be351b0e333f0 (diff) | |
download | talos-hostboot-18527d404f0f7487b8ac06f64a8d48e1523a39b0.tar.gz talos-hostboot-18527d404f0f7487b8ac06f64a8d48e1523a39b0.zip |
Move the mcbist lab library to generic folder
Change-Id: I8fd2d1d1c48e08d4f34aecde34803a9126ac6b4d
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75283
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75292
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
6 files changed, 111 insertions, 57 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H index 4edee3caf..6077a564e 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H @@ -88,6 +88,13 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP> // LARGEST_ADDRESS. port select (bit0~1) are always 0 so shift 2 more bits. static constexpr uint64_t LARGEST_ADDRESS = ~0 >> (mss::mcbist::address::MAGIC_PAD + 2); + // Size + static constexpr size_t PORTS_PER_MCBIST = 1; + static constexpr size_t MAX_DQ_BITS = 80; + static constexpr size_t MAX_DQ_NIBBLES = MAX_DQ_BITS / BITS_PER_NIBBLE; + static constexpr size_t MAX_DRAMS_X8 = MAX_DQ_BITS / BITS_PER_BYTE; + static constexpr size_t MAX_DRAMS_X4 = MAX_DQ_BITS / BITS_PER_NIBBLE; + /// MCBIST "memory registers" - config for subtests. static constexpr uint64_t MCBMR0_REG = EXPLR_MCBIST_MCBMR0Q; static constexpr uint64_t MCBMR1_REG = EXPLR_MCBIST_MCBMR1Q; @@ -414,6 +421,18 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP> //MCBIST FIR mask MCB_PROGRAM_COMPLETE = EXPLR_MCBIST_MCBISTFIRQ_MCBIST_PROGRAM_COMPLETE, MCB_WAT_DEBUG_ATTN = EXPLR_MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN, + + //XLT address valid offset + XLT0_SLOT1_D_VALUE = EXPLR_MCBIST_MBXLT0Q_SLOT1_D_VALUE, + XLT0_SLOT0_M1_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_M1_VALID, + XLT0_SLOT0_M0_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_M0_VALID, + XLT0_SLOT0_S2_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_S2_VALID, + XLT0_SLOT0_S1_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_S1_VALID, + XLT0_SLOT0_S0_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_S0_VALID, + XLT0_SLOT0_ROW17_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW17_VALID, + XLT0_SLOT0_ROW16_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW16_VALID, + XLT0_SLOT0_ROW15_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_ROW15_VALID, + }; // MCBIST error log related registers @@ -448,6 +467,10 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_MEM_PORT> static constexpr uint64_t RMW_WRT_BUF_DATA_REG = EXPLR_WDF_AADR; static constexpr uint64_t RMW_WRT_BUF_ECC_REG = EXPLR_WDF_AAER; + static constexpr uint64_t XLTATE0 = EXPLR_MCBIST_MBXLT0Q; + static constexpr uint64_t XLTATE1 = EXPLR_MCBIST_MBXLT1; + static constexpr uint64_t XLTATE2 = EXPLR_MCBIST_MBXLT2; + enum { // Register field constants @@ -460,6 +483,9 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_MEM_PORT> RMW_WRT_AUTOINC = EXPLR_WDF_AACR_AUTOINC, RMW_WRT_ECCGEN = EXPLR_WDF_AACR_ECCGEN, + XLTATE_SLOT0_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT0_VALID, + XLTATE_SLOT1_VALID = EXPLR_MCBIST_MBXLT0Q_SLOT1_VALID, + // Constants used for field settings SELECT_RMW_BUFFER = 0, SELECT_WRT_BUFFER = 1, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H index 89206597e..e1cf84dfd 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H @@ -87,6 +87,14 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> // LARGEST_ADDRESS static constexpr uint64_t LARGEST_ADDRESS = ~0 >> mss::mcbist::address::MAGIC_PAD; + // Size + static constexpr size_t PORTS_PER_MCBIST = 4; + static constexpr size_t MAX_DQ_BITS = 72; + static constexpr size_t MAX_DQ_NIBBLES = MAX_DQ_BITS / + BITS_PER_NIBBLE; ///< For ISDIMMs are 18 DQ nibbles for DQ 72 bits + static constexpr size_t MAX_DRAMS_X8 = MAX_DQ_BITS / BITS_PER_BYTE; ///< For x8's there are 9 DRAM for 72 bits + static constexpr size_t MAX_DRAMS_X4 = MAX_DQ_BITS / BITS_PER_NIBBLE; ///< For x4's there are 18 DRAM for 72 bits + /// MCBIST "memory registers" - config for subtests. static constexpr uint64_t MCBMR0_REG = MCBIST_MCBMR0Q; static constexpr uint64_t MCBMR1_REG = MCBIST_MCBMR1Q; @@ -414,8 +422,21 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> MCB_WAT_DEBUG_ATTN = MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN, MCB_PROGRAM_COMPLETE_MASK = MCB_PROGRAM_COMPLETE, MCB_WAT_DEBUG_ATTN_MASK = MCB_WAT_DEBUG_ATTN, + + //XLT address valid offset + XLT0_SLOT1_D_VALUE = MCS_PORT13_MCP0XLT0_SLOT1_D_VALUE, + XLT0_SLOT0_M1_VALID = MCS_PORT13_MCP0XLT0_SLOT0_M1_VALID, + XLT0_SLOT0_M0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_M0_VALID, + XLT0_SLOT0_S2_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S2_VALID, + XLT0_SLOT0_S1_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S1_VALID, + XLT0_SLOT0_S0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S0_VALID, + XLT0_SLOT0_ROW17_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW17_VALID, + XLT0_SLOT0_ROW16_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW16_VALID, + XLT0_SLOT0_ROW15_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW15_VALID, + }; + }; @@ -433,6 +454,11 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCA> static constexpr uint64_t RMW_WRT_BUF_DATA_REG = MCA_AADR; static constexpr uint64_t RMW_WRT_BUF_ECC_REG = MCA_AAER; + // XLT registers + static constexpr uint64_t XLTATE0 = MCA_MBA_MCP0XLT0; + static constexpr uint64_t XLTATE1 = MCA_MBA_MCP0XLT1; + static constexpr uint64_t XLTATE2 = MCA_MBA_MCP0XLT2; + enum { // Register field constants @@ -445,6 +471,9 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCA> RMW_WRT_AUTOINC = MCA_WREITE_AACR_AUTOINC, RMW_WRT_ECCGEN = MCA_WREITE_AACR_ECCGEN, + XLTATE_SLOT0_VALID = MCS_PORT02_MCP0XLT0_SLOT0_VALID, + XLTATE_SLOT1_VALID = MCS_PORT02_MCP0XLT0_SLOT1_VALID, + // Constants used for field settings SELECT_RMW_BUFFER = 0, SELECT_WRT_BUFFER = 1, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index 1564d6f85..c36dda47e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -94,14 +94,6 @@ enum sizes // Largest size a VPD keyword can be VPD_KEYWORD_MAX = 255, - - // MCBIST polling constant for actual HW - // The specific value here is not important, only that it is very large to avoid polling timeouts, - // but not to avoid any actual hardware timeouts - // Note: ~0 is not used as that would cause MCBIST to never timeout even if the hardware is in an infinite loop - // You can't get greater than ~0, so you'd never timeout - // TODO RTC:166340 - Clean up MCBIST polling - OVERLY_LARGE_NUMBER_OF_POLLS = 5000000000000, }; enum times @@ -258,44 +250,6 @@ enum voltages : uint64_t }; -enum port_select -{ - // Port selects for MCBIST and CCS - // Select for 1 port - PORT0 = 0b1000, - PORT1 = 0b0100, - PORT2 = 0b0010, - PORT3 = 0b0001, - // Selects for 2 port combinations - PORT01 = PORT0 | PORT1, - PORT02 = PORT0 | PORT2, - PORT03 = PORT0 | PORT3, - PORT12 = PORT1 | PORT2, - PORT13 = PORT1 | PORT3, - PORT23 = PORT2 | PORT3, - // Selects for 3 port combinations - PORT012 = PORT0 | PORT1 | PORT2, - PORT013 = PORT0 | PORT1 | PORT3, - PORT023 = PORT0 | PORT2 | PORT3, - PORT123 = PORT1 | PORT2 | PORT3, - // Select all - PORT0123 = PORT0 | PORT1 | PORT2 | PORT3, - // Maybe a better name for disabling all - PORT_NONE = 0b0000, -}; - -enum dimm_select -{ - // Dimm selects for MCBIST and CCS - // Select for 1 dimm - DIMM0 = 0b10, - DIMM1 = 0b01, - // Selects for 2 dimm combinations - DIMM01 = DIMM0 | DIMM1, - // Maybe a better name for disabling all - DIMM_NONE = 0b00, -}; - // Possible values for power domains in MBARPC0Q enum min_max_domains : uint64_t { diff --git a/src/import/generic/memory/lib/utils/mcbist/gen_settings.H b/src/import/generic/memory/lib/utils/mcbist/gen_settings.H index afd306dfb..9c4392d0b 100644 --- a/src/import/generic/memory/lib/utils/mcbist/gen_settings.H +++ b/src/import/generic/memory/lib/utils/mcbist/gen_settings.H @@ -42,6 +42,7 @@ #include <generic/memory/lib/utils/mcbist/gen_address.H> #include <generic/memory/lib/utils/bit_count.H> #include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_traits.H> +#include <generic/memory/lib/utils/mcbist/gen_patterns.H> namespace mss { diff --git a/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H b/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H index d90c6bb01..eb0533916 100644 --- a/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H +++ b/src/import/generic/memory/lib/utils/power_thermal/gen_throttle.H @@ -214,11 +214,10 @@ fapi2::ReturnCode update_runtime_throttle(const fapi2::Target<T>& i_target) l_run_port = (l_calc_port != 0) ? std::min(l_run_port, l_calc_port) : l_run_port; - FAPI_INF("New runtime throttles for %s for slot are %d, port are %d for %s", + FAPI_INF("New runtime throttles for %s for slot are %d, port are %d", mss::c_str(l_port), l_run_slot, - l_run_port, - mss::c_str(l_port)); + l_run_port); FAPI_TRY( mss::attr::set_runtime_mem_throttled_n_commands_per_port(l_port, l_run_port) ); FAPI_TRY( mss::attr::set_runtime_mem_throttled_n_commands_per_slot(l_port, l_run_slot) ); @@ -492,14 +491,13 @@ throttle<MC, TT>::throttle( const fapi2::Target<TT::PORT_TARGET_TYPE>& i_port, f iv_port_power_limit += l_dimm_limit; } - FAPI_INF("Setting up throttle for target %s, Values are: max databus is %d, uplifts are %d %d, runtime throttles are %d %d for %s", + FAPI_INF("Setting up throttle for target %s, Values are: max databus is %d, uplifts are %d %d, runtime throttles are %d %d", mss::c_str(iv_target), iv_databus_port_max, iv_power_uplift, iv_power_uplift_idle, iv_runtime_n_slot, - iv_runtime_n_port, - mss::c_str(iv_target)); + iv_runtime_n_port); FAPI_INF("The dimm power limit is %d, dram clocks are %d, dimm power curve slopes are %d %d for %s", iv_port_power_limit, @@ -684,8 +682,7 @@ fapi2::ReturnCode throttle<MC, TT>::thermal_throttles () iv_dimm_thermal_limit[l_pos], l_calc_util[l_pos]); - FAPI_INF("THERMAL throttles: %s dram databus utilization is %f for %s", mss::c_str(l_dimm), l_calc_util[l_pos], - mss::c_str(l_dimm)); + FAPI_INF("THERMAL throttles: %s dram databus utilization is %f", mss::c_str(l_dimm), l_calc_util[l_pos]); l_temp_n_slot = power_thermal::throttled_cmds (l_calc_util[l_pos], iv_m_clocks); @@ -1045,13 +1042,12 @@ fapi2::ReturnCode throttle<MC, TT>::calc_split_util( o_util_dimm_max[(!l_high_pos)] = (l_count_dimms == TT::DIMMS_PER_PORT) ? (i_util_port - o_util_dimm_max[l_high_pos]) : 0; - FAPI_INF("Split utilization for target %s, DIMM in %d gets %f, DIMM in %d gets %f for %s", + FAPI_INF("Split utilization for target %s, DIMM in %d gets %f, DIMM in %d gets %f", mss::c_str(iv_target), l_high_pos, o_util_dimm_max[l_high_pos], !l_high_pos, - o_util_dimm_max[!l_high_pos], - mss::c_str(iv_target)); + o_util_dimm_max[!l_high_pos]); } else { diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H index 6fcd73070..50b9063ff 100644 --- a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H +++ b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H @@ -76,6 +76,15 @@ enum mcbist_common_consts BG_SCRUB_IN_HOURS = 12, CMD_TIMEBASE = 8192, ///< Represents the timebase multiplier for the MCBIST inter cmd gap MAX_CMD_GAP = 4095, ///< Represents the maximum (non-multplied) time for MCBIST inter cmd gap + + + // MCBIST polling constant for actual HW + // The specific value here is not important, only that it is very large to avoid polling timeouts, + // but not to avoid any actual hardware timeouts + // Note: ~0 is not used as that would cause MCBIST to never timeout even if the hardware is in an infinite loop + // You can't get greater than ~0, so you'd never timeout + // TODO RTC:166340 - Clean up MCBIST polling + OVERLY_LARGE_NUMBER_OF_POLLS = 5000000000000, }; /// @@ -281,6 +290,45 @@ enum states NO_CHIP_SELECT_ACTIVE = 0xFF, }; + +enum port_select +{ + // Port selects for MCBIST and CCS + // Select for 1 port + PORT0 = 0b1000, + PORT1 = 0b0100, + PORT2 = 0b0010, + PORT3 = 0b0001, + // Selects for 2 port combinations + PORT01 = PORT0 | PORT1, + PORT02 = PORT0 | PORT2, + PORT03 = PORT0 | PORT3, + PORT12 = PORT1 | PORT2, + PORT13 = PORT1 | PORT3, + PORT23 = PORT2 | PORT3, + // Selects for 3 port combinations + PORT012 = PORT0 | PORT1 | PORT2, + PORT013 = PORT0 | PORT1 | PORT3, + PORT023 = PORT0 | PORT2 | PORT3, + PORT123 = PORT1 | PORT2 | PORT3, + // Select all + PORT0123 = PORT0 | PORT1 | PORT2 | PORT3, + // Maybe a better name for disabling all + PORT_NONE = 0b0000, +}; + +enum dimm_select +{ + // Dimm selects for MCBIST and CCS + // Select for 1 dimm + DIMM0 = 0b10, + DIMM1 = 0b01, + // Selects for 2 dimm combinations + DIMM01 = DIMM0 | DIMM1, + // Maybe a better name for disabling all + DIMM_NONE = 0b00, +}; + namespace mcbist { |