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author | Greg Still <stillgs@us.ibm.com> | 2017-08-17 15:51:15 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-07 17:32:27 -0400 |
commit | 16eddb5c87697e40d41ef842e6b6ad87cc17623e (patch) | |
tree | 0411c859ad846ed39f14472d750904f0cac6ecea /src/import | |
parent | 332403a4c976d92eab5fec07cf01379d424f7313 (diff) | |
download | talos-hostboot-16eddb5c87697e40d41ef842e6b6ad87cc17623e.tar.gz talos-hostboot-16eddb5c87697e40d41ef842e6b6ad87cc17623e.zip |
PM (Cronus): Add processor id for errors from p9_activate_stop15_cores
- reformatted error output for readability
- removed FAPI_ASSERT FFDC as these are not useful in Cronus; moved the FFDC
to printfs before the ASSERT
- Added isHalted() to ppe_utils
- added SSH and better SGPE oriented register FFDC
- removed extra setBit to core_sb buffer
Change-Id: Ie23f294b843b15a78b8d3ee036310631c0595904
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44758
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45304
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.C | 20 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H | 13 |
2 files changed, 33 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.C b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.C index 810a6fa72..8cbd018fa 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.C +++ b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.C @@ -641,6 +641,26 @@ fapi_try_exit: //----------------------------------------------------------------------------- +fapi2::ReturnCode ppe_isHalted( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, + const uint64_t i_base_address, + bool* o_halted) +{ + fapi2::buffer<uint64_t> l_data64; + + FAPI_TRY(getScom ( i_target, + i_base_address + PPE_XIRAMDBG, + l_data64 ), + "Failed reading XIRAMDBG register!" ); + + *o_halted = l_data64.getBit<0>(); + +fapi_try_exit: + return fapi2::current_err; +} + +//----------------------------------------------------------------------------- + #ifndef __HOSTBOOT_MODULE fapi2::ReturnCode scom_regs_populate_name( diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H index cad4f3dd2..8d80ca0d8 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H @@ -491,6 +491,19 @@ fapi2::ReturnCode ppe_write_iar( const uint64_t i_base_address, const uint64_t i_address ); + +///-------------------------------------------------------------------------------------- +/// @brief Determine if the PPE is halted +/// @param[in] i_target target +/// @param[in] i_base_address base SCOM address of the PPE +/// @param[out] o_halted boolean true if halted; false otherwise +/// @return fapi2::ReturnCode +///-------------------------------------------------------------------------------------- +fapi2::ReturnCode ppe_isHalted( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, + const uint64_t i_base_address, + bool* o_halted); + #ifndef __HOSTBOOT_MODULE ///-------------------------------------------------------------------------------------- |