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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2018-07-25 16:20:27 +0200 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-08-01 16:20:47 -0500 |
| commit | 3dcbd232eb5d9db7a882362a5e740a664bb6205e (patch) | |
| tree | f0de838f8fdd01f661cbcc11abb9dfbfcb200acb /src/import/hwpf | |
| parent | e37d51a556e6748743bc5a83e60c5c8ded22aad8 (diff) | |
| download | talos-hostboot-3dcbd232eb5d9db7a882362a5e740a664bb6205e.tar.gz talos-hostboot-3dcbd232eb5d9db7a882362a5e740a664bb6205e.zip | |
p9_sbe_lpc_init: Improve reset
The sequence to switch the LPC HC clock onto the nest clock temporarily
was incorrect as it used the TP CPLT_CTRL0 register inasted of N3, so it
never really switched the clocks during reset. Also, for good measure,
keep the clock switched to the nest clock while we're resetting the LPC
bus.
(Bonus change: Decrease the sim delay cycles waiting for a command to
complete.)
Change-Id: I5e77fa056204639a96aad9c1eec4b7bc76d8e54b
CQ: SW439536
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63279
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63287
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/hwpf')
0 files changed, 0 insertions, 0 deletions
