Ported ecc engine to generic

Change-Id: Icd8034fd8a0a58874bf79f72392cdc737c5af99e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71828
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76179
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

18 files changed, 4401 insertions, 4 deletions

diff --git a/src/import/generic/memory/lib/ecc/ecc.H b/src/import/generic/memory/lib/ecc/ecc.H
index 37a3fc067..ebfc37447 100644
--- a/src/import/generic/memory/lib/ecc/ecc.H
+++ b/src/import/generic/memory/lib/ecc/ecc.H
@@ -22,3 +22,772 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file ecc.H
+/// @brief Top level API for MSS ECC
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_ECC_H_
+#define _MSS_ECC_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+#include <generic/memory/lib/ecc/galois.H>
+#include <generic/memory/lib/ecc/hw_mark_store.H>
+#include <generic/memory/lib/ecc/fw_mark_store.H>
+#include <generic/memory/lib/ecc/mainline_nce_trap.H>
+#include <generic/memory/lib/ecc/mainline_rce_trap.H>
+#include <generic/memory/lib/ecc/mainline_mpe_trap.H>
+#include <generic/memory/lib/ecc/mainline_ue_trap.H>
+#include <generic/memory/lib/ecc/mainline_aue_trap.H>
+#include <generic/memory/lib/ecc/mbs_error_vector_trap.H>
+#include <generic/memory/lib/ecc/maint_current_trap.H>
+#include <generic/memory/lib/ecc/read_error_count_regs.H>
+#include <generic/memory/lib/ecc/modal_symbol_count.H>
+#include <generic/memory/lib/ecc/mark_shadow_reg.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+///
+/// @brief Get Hardware Mark Store
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[in] i_rank the desired rank
+/// @param[out] o_galois the Galois code of the mark
+/// @param[out] o_confirmed true if the mark is a chipmark
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_hwms( const fapi2::Target<T>& i_target,
+                                   const uint64_t i_rank,
+                                   uint64_t& o_galois,
+                                   mss::states& o_confirmed )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::hwms::read(i_target, i_rank, l_buffer) );
+    mss::ecc::hwms::get_chipmark(l_buffer, o_galois);
+    mss::ecc::hwms::get_confirmed(l_buffer, o_confirmed);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Set Hardware Mark Store
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[in] i_rank the desired rank
+/// @param[in] i_galois the Galois code of the mark, or set to 0 to clear mark
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode set_hwms( const fapi2::Target<T>& i_target,
+                                   const uint64_t i_rank,
+                                   const uint64_t i_galois )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+    uint8_t l_symbol = 0;
+
+    // galois value of 0 means to clear the mark so only fill in fields if non-zero
+    if (i_galois != 0)
+    {
+        // check for valid Galois code
+        FAPI_TRY( mss::ecc::galois_to_symbol( (uint8_t)i_galois, l_symbol) );
+
+        mss::ecc::hwms::set_chipmark(l_buffer, i_galois);
+        mss::ecc::hwms::set_confirmed(l_buffer, mss::YES);
+        mss::ecc::hwms::set_exit_1(l_buffer, mss::YES);
+    }
+
+    FAPI_TRY( mss::ecc::hwms::write(i_target, i_rank, l_buffer) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Firmware Mark Store
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[in] i_rank the desired rank
+/// @param[out] o_galois the Galois code of the mark
+/// @param[out] o_type the type code of the mark
+/// @param[out] o_region the region code of the mark
+/// @param[out] o_address the starting address of the mark
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_fwms( const fapi2::Target<T>& i_target,
+                                   const uint64_t i_rank,
+                                   uint64_t& o_galois,
+                                   mss::ecc::fwms::mark_type& o_type,
+                                   mss::ecc::fwms::mark_region& o_region,
+                                   mss::mcbist::address& o_address )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::fwms::read(i_target, i_rank, l_buffer) );
+    mss::ecc::fwms::get_mark(l_buffer, o_galois);
+    mss::ecc::fwms::get_type(l_buffer, o_type);
+    mss::ecc::fwms::get_region(l_buffer, o_region);
+    mss::ecc::fwms::get_address(l_buffer, o_address);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Set Firmware Mark Store
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[in] i_rank the desired rank
+/// @param[in] i_galois the Galois code of the mark, or set to 0 to clear mark
+/// @param[in] i_type the type code of the mark
+/// @param[in] i_region the region code of the mark
+/// @param[in] i_address the starting address of the mark
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode set_fwms( const fapi2::Target<T>& i_target,
+                                   const uint64_t i_rank,
+                                   const uint64_t i_galois,
+                                   const mss::ecc::fwms::mark_type i_type,
+                                   const mss::ecc::fwms::mark_region i_region,
+                                   const mss::mcbist::address i_address )
+{
+    fapi2::buffer<uint64_t> l_buffer = 0;
+    uint8_t l_symbol = 0;
+
+    // galois value of 0 means to clear the mark so only fill in fields if non-zero
+    if (i_galois != 0)
+    {
+        // check for valid Galois code
+        FAPI_TRY( mss::ecc::galois_to_symbol( (uint8_t)i_galois, l_symbol) );
+
+        mss::ecc::fwms::set_mark(l_buffer, i_galois);
+        mss::ecc::fwms::set_type(l_buffer, i_type);
+        mss::ecc::fwms::set_region(l_buffer, i_region);
+        mss::ecc::fwms::set_address(l_buffer, i_address);
+        mss::ecc::fwms::set_exit_1(l_buffer, mss::YES);
+    }
+
+    FAPI_TRY( mss::ecc::fwms::write(i_target, i_rank, l_buffer) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Query Hardware Marks
+/// @tparam T the fapi2::TargetType - derived
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_marks vector of Galois codes of any marks set
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+/// @note no rank information is returned
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode get_hw_marks( const fapi2::Target<T>& i_target,
+                                       std::vector<uint64_t>& o_marks )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+    uint64_t l_galois = 0;
+    auto l_confirmed = mss::states::NO;
+
+    o_marks.clear();
+
+    for (uint64_t l_rank = 0; l_rank < TT::ECC_MAX_MRANK_PER_PORT; ++l_rank)
+    {
+        FAPI_TRY( get_hwms(i_target, l_rank, l_galois, l_confirmed) );
+
+        if (l_confirmed == mss::states::YES)
+        {
+            o_marks.push_back(l_galois);
+        }
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Query Firmware Marks
+/// @tparam T the fapi2::TargetType - derived
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_marks vector of Galois codes of any marks set
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+/// @note no rank information is returned
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode get_fw_marks( const fapi2::Target<T>& i_target,
+                                       std::vector<uint64_t>& o_marks )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+    uint64_t l_galois = 0;
+    auto l_type = mss::ecc::fwms::mark_type::CHIP;
+    auto l_region = mss::ecc::fwms::mark_region::UNIVERSAL;
+    mss::mcbist::address l_address;
+
+    o_marks.clear();
+
+    for (uint64_t l_rank = 0; l_rank < TT::ECC_MAX_MRANK_PER_PORT; ++l_rank)
+    {
+        FAPI_TRY( get_fwms(i_target, l_rank, l_galois, l_type, l_region, l_address) );
+
+        if (l_region != mss::ecc::fwms::mark_region::DISABLED)
+        {
+            o_marks.push_back(l_galois);
+        }
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline NCE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the trap address of the last mainline nce
+/// @param[out] o_on_rce mss::YES if nce is part of an rce
+/// @param[out] o_is_tce mss::YES if nce is a tce
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_nce_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address,
+        mss::states& o_on_rce,
+        mss::states& o_is_tce )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mainline_nce_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_nce_trap::get_address(l_buffer, o_address);
+    mss::ecc::mainline_nce_trap::get_nce_on_rce(l_buffer, o_on_rce);
+    mss::ecc::mainline_nce_trap::get_nce_is_tce(l_buffer, o_is_tce);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline NCE error vector traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_galois the Galois code
+/// @param[out] o_magnitude the magnitude of the error
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_nce_error_vector_trap( const fapi2::Target<T>& i_target,
+        uint64_t& o_galois,
+        uint64_t& o_magnitude )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mbs_error_vector_trap::read(i_target, l_buffer) );
+    mss::ecc::mbs_error_vector_trap::get_nce_galois(i_target, l_buffer, o_galois);
+    mss::ecc::mbs_error_vector_trap::get_nce_magnitude(i_target, l_buffer, o_magnitude);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline TCE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the trap address of the last mainline nce
+/// @param[out] o_on_rce mss::YES if nce is part of an rce
+/// @param[out] o_is_tce mss::YES if nce is a tce
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_tce_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address,
+        mss::states& o_on_rce,
+        mss::states& o_is_tce )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mainline_nce_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_nce_trap::get_address(l_buffer, o_address);
+    mss::ecc::mainline_nce_trap::get_nce_on_rce(l_buffer, o_on_rce);
+    mss::ecc::mainline_nce_trap::get_nce_is_tce(l_buffer, o_is_tce);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline TCE error vector traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_nce_galois the Galois code
+/// @param[out] o_nce_magnitude the magnitude of the error
+/// @param[out] o_tce_galois the Galois code
+/// @param[out] o_tce_magnitude the magnitude of the error
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_tce_error_vector_trap( const fapi2::Target<T>& i_target,
+        uint64_t& o_nce_galois,
+        uint64_t& o_nce_magnitude,
+        uint64_t& o_tce_galois,
+        uint64_t& o_tce_magnitude )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mbs_error_vector_trap::read(i_target, l_buffer) );
+    mss::ecc::mbs_error_vector_trap::get_nce_galois(i_target, l_buffer, o_nce_galois);
+    mss::ecc::mbs_error_vector_trap::get_nce_magnitude(i_target, l_buffer, o_nce_magnitude);
+    mss::ecc::mbs_error_vector_trap::get_tce_galois(i_target, l_buffer, o_tce_galois);
+    mss::ecc::mbs_error_vector_trap::get_tce_magnitude(i_target, l_buffer, o_tce_magnitude);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline MPE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the trap address of the last mainline mpe
+/// @param[out] o_on_rce mss::YES if mpe is part of an rce
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_mpe_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address,
+        mss::states& o_on_rce )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mainline_mpe_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_mpe_trap::get_address(l_buffer, o_address);
+    mss::ecc::mainline_mpe_trap::get_mpe_on_rce(l_buffer, o_on_rce);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline RCE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the trap address of the last mainline rce
+/// @param[out] o_nce_on_rce mss::YES if nce is part of an rce
+/// @param[out] o_tce_on_rce mss::YES if tce is part of an rce
+/// @param[out] o_mpe_on_rce mss::YES if mpe is part of an rce
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_rce_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address,
+        mss::states& o_nce_on_rce,
+        mss::states& o_tce_on_rce,
+        mss::states& o_mpe_on_rce )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mainline_rce_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_rce_trap::get_address(l_buffer, o_address);
+
+    FAPI_TRY( mss::ecc::mainline_nce_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_nce_trap::get_nce_on_rce(l_buffer, o_nce_on_rce);
+    mss::ecc::mainline_nce_trap::get_nce_is_tce(l_buffer, o_tce_on_rce);
+
+    FAPI_TRY( mss::ecc::mainline_mpe_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_mpe_trap::get_mpe_on_rce(l_buffer, o_mpe_on_rce);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline UE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the trap address of the last mainline ue
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_ue_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mainline_ue_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_ue_trap::get_address(l_buffer, o_address);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Mainline AUE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the trap address of the last mainline aue
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_aue_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mainline_aue_trap::read(i_target, l_buffer) );
+    mss::ecc::mainline_aue_trap::get_address(l_buffer, o_address);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get IMPE address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_chipmark the mark location (Galois code) of the last mark placed
+/// @param[out] o_rank the rank of the last mark placed
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_impe_addr_trap( const fapi2::Target<T>& i_target,
+        uint64_t& o_chipmark,
+        uint64_t& o_rank )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mark_shadow_reg::read(i_target, l_buffer) );
+    mss::ecc::mark_shadow_reg::get_chipmark(l_buffer, o_chipmark);
+    mss::ecc::mark_shadow_reg::get_rank(l_buffer, o_rank);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Maint Current address traps
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_address the last address executed
+/// @param[out] o_port_trap port value if MCBCFGQ_cfg_current_addr_trap_update_dis == 0
+/// @param[out] o_dimm_trap dimm value if MCBCFGQ_cfg_current_addr_trap_update_dis == 0
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_maint_current_addr_trap( const fapi2::Target<T>& i_target,
+        mss::mcbist::address& o_address,
+        uint64_t& o_port_trap,
+        uint64_t& o_dimm_trap )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::maint_current_trap::read(i_target, l_buffer) );
+    mss::ecc::maint_current_trap::get_address(l_buffer, o_address);
+    mss::ecc::maint_current_trap::get_port(l_buffer, o_port_trap);
+    mss::ecc::maint_current_trap::get_dimm(l_buffer, o_dimm_trap);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Per Symbol Error Counts
+/// @tparam T the fapi2::TargetType - derived
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_error_counts vector of symbol error counts
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode get_per_symbol_error_counts( const fapi2::Target<T>& i_target,
+        std::vector<uint64_t>& o_error_counts )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+    uint64_t l_count = 0;
+    o_error_counts.clear();
+
+    for (uint64_t l_index = 0; l_index < TT::NUM_MBSSYM_REGS; ++l_index)
+    {
+        FAPI_TRY( mss::ecc::modal_symbol_count::read(i_target, l_index, l_buffer) );
+
+        for (uint64_t l_symbol = 0; l_symbol < TT::MODAL_SYMBOL_COUNTERS_PER_REG; ++l_symbol)
+        {
+            l_count = 0;
+            mss::ecc::modal_symbol_count::get_count(l_buffer, l_symbol, l_count);
+            o_error_counts.push_back(l_count);
+        }
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Intermittent NCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of intermittent NCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_intermittent_nce_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg0::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg0::get_intermittent_ce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Soft NCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of soft NCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_soft_nce_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg0::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg0::get_soft_ce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Hard NCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of hard NCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_hard_nce_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg0::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg0::get_hard_ce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Intermittent MCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of intermittent MCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_intermittent_mce_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg0::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg0::get_intermittent_mce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Soft MCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of soft MCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_soft_mce_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg0::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg0::get_soft_mce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get Hard MCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of hard MCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_hard_mce_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg1::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg1::get_hard_mce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get ICE (IMPE) error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of ICE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_ice_count( const fapi2::Target<T>& i_target,
+                                        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg1::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg1::get_ice_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get UE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of UE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_ue_count( const fapi2::Target<T>& i_target,
+                                       uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg1::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg1::get_ue_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get AUE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of AUE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_aue_count( const fapi2::Target<T>& i_target,
+                                        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg1::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg1::get_aue_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get RCE error count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_count count of RCE events
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_rce_count( const fapi2::Target<T>& i_target,
+                                        uint64_t& o_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::read_error_count_reg1::read(i_target, l_buffer) );
+    mss::ecc::read_error_count_reg1::get_rce_count(l_buffer, o_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Get MCE symbol count
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @param[out] o_symbol0_count count of symbol 0 errors
+/// @param[out] o_symbol1_count count of symbol 1 errors
+/// @param[out] o_symbol2_count count of symbol 2 errors
+/// @param[out] o_symbol3_count count of symbol 3 errors
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode get_mce_symbol_count( const fapi2::Target<T>& i_target,
+        uint64_t& o_symbol0_count,
+        uint64_t& o_symbol1_count,
+        uint64_t& o_symbol2_count,
+        uint64_t& o_symbol3_count )
+{
+    fapi2::buffer<uint64_t> l_buffer;
+
+    FAPI_TRY( mss::ecc::mark_symbol_count_reg::read(i_target, l_buffer) );
+    mss::ecc::mark_symbol_count_reg::get_symbol0_count(l_buffer, o_symbol0_count);
+    mss::ecc::mark_symbol_count_reg::get_symbol1_count(l_buffer, o_symbol1_count);
+    mss::ecc::mark_symbol_count_reg::get_symbol2_count(l_buffer, o_symbol2_count);
+    mss::ecc::mark_symbol_count_reg::get_symbol3_count(l_buffer, o_symbol3_count);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Clear all MAINT.ECC counters
+/// @tparam T the fapi2::TargetType - derived
+/// @param[in] i_target the fapi2 target
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode clear_all_counters( const fapi2::Target<T>& i_target )
+{
+    return ( mss::mcbist::reset_errors(i_target) );
+}
+
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/ecc_traits.H b/src/import/generic/memory/lib/ecc/ecc_traits.H
index 81d264ff7..8018c42ae 100644
--- a/src/import/generic/memory/lib/ecc/ecc_traits.H
+++ b/src/import/generic/memory/lib/ecc/ecc_traits.H
@@ -22,3 +22,33 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file ecc_traits.H
+/// @brief Traits class for the MC ECC syndrome registers
+///
+// *HWP HWP Owner: Matthew Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_ECC_TRAITS_H_
+#define _MSS_ECC_TRAITS_H_
+
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+
+namespace mss
+{
+
+///
+/// @class eccTraits
+/// @brief a collection of traits associated with the MC ECC interface
+/// @tparam T fapi2::TargetType representing the memory controller
+///
+template< mss::mc_type MC, fapi2::TargetType T >
+class eccTraits;
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/fw_mark_store.H b/src/import/generic/memory/lib/ecc/fw_mark_store.H
index e1fb56927..39f661daf 100644
--- a/src/import/generic/memory/lib/ecc/fw_mark_store.H
+++ b/src/import/generic/memory/lib/ecc/fw_mark_store.H
@@ -22,3 +22,597 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file fw_mark_store.H
+/// @brief Subroutines for the MC firmware mark store registers
+///
+// *HWP HWP Owner: Matthew Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_FW_MARK_STORE_H_
+#define _MSS_FW_MARK_STORE_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace fwms
+{
+
+///
+/// @brief chip mark type enums
+///
+enum mark_type
+{
+    SYMBOL = 1,
+    CHIP = 0
+};
+
+///
+/// @brief Chip Mark Region. Used for region field values in the FWMS regs
+///
+enum mark_region
+{
+    DISABLED = 0b000,
+    RESERVED = 0b001,
+    BANK = 0b010,
+    BANKGROUP = 0b011,
+    SRANK = 0b100,
+    MRANK = 0b101,
+    DIMM = 0b110,
+    UNIVERSAL = 0b111
+};
+
+///
+/// @brief Read Firmware Mark Store (FWMS) register
+/// @tparam R master rank number
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< uint64_t R, fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read_rank( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    static_assert((R < TT::ECC_MAX_MRANK_PER_PORT), "Master rank index failed range check");
+    FAPI_TRY( mss::getScom(i_target, (TT::FIRMWARE_MS0_REG + R), o_data) );
+    FAPI_INF("read_rank<%d>: 0x%016lx", R, o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 0 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<0>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 1 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank1( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<1>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 2 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank2( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<2>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 3 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank3( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<3>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 4 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank4( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<4>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 5 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank5( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<5>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 6 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank6( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<6>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) rank 7 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank7( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<7>(i_target, o_data) );
+}
+
+///
+/// @brief Read Firmware Mark Store (FWMS) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_rank the master rank index
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target,
+                               const uint64_t i_rank,
+                               fapi2::buffer<uint64_t>& o_data )
+{
+    switch (i_rank)
+    {
+        case(0):
+            return ( read_rank0(i_target, o_data) );
+
+        case(1):
+            return ( read_rank1(i_target, o_data) );
+
+        case(2):
+            return ( read_rank2(i_target, o_data) );
+
+        case(3):
+            return ( read_rank3(i_target, o_data) );
+
+        case(4):
+            return ( read_rank4(i_target, o_data) );
+
+        case(5):
+            return ( read_rank5(i_target, o_data) );
+
+        case(6):
+            return ( read_rank6(i_target, o_data) );
+
+        case(7):
+            return ( read_rank7(i_target, o_data) );
+
+        default:
+            FAPI_ASSERT( false,
+                         fapi2::MSS_INVALID_RANK_PASSED()
+                         .set_RANK(i_rank)
+                         .set_TARGET(i_target)
+                         .set_FUNCTION(FWMS_READ),
+                         "%s Invalid rank passed to fwms::ecc::read (%d)",
+                         mss::c_str(i_target),
+                         i_rank);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) register
+/// @tparam R master rank number
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< uint64_t R, fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write_rank( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    static_assert((R < TT::ECC_MAX_MRANK_PER_PORT), "Master rank index failed range check");
+    FAPI_TRY( mss::putScom(i_target, (TT::FIRMWARE_MS0_REG + R), i_data) );
+    FAPI_DBG("write_rank<%d>: 0x%016lx", R, i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 0 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank0( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<0>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 1 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank1( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<1>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 2 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank2( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<2>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 3 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank3( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<3>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 4 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank4( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<4>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 5 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank5( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<5>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 6 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank6( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<6>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) rank 7 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank7( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<7>(i_target, i_data) );
+}
+
+///
+/// @brief Write Firmware Mark Store (FWMS) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_rank the master rank index
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target,
+                                const uint64_t i_rank,
+                                const fapi2::buffer<uint64_t>& i_data )
+{
+    switch (i_rank)
+    {
+        case(0):
+            return ( write_rank0(i_target, i_data) );
+
+        case(1):
+            return ( write_rank1(i_target, i_data) );
+
+        case(2):
+            return ( write_rank2(i_target, i_data) );
+
+        case(3):
+            return ( write_rank3(i_target, i_data) );
+
+        case(4):
+            return ( write_rank4(i_target, i_data) );
+
+        case(5):
+            return ( write_rank5(i_target, i_data) );
+
+        case(6):
+            return ( write_rank6(i_target, i_data) );
+
+        case(7):
+            return ( write_rank7(i_target, i_data) );
+
+        default:
+            FAPI_ASSERT( false,
+                         fapi2::MSS_INVALID_RANK_PASSED()
+                         .set_RANK(i_rank)
+                         .set_TARGET(i_target)
+                         .set_FUNCTION(FWMS_WRITE),
+                         "%s Invalid rank passed to fwms::ecc::write (%d)",
+                         mss::c_str(i_target),
+                         i_rank);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_mark
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note FWMS0_MARK: mark (Galois field code)
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_mark( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::FIRMWARE_MS_MARK, TT::FIRMWARE_MS_MARK_LEN>(i_value);
+    FAPI_DBG("set_mark: 0x%02lx", i_value);
+}
+
+///
+/// @brief get_mark
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note FWMS0_MARK: mark (Galois field code)
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_mark( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::FIRMWARE_MS_MARK, TT::FIRMWARE_MS_MARK_LEN>(o_value);
+    FAPI_INF("get_mark: 0x%02lx", o_value);
+}
+
+///
+/// @brief set_type
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note FWMS0_TYPE: mark type
+/// @note Dial enums:
+/// @note SYMBOL=>0b1
+/// @note CHIP=>0b0
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_type( fapi2::buffer<uint64_t>& io_data, const mark_type i_value )
+{
+    io_data.writeBit<TT::FIRMWARE_MS_TYPE>(i_value);
+    FAPI_INF("set_type: 0x%01lx", i_value);
+}
+
+///
+/// @brief get_type
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note FWMS0_TYPE: mark type
+/// @note Dial enums:
+/// @note SYMBOL=>0b1
+/// @note CHIP=>0b0
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_type( const fapi2::buffer<uint64_t>& i_data, mark_type& o_value )
+{
+    o_value = mark_type(i_data.getBit<TT::FIRMWARE_MS_TYPE>());
+    FAPI_INF("get_type: 0x%01lx", o_value);
+}
+
+///
+/// @brief set_region
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note FWMS0_REGION: Selects mark region (address range to which mark applies)
+/// @note Dial enums:
+/// @note DISABLED=>0b000
+/// @note RESERVED=>0b001
+/// @note BANK=>0b010
+/// @note BANKGROUP=>0b011
+/// @note SRANK=>0b100
+/// @note MRANK=>0b101
+/// @note DIMM=>0b110
+/// @note UNIVERSAL=>0b111
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_region( fapi2::buffer<uint64_t>& io_data, const mark_region i_value )
+{
+    io_data.insertFromRight<TT::FIRMWARE_MS_REGION, TT::FIRMWARE_MS_REGION_LEN>(i_value);
+    FAPI_INF("set_region: 0x%02lx", i_value);
+}
+
+///
+/// @brief get_region
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note FWMS0_REGION: Selects mark region (address range to which mark applies)
+/// @note Dial enums:
+/// @note DISABLED=>0b000
+/// @note RESERVED=>0b001
+/// @note BANK=>0b010
+/// @note BANKGROUP=>0b011
+/// @note SRANK=>0b100
+/// @note MRANK=>0b101
+/// @note DIMM=>0b110
+/// @note UNIVERSAL=>0b111
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_region( const fapi2::buffer<uint64_t>& i_data, mark_region& o_value )
+{
+    uint64_t l_temp = 0;
+    i_data.extractToRight<TT::FIRMWARE_MS_REGION, TT::FIRMWARE_MS_REGION_LEN>(l_temp);
+    o_value = mark_region(l_temp);
+    FAPI_INF("get_region: 0x%02lx", o_value);
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    // construct fwms::address from mcbist::address
+    const auto l_addr = address<>(i_address);
+    io_data.insert<TT::FIRMWARE_MS_ADDRESS, TT::FIRMWARE_MS_ADDRESS_LEN, TT::FIRMWARE_MS_ADDRESS>(l_addr);
+    FAPI_INF("set_address: 0x%016lx", uint64_t(l_addr));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    // construct fwms::address from i_data
+    const auto l_addr = address<>(uint64_t(i_data));
+    // construct mcbist::address from fwms::address
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+///
+/// @brief set_exit_1
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_state mss::YES or mss::NO - desired state
+/// @note FWMS0_EXIT_1: When set, bypass-enabled reads using this mark will use exit 1
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_exit_1( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+    io_data.writeBit<TT::FIRMWARE_MS_EXIT1>(i_state);
+    FAPI_INF("set_exit_1: 0x%01lx", i_state);
+}
+
+///
+/// @brief get_exit_1
+/// @tparam T fapi2 Target Type defaults to defaulted port in mc const
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_state mss::YES or mss::NO - representing the state of the field
+/// @note FWMS0_EXIT_1: When set, bypass-enabled reads using this mark will use exit 1
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_exit_1( const fapi2::buffer<uint64_t>& i_data, mss::states& o_state )
+{
+    o_state = (i_data.getBit<TT::FIRMWARE_MS_EXIT1>() == false) ? mss::NO : mss::YES;
+    FAPI_INF("get_exit_1: 0x%01lx", o_state);
+}
+
+} // close namespace fwms
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/galois.H b/src/import/generic/memory/lib/ecc/galois.H
index 951839c7a..b795e9897 100644
--- a/src/import/generic/memory/lib/ecc/galois.H
+++ b/src/import/generic/memory/lib/ecc/galois.H
@@ -22,3 +22,169 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file galois.H
+/// @brief Translate ECC mark Galois codes to symbol and DQ
+///
+// *HWP HWP Owner: Matthew Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: HB:FSP
+
+#ifndef _MSS_ECC_GALOIS_H_
+#define _MSS_ECC_GALOIS_H_
+
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+///
+/// @brief Return symbol value from a given Galois code
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_galois the Galois code
+/// @param[out] o_symbol symbol value represented by given Galois code
+/// @return FAPI2_RC_SUCCESS iff all is ok
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+fapi2::ReturnCode galois_to_symbol( const uint8_t i_galois, uint8_t& o_symbol )
+{
+    const auto& l_p = std::find(TT::symbol2galois, (TT::symbol2galois + TT::ECC_MAX_SYMBOLS), i_galois);
+
+    FAPI_ASSERT( l_p != (TT::symbol2galois + TT::ECC_MAX_SYMBOLS),
+                 fapi2::MSS_INVALID_GALOIS_TO_SYMBOL()
+                 .set_GALOIS(i_galois),
+                 "Invalid Galois code: 0x%02x",
+                 i_galois);
+
+    o_symbol = (l_p - TT::symbol2galois);
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Return Galois code from a given symbol value
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_symbol the symbol value
+/// @param[out] o_galois Galois code represented by given symbol
+/// @return FAPI2_RC_SUCCESS iff all is ok
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+fapi2::ReturnCode symbol_to_galois( const uint8_t i_symbol, uint8_t& o_galois )
+{
+    FAPI_ASSERT( i_symbol < TT::ECC_MAX_SYMBOLS,
+                 fapi2::MSS_INVALID_SYMBOL_FOR_GALOIS()
+                 .set_SYMBOL(i_symbol),
+                 "Invalid symbol: %d",
+                 i_symbol);
+
+    o_galois = TT::symbol2galois[i_symbol];
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Return symbol value from a given DQ index
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_dq the DQ index
+/// @param[out] o_symbol symbol value represented by given DQ index
+/// @return FAPI2_RC_SUCCESS iff all is ok
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+fapi2::ReturnCode dq_to_symbol( const uint8_t i_dq, uint8_t& o_symbol )
+{
+    const auto& l_p = std::find(TT::symbol2dq, (TT::symbol2dq + TT::ECC_MAX_DQ_BITS), i_dq);
+
+    FAPI_ASSERT( l_p != (TT::symbol2dq + TT::ECC_MAX_DQ_BITS),
+                 fapi2::MSS_INVALID_DQ_TO_SYMBOL()
+                 .set_DQ(i_dq),
+                 "Invalid DQ index: %d",
+                 i_dq);
+
+    o_symbol = (l_p - TT::symbol2dq);
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Return DQ index from a given symbol value
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_symbol the symbol value
+/// @param[out] o_dq DQ index represented by given symbol value
+/// @return FAPI2_RC_SUCCESS iff all is ok
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+fapi2::ReturnCode symbol_to_dq( const uint8_t i_symbol, uint8_t& o_dq )
+{
+    FAPI_ASSERT( i_symbol < TT::ECC_MAX_SYMBOLS,
+                 fapi2::MSS_INVALID_SYMBOL_TO_DQ()
+                 .set_SYMBOL(i_symbol),
+                 "symbol_to_dq: invalid symbol: %d",
+                 i_symbol);
+
+    o_dq = TT::symbol2dq[i_symbol];
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Return DQ index from a given Galois code
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_galois the Galois code
+/// @param[out] o_dq DQ index represented by given Galois code
+/// @return FAPI2_RC_SUCCESS iff all is ok
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+fapi2::ReturnCode galois_to_dq( const uint8_t i_galois, uint8_t& o_dq  )
+{
+    uint8_t l_symbol = 0;
+
+    FAPI_TRY( galois_to_symbol<T>(i_galois, l_symbol), "Failed galois_to_symbol");
+    FAPI_TRY( symbol_to_dq<T>(l_symbol, o_dq), "Failed symbol_to_dq" );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Return Galois code from a given DQ index
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_dq the DQ index
+/// @param[out] o_galois Galois code represented by given symbol
+/// @return FAPI2_RC_SUCCESS iff all is ok
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+fapi2::ReturnCode dq_to_galois( const uint8_t i_dq, uint8_t& o_galois )
+{
+    uint8_t l_symbol = 0;
+
+    FAPI_TRY( mss::ecc::dq_to_symbol<T>(i_dq, l_symbol), "Failed dq_to_symbol");
+    FAPI_TRY( mss::ecc::symbol_to_galois<T>(l_symbol, o_galois) , "Failed symbol_to_galois" );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+} // close namespace ecc
+
+} // close namespace mss
+#endif
diff --git a/src/import/generic/memory/lib/ecc/hw_mark_store.H b/src/import/generic/memory/lib/ecc/hw_mark_store.H
index 2200e9aee..bc0ccccb8 100644
--- a/src/import/generic/memory/lib/ecc/hw_mark_store.H
+++ b/src/import/generic/memory/lib/ecc/hw_mark_store.H
@@ -22,3 +22,485 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file hw_mark_store.H
+/// @brief Subroutines for the MC hardware mark store registers
+///
+// *HWP HWP Owner: Matthew Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_HW_MARK_STORE_H_
+#define _MSS_HW_MARK_STORE_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+#include <generic/memory/lib/utils/scom.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace hwms
+{
+
+///
+/// @brief Read Hardware Mark Store (HWMS) register
+/// @tparam R master rank number
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< uint64_t R, fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read_rank( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    static_assert((R < TT::ECC_MAX_MRANK_PER_PORT), "Master rank index failed range check");
+    FAPI_TRY( mss::getScom(i_target, (TT::HARDWARE_MS0_REG + R), o_data) );
+    FAPI_INF("read_rank<%d>: 0x%016lx", R, o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 0 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<0>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 1 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank1( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<1>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 2 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank2( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<2>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 3 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank3( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<3>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 4 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank4( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<4>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 5 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank5( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<5>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 6 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank6( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<6>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) rank 7 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_rank7( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_rank<7>(i_target, o_data) );
+}
+
+///
+/// @brief Read Hardware Mark Store (HWMS) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_rank the master rank index
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target,
+                               const uint64_t i_rank,
+                               fapi2::buffer<uint64_t>& o_data )
+{
+    switch (i_rank)
+    {
+        case(0):
+            return ( read_rank0(i_target, o_data) );
+
+        case(1):
+            return ( read_rank1(i_target, o_data) );
+
+        case(2):
+            return ( read_rank2(i_target, o_data) );
+
+        case(3):
+            return ( read_rank3(i_target, o_data) );
+
+        case(4):
+            return ( read_rank4(i_target, o_data) );
+
+        case(5):
+            return ( read_rank5(i_target, o_data) );
+
+        case(6):
+            return ( read_rank6(i_target, o_data) );
+
+        case(7):
+            return ( read_rank7(i_target, o_data) );
+
+        default:
+            FAPI_ASSERT( false,
+                         fapi2::MSS_INVALID_RANK_PASSED()
+                         .set_RANK(i_rank)
+                         .set_TARGET(i_target)
+                         .set_FUNCTION(HWMS_READ),
+                         "%s Invalid rank passed to fwms::ecc::hwms::read (%d)",
+                         mss::c_str(i_target),
+                         i_rank);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) register
+/// @tparam R master rank number
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< uint64_t R, fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write_rank( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    static_assert((R < TT::ECC_MAX_MRANK_PER_PORT), "Master rank index failed range check");
+    FAPI_TRY( mss::putScom(i_target, (TT::HARDWARE_MS0_REG + R), i_data) );
+    FAPI_INF("write_rank<%d>: 0x%016lx", R, i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 0 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank0( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<0>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 1 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank1( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<1>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 2 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank2( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<2>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 3 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank3( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<3>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 4 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank4( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<4>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 5 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank5( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<5>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 6 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank6( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<6>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) rank 7 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_rank7( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_rank<7>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_rank the master rank index
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target,
+                                const uint64_t i_rank,
+                                const fapi2::buffer<uint64_t>& i_data )
+{
+    switch (i_rank)
+    {
+        case(0):
+            return ( write_rank0(i_target, i_data) );
+
+        case(1):
+            return ( write_rank1(i_target, i_data) );
+
+        case(2):
+            return ( write_rank2(i_target, i_data) );
+
+        case(3):
+            return ( write_rank3(i_target, i_data) );
+
+        case(4):
+            return ( write_rank4(i_target, i_data) );
+
+        case(5):
+            return ( write_rank5(i_target, i_data) );
+
+        case(6):
+            return ( write_rank6(i_target, i_data) );
+
+        case(7):
+            return ( write_rank7(i_target, i_data) );
+
+        default:
+            FAPI_ASSERT( false,
+                         fapi2::MSS_INVALID_RANK_PASSED()
+                         .set_RANK(i_rank)
+                         .set_TARGET(i_target)
+                         .set_FUNCTION(HWMS_WRITE),
+                         "%s Invalid rank passed to fwms::ecc::hwms::write(%d)",
+                         mss::c_str(i_target),
+                         i_rank);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_chipmark
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note HWMS0_CHIPMARK: Hardware chipmark (Galois field code)
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_chipmark( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::HARDWARE_MS_CHIPMARK, TT::HARDWARE_MS_CHIPMARK_LEN>(i_value);
+    FAPI_INF("set_chipmark: 0x%02lx", i_value);
+}
+
+///
+/// @brief get_chipmark
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note HWMS0_CHIPMARK: Hardware chipmark (Galois field code)
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_chipmark( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::HARDWARE_MS_CHIPMARK, TT::HARDWARE_MS_CHIPMARK_LEN>(o_value);
+    FAPI_INF("get_chipmark: 0x%02lx", o_value);
+}
+
+///
+/// @brief set_confirmed
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_state mss::YES or mss::NO - desired state
+/// @note HWMS0_CONFIRMED: chipmark confirmed
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_confirmed( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+    io_data.writeBit<TT::HARDWARE_MS_CONFIRMED>(i_state);
+    FAPI_INF("set_confirmed: 0x%01lx", i_state);
+}
+
+///
+/// @brief get_confirmed
+/// @tparam T fapi2 Target Type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_state mss::YES or mss::NO - representing the state of the field
+/// @note HWMS0_CONFIRMED: chipmark confirmed
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_confirmed( const fapi2::buffer<uint64_t>& i_data, mss::states& o_state )
+{
+    o_state = (i_data.getBit<TT::HARDWARE_MS_CONFIRMED>() == false) ? mss::NO : mss::YES;
+    FAPI_INF("get_confirmed: 0x%01lx", o_state);
+}
+
+///
+/// @brief set_exit_1
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_state mss::YES or mss::NO - desired state
+/// @note HWMS0_EXIT_1: When set, bypass-enabled reads using this mark will
+/// @note use exit 1; otherwise exit 0
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_exit_1( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+    io_data.writeBit<TT::HARDWARE_MS_EXIT1>(i_state);
+    FAPI_INF("set_exit_1: 0x%01lx", i_state);
+}
+
+///
+/// @brief get_exit_1
+/// @tparam T fapi2 Target Type defaults to the default set in mc const file
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_state mss::YES or mss::NO - representing the state of the field
+/// @note HWMS0_EXIT_1: When set, bypass-enabled reads using this mark will
+/// @note use exit 1; otherwise exit 0
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_exit_1( const fapi2::buffer<uint64_t>& i_data, mss::states& o_state )
+{
+    o_state = (i_data.getBit<TT::HARDWARE_MS_EXIT1>() == false) ? mss::NO : mss::YES;
+    FAPI_INF("get_exit_1: 0x%01lx", o_state);
+}
+
+} // close namespace hwms
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mainline_aue_trap.H b/src/import/generic/memory/lib/ecc/mainline_aue_trap.H
index 49a28287f..a69098d7e 100644
--- a/src/import/generic/memory/lib/ecc/mainline_aue_trap.H
+++ b/src/import/generic/memory/lib/ecc/mainline_aue_trap.H
@@ -22,3 +22,110 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_aue_trap.H
+/// @brief Subroutines for the MC mainline aue address trap registers (MBAUER*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_AUE_TRAP_H_
+#define _MSS_MAINLINE_AUE_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_aue_trap
+{
+
+///
+/// @brief Read MBS Mainline AUE Address Trap (MBAUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_AUE_REGS[l_port]), o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline AUE Address Trap (MBAUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_AUE_REGS[l_port]), i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::AUE_ADDR_TRAP, TT::AUE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::AUE_ADDR_TRAP, TT::AUE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+} // close namespace mainline_aue_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mainline_mpe_trap.H b/src/import/generic/memory/lib/ecc/mainline_mpe_trap.H
index c07639036..68fa26001 100644
--- a/src/import/generic/memory/lib/ecc/mainline_mpe_trap.H
+++ b/src/import/generic/memory/lib/ecc/mainline_mpe_trap.H
@@ -22,3 +22,142 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_mpe_trap.H
+/// @brief Subroutines for the MC mainline mpe address trap registers (MBNCER*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_MPE_TRAP_H_
+#define _MSS_MAINLINE_MPE_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_mpe_trap
+{
+
+///
+/// @brief Read MBS Mainline MPE Address Trap (MBMPER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_MPE_REGS[l_port]), o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline MPE Address Trap (MBMPER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_MPE_REGS[l_port]), i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::MPE_ADDR_TRAP, TT::MPE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::MPE_ADDR_TRAP, TT::MPE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+///
+/// @brief set_mpe_on_rce
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_state mss::YES or mss::NO - desired state
+/// @note MBMPER0Q_PORT_0_MAINLINE_MPE_ON_RCE: Indicates whether if this error
+/// @note came on the retry of a UE, RCD, or AUE as part of an RCE
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_mpe_on_rce( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+    io_data.writeBit<TT::MPE_ON_RCE>(i_state);
+    FAPI_INF("set_mpe_on_rce: 0x%01lx", i_state);
+}
+
+///
+/// @brief get_mpe_on_rce
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_state mss::YES or mss::NO - representing the state of the field
+/// @note MBMPER0Q_PORT_0_MAINLINE_MPE_ON_RCE: Indicates whether if this error
+/// @note came on the retry of a UE, RCD, or AUE as part of an RCE
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_mpe_on_rce( const fapi2::buffer<uint64_t>& i_data, mss::states& o_state )
+{
+    o_state = (i_data.getBit<TT::MPE_ON_RCE>() == false) ? mss::NO : mss::YES;
+    FAPI_INF("get_mpe_on_rce: 0x%01lx", o_state);
+}
+
+} // close namespace mainline_mpe_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mainline_nce_trap.H b/src/import/generic/memory/lib/ecc/mainline_nce_trap.H
index cbffeb8e6..b99d4716a 100644
--- a/src/import/generic/memory/lib/ecc/mainline_nce_trap.H
+++ b/src/import/generic/memory/lib/ecc/mainline_nce_trap.H
@@ -22,3 +22,175 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_nce_trap.H
+/// @brief Subroutines for the MC mainline nce address trap registers (MBNCER*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_NCE_TRAP_H_
+#define _MSS_MAINLINE_NCE_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/pos.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_nce_trap
+{
+
+///
+/// @brief Read MBS Mainline NCE Address Trap (MBNCER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_NCE_REGS[l_port]), o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline NCE Address Trap (MBNCER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_NCE_REGS[l_port]), i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::NCE_ADDR_TRAP, TT::NCE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::NCE_ADDR_TRAP, TT::NCE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+///
+/// @brief set_nce_on_rce
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_state mss::YES or mss::NO - desired state
+/// @note MBNCER0Q_PORT_0_MAINLINE_NCE_ON_RCE: Indicates whether if this NCE came on the
+/// @note retry of a UE, RCD, or AUE as part of an RCE
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_nce_on_rce( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+    io_data.writeBit<TT::NCE_ON_RCE>(i_state);
+    FAPI_INF("set_nce_on_rce: 0x%01lx", i_state);
+}
+
+///
+/// @brief get_nce_on_rce
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_state mss::YES or mss::NO - representing the state of the field
+/// @note MBNCER0Q_PORT_0_MAINLINE_NCE_ON_RCE: Indicates whether if this NCE came on the
+/// @note retry of a UE, RCD, or AUE as part of an RCE
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_nce_on_rce( const fapi2::buffer<uint64_t>& i_data, mss::states& o_state )
+{
+    o_state = (i_data.getBit<TT::NCE_ON_RCE>() == false) ? mss::NO : mss::YES;
+    FAPI_INF("get_nce_on_rce: 0x%01lx", o_state);
+}
+
+///
+/// @brief set_nce_is_tce
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_state mss::YES or mss::NO - desired state
+/// @note MBNCER0Q_PORT_0_MAINLINE_NCE_IS_TCE: Indicates if this NCE is actually
+/// @note a two symbol error (TCE)
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_nce_is_tce( fapi2::buffer<uint64_t>& io_data, const mss::states i_state )
+{
+    io_data.writeBit<TT::NCE_IS_TCE>(i_state);
+    FAPI_INF("set_nce_is_tce: 0x%01lx", i_state);
+}
+
+///
+/// @brief get_nce_is_tce
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_state mss::YES or mss::NO - representing the state of the field
+/// @note MBNCER0Q_PORT_0_MAINLINE_NCE_IS_TCE: Indicates if this NCE is actually
+/// @note a two symbol error (TCE)
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_nce_is_tce( const fapi2::buffer<uint64_t>& i_data, mss::states& o_state )
+{
+    o_state = (i_data.getBit<TT::NCE_IS_TCE>() == false) ? mss::NO : mss::YES;
+    FAPI_INF("get_nce_is_tce: 0x%01lx", o_state);
+}
+
+} // close namespace mainline_nce_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mainline_rce_trap.H b/src/import/generic/memory/lib/ecc/mainline_rce_trap.H
index 02afe5b63..747192479 100644
--- a/src/import/generic/memory/lib/ecc/mainline_rce_trap.H
+++ b/src/import/generic/memory/lib/ecc/mainline_rce_trap.H
@@ -22,3 +22,110 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_rce_trap.H
+/// @brief Subroutines for the MC mainline rce address trap registers (MBRCER*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_RCE_TRAP_H_
+#define _MSS_MAINLINE_RCE_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_rce_trap
+{
+
+///
+/// @brief Read MBS Mainline RCE Address Trap (MBRCER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_RCE_REGS[l_port]), o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline RCE Address Trap (MBRCER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_RCE_REGS[l_port]), i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::RCE_ADDR_TRAP, TT::RCE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::RCE_ADDR_TRAP, TT::RCE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+} // close namespace mainline_rce_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mainline_ue_trap.H b/src/import/generic/memory/lib/ecc/mainline_ue_trap.H
index 10da89c18..ed5e46820 100644
--- a/src/import/generic/memory/lib/ecc/mainline_ue_trap.H
+++ b/src/import/generic/memory/lib/ecc/mainline_ue_trap.H
@@ -22,3 +22,110 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_ue_trap.H
+/// @brief Subroutines for the MC mainline ue address trap registers (MBUER*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_UE_TRAP_H_
+#define _MSS_MAINLINE_UE_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_ue_trap
+{
+
+///
+/// @brief Read MBS Mainline UE Address Trap (MBUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_UE_REGS[l_port]), o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline UE Address Trap (MBUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_UE_REGS[l_port]), i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::UE_ADDR_TRAP, TT::UE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::UE_ADDR_TRAP, TT::UE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+} // close namespace mainline_ue_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/maint_current_trap.H b/src/import/generic/memory/lib/ecc/maint_current_trap.H
index fd3b7de8e..a5e25297f 100644
--- a/src/import/generic/memory/lib/ecc/maint_current_trap.H
+++ b/src/import/generic/memory/lib/ecc/maint_current_trap.H
@@ -22,3 +22,173 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file maint_current_trap.H
+/// @brief Subroutines for the MC maint current address trap register (MCBMCATQ)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINT_CURRENT_TRAP_H_
+#define _MSS_MAINT_CURRENT_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace maint_current_trap
+{
+
+///
+/// @brief Read MBS Mainline MPE Address Trap (MCBMCATQ) register
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mem port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<DEFAULT_MEM_PORT_TARGET>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<T>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, TT::MPE_ADDR_TRAP_REG, o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline MPE Address Trap (MCBMCATQ) register
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mem port
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<DEFAULT_MEM_PORT_TARGET>& i_target,
+                                const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<T>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, TT::MPE_ADDR_TRAP_REG, i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::CURRENT_ADDR_TRAP, TT::CURRENT_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::CURRENT_ADDR_TRAP, TT::CURRENT_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+///
+/// @brief set_port
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value - desired value
+/// @note MCBMCATQ_CFG_CURRENT_PORT_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store port. This field is ONLY valid in maint_addr_mode. Garabage otherwise.
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_port( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::CURRENT_PORT, TT::CURRENT_PORT_LEN>(i_value);
+    FAPI_INF("set_port: 0x%01lx", i_value);
+}
+
+///
+/// @brief get_port
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value - representing the field value
+/// @note MCBMCATQ_CFG_CURRENT_PORT_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store port. This field is ONLY valid in maint_addr_mode. Garabage otherwise.
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_port( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::CURRENT_PORT, TT::CURRENT_PORT_LEN>(o_value);
+    FAPI_INF("get_port: 0x%01lx", o_value);
+}
+
+///
+/// @brief set_dimm
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value - desired value
+/// @note MCBMCATQ_CFG_CURRENT_DIMM_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store dimm select.
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_dimm( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.writeBit<TT::CURRENT_DIMM>(i_value);
+    FAPI_INF("set_dimm: 0x%01lx", i_value);
+}
+
+///
+/// @brief get_dimm
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value - representing the field value
+/// @note MCBMCATQ_CFG_CURRENT_DIMM_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store dimm select.
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_dimm( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    o_value = i_data.getBit<TT::CURRENT_DIMM>();
+    FAPI_INF("get_dimm: 0x%01lx", o_value);
+}
+
+} // close namespace maint_current_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mark_shadow_reg.H b/src/import/generic/memory/lib/ecc/mark_shadow_reg.H
index d2e0d92c3..65bd7dca2 100644
--- a/src/import/generic/memory/lib/ecc/mark_shadow_reg.H
+++ b/src/import/generic/memory/lib/ecc/mark_shadow_reg.H
@@ -22,3 +22,129 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mark_shadow_reg.H
+/// @brief Subroutines for the MC mark shadow registers (MSR)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MARK_SHADOW_REG_H_
+#define _MSS_MARK_SHADOW_REG_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mark_shadow_reg
+{
+
+///
+/// @brief Read Mark Shadow register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::MARK_SHADOW_REG, o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write Mark Shadow register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::MARK_SHADOW_REG, i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_chipmark
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_chipmark( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SHADOW_CHIPMARK, TT::SHADOW_CHIPMARK_LEN>(i_value);
+    FAPI_INF("set_chipmark: 0x%016lx", i_value);
+}
+
+///
+/// @brief get_chipmark
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_chipmark( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SHADOW_CHIPMARK, TT::SHADOW_CHIPMARK_LEN>(o_value);
+    FAPI_INF("get_chipmark: 0x%016lx", o_value);
+}
+
+///
+/// @brief set_rank
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_rank( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SHADOW_RANK, TT::SHADOW_RANK_LEN>(i_value);
+    FAPI_INF("set_rank: 0x%016lx", i_value);
+}
+
+///
+/// @brief get_rank
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MEM_PORT_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+///
+template< fapi2::TargetType T = DEFAULT_MEM_PORT_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_rank( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SHADOW_RANK, TT::SHADOW_RANK_LEN>(o_value);
+    FAPI_INF("get_rank: 0x%016lx", o_value);
+}
+
+} // close namespace mark_shadow_reg
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/mbs_error_vector_trap.H b/src/import/generic/memory/lib/ecc/mbs_error_vector_trap.H
index 529491723..302ab3fbf 100644
--- a/src/import/generic/memory/lib/ecc/mbs_error_vector_trap.H
+++ b/src/import/generic/memory/lib/ecc/mbs_error_vector_trap.H
@@ -22,3 +22,182 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mbs_error_vector_trap.H
+/// @brief Subroutines for the MC MBS error vector trap registers (MBSEVR*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MBS_ERROR_VECTOR_TRAP_H_
+#define _MSS_MBS_ERROR_VECTOR_TRAP_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mbs_error_vector_trap
+{
+
+///
+/// @brief Read MBS Error Vector Trap (MBSEVR*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::ERROR_VECTOR_REGS[l_port]), o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Error Vector Trap (MBSEVR*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<DEFAULT_MC_TARGET>(i_target);
+    const auto& l_port = mss::relative_pos<DEFAULT_MC_TARGET>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::ERROR_VECTOR_REGS[l_port]), i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_nce_galois
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void set_nce_galois( const fapi2::Target<T>& i_target,
+                     fapi2::buffer<uint64_t>& io_data,
+                     const uint64_t i_value);
+///
+/// @brief get_nce_galois
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the register value
+/// @param[out] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void get_nce_galois( const fapi2::Target<T>& i_target,
+                     const fapi2::buffer<uint64_t>& i_data,
+                     uint64_t& o_value);
+
+///
+/// @brief set_nce_magnitude
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void set_nce_magnitude( const fapi2::Target<T>& i_target,
+                        fapi2::buffer<uint64_t>& io_data,
+                        const uint64_t i_value);
+
+///
+/// @brief get_nce_magnitude
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the register value
+/// @param[out] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void get_nce_magnitude( const fapi2::Target<T>& i_target,
+                        const fapi2::buffer<uint64_t>& i_data,
+                        uint64_t& o_value);
+
+///
+/// @brief set_tce_galois
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void set_tce_galois( const fapi2::Target<T>& i_target,
+                     fapi2::buffer<uint64_t>& io_data,
+                     const uint64_t i_value);
+
+///
+/// @brief get_tce_galois
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the register value
+/// @param[out] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void get_tce_galois( const fapi2::Target<T>& i_target,
+                     const fapi2::buffer<uint64_t>& i_data,
+                     uint64_t& o_value);
+
+///
+/// @brief set_tce_magnitude
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void set_tce_magnitude( const fapi2::Target<T>& i_target,
+                        fapi2::buffer<uint64_t>& io_data,
+                        const uint64_t i_value);
+
+///
+/// @brief get_tce_magnitude
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the register value
+/// @param[out] i_value the value of the field
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+void get_tce_magnitude( const fapi2::Target<T>& i_target,
+                        const fapi2::buffer<uint64_t>& i_data,
+                        uint64_t& o_value);
+
+} // close namespace mbs_error_vector_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/modal_symbol_count.H b/src/import/generic/memory/lib/ecc/modal_symbol_count.H
index 1cca236c2..8a4c7a921 100644
--- a/src/import/generic/memory/lib/ecc/modal_symbol_count.H
+++ b/src/import/generic/memory/lib/ecc/modal_symbol_count.H
@@ -22,3 +22,552 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file modal_symbol_count.H
+/// @brief Subroutines for the MC modal symbol count (MBSSYMEC*Q) registers
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MODAL_SYMBOL_COUNT_H_
+#define _MSS_MODAL_SYMBOL_COUNT_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace modal_symbol_count
+{
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) register
+/// @tparam N the register index (0-8)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< uint64_t N, fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read_index( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    static_assert((N < TT::NUM_MBSSYM_REGS), "Modal symbol count reg index failed range check");
+    FAPI_TRY( mss::getScom(i_target, (TT::MODAL_SYM_COUNT0_REG + N), o_data) );
+    FAPI_INF("read_index<%d>: 0x%016lx", N, o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 0 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<0>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 1 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index1( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<1>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 2 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index2( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<2>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 3 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index3( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<3>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 4 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index4( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<4>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 5 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index5( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<5>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 6 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index6( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<6>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 7 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index7( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<7>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) 8 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read_index8( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    return ( read_index<8>(i_target, o_data) );
+}
+
+///
+/// @brief Read modal symbol count (MBSSYMEC*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_index the register index
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target,
+                               const uint64_t i_index,
+                               fapi2::buffer<uint64_t>& o_data )
+{
+    switch (i_index)
+    {
+        case(0):
+            return ( read_index0(i_target, o_data) );
+
+        case(1):
+            return ( read_index1(i_target, o_data) );
+
+        case(2):
+            return ( read_index2(i_target, o_data) );
+
+        case(3):
+            return ( read_index3(i_target, o_data) );
+
+        case(4):
+            return ( read_index4(i_target, o_data) );
+
+        case(5):
+            return ( read_index5(i_target, o_data) );
+
+        case(6):
+            return ( read_index6(i_target, o_data) );
+
+        case(7):
+            return ( read_index7(i_target, o_data) );
+
+        case(8):
+            return ( read_index8(i_target, o_data) );
+
+        default:
+            FAPI_ASSERT( false,
+                         fapi2::MSS_INVALID_INDEX_PASSED()
+                         .set_INDEX(i_index)
+                         .set_FUNCTION(SYMBOL_COUNT_READ),
+                         "%s Invalid index passed to fwms::ecc::modal_symbol_count::read (%d)",
+                         mss::c_str(i_target),
+                         i_index);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write  modal symbol count (MBSSYMEC*Q) register
+/// @tparam N the register index (0-8)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< uint64_t N, fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write_index( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    static_assert((N < TT::NUM_MBSSYM_REGS), "Modal symbol count reg index failed range check");
+    FAPI_TRY( mss::putScom(i_target, (TT::MODAL_SYM_COUNT0_REG + N), i_data) );
+    FAPI_INF("write_index<%d>: 0x%016lx", N, i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 0 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index0( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<0>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 1 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index1( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<1>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 2 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index2( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<2>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 3 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index3( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<3>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 4 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index4( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<4>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 5 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index5( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<5>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 6 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index6( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<6>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 7 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index7( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<7>(i_target, i_data) );
+}
+
+///
+/// @brief Write modal symbol count (MBSSYMEC*Q) 8 register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write_index8( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    return ( write_index<8>(i_target, i_data) );
+}
+
+///
+/// @brief Write Hardware Mark Store (HWMS) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_index the register index
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target,
+                                const uint64_t i_index,
+                                const fapi2::buffer<uint64_t>& i_data )
+{
+    switch (i_index)
+    {
+        case(0):
+            return ( write_index0(i_target, i_data) );
+
+        case(1):
+            return ( write_index1(i_target, i_data) );
+
+        case(2):
+            return ( write_index2(i_target, i_data) );
+
+        case(3):
+            return ( write_index3(i_target, i_data) );
+
+        case(4):
+            return ( write_index4(i_target, i_data) );
+
+        case(5):
+            return ( write_index5(i_target, i_data) );
+
+        case(6):
+            return ( write_index6(i_target, i_data) );
+
+        case(7):
+            return ( write_index7(i_target, i_data) );
+
+        case(8):
+            return ( write_index8(i_target, i_data) );
+
+        default:
+            FAPI_ASSERT( false,
+                         fapi2::MSS_INVALID_INDEX_PASSED()
+                         .set_INDEX(i_index)
+                         .set_FUNCTION(SYMBOL_COUNT_WRITE),
+                         "%s Invalid index passed to fwms::ecc::modal_symbol_count::write (%d)",
+                         mss::c_str(i_target),
+                         i_index);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_index the counter index
+/// @param[in] i_value the value of the field
+/// @note MBSSYMEC*Q_MODAL_SYMBOL_COUNTER_XX: Functional mode determined by MBSTRQ_Symbol_counter_mode:
+/// @note if 00, 0:7 = Maint NCE counter for Symbol XX if 01, 0:3 = MCBIST error counter for nibble (XX/4)
+/// @note and rank (XX%4)*2 4:7 = MCBIST error counter for nibble (XX/4) and rank ((XX%4)*2)+1 if 10,
+/// @note 0:3 = MCBIST error counter for port XX/18 and nibble XX%18 4:7 = MCBIST error rank map for
+/// @note port XX/18 and nibble XX%18
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_index, const uint64_t i_value )
+{
+    static_assert ( TT::MODAL_SYMBOL_COUNTERS_PER_REG  <= 8,
+                    "mss::ecc_count::modal_symbol_count: Modal symbol count field index failed range check" );
+    const uint64_t l_field = i_index % TT::MODAL_SYMBOL_COUNTERS_PER_REG;
+
+    switch (l_field)
+    {
+        case 0:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_00, TT::MODAL_SYMBOL_COUNTER_00_LEN>(i_value);
+            break;
+
+        case 1:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_01, TT::MODAL_SYMBOL_COUNTER_01_LEN>(i_value);
+            break;
+
+        case 2:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_02, TT::MODAL_SYMBOL_COUNTER_02_LEN>(i_value);
+            break;
+
+        case 3:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_03, TT::MODAL_SYMBOL_COUNTER_03_LEN>(i_value);
+            break;
+
+        case 4:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_04, TT::MODAL_SYMBOL_COUNTER_04_LEN>(i_value);
+            break;
+
+        case 5:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_05, TT::MODAL_SYMBOL_COUNTER_05_LEN>(i_value);
+            break;
+
+        case 6:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_06, TT::MODAL_SYMBOL_COUNTER_06_LEN>(i_value);
+            break;
+
+        case 7:
+            io_data.insertFromRight<TT::MODAL_SYMBOL_COUNTER_07, TT::MODAL_SYMBOL_COUNTER_07_LEN>(i_value);
+            break;
+
+        default:
+            // Shouldn't happen due to modulo above, but here just in case - JLH
+            FAPI_ERR("Modal symbol count field index failed range check");
+            fapi2::Assert(false);
+            break;
+    }
+
+    FAPI_INF("set_count(%d): 0x%02lx", l_field, i_value);
+}
+
+///
+/// @brief get_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[in] i_index the counter index
+/// @param[out] o_value the value of the field
+/// @note MBSSYMEC*Q_MODAL_SYMBOL_COUNTER_XX: Functional mode determined by MBSTRQ_Symbol_counter_mode:
+/// @note if 00, 0:7 = Maint NCE counter for Symbol XX if 01, 0:3 = MCBIST error counter for nibble (XX/4)
+/// @note and rank (XX%4)*2 4:7 = MCBIST error counter for nibble (XX/4) and rank ((XX%4)*2)+1 if 10,
+/// @note 0:3 = MCBIST error counter for port XX/18 and nibble XX%18 4:7 = MCBIST error rank map for
+/// @note port XX/18 and nibble XX%18
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_count( const fapi2::buffer<uint64_t>& i_data, const uint64_t i_index, uint64_t& o_value )
+{
+    const uint64_t l_field = i_index % TT::MODAL_SYMBOL_COUNTERS_PER_REG;
+    static_assert ( TT::MODAL_SYMBOL_COUNTERS_PER_REG  <= 8,
+                    "mss::ecc_count::get_count: Modal symbol count field index failed range check" );
+
+    switch (l_field)
+    {
+        case 0:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_00, TT::MODAL_SYMBOL_COUNTER_00_LEN>(o_value);
+            break;
+
+        case 1:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_01, TT::MODAL_SYMBOL_COUNTER_01_LEN>(o_value);
+            break;
+
+        case 2:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_02, TT::MODAL_SYMBOL_COUNTER_02_LEN>(o_value);
+            break;
+
+        case 3:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_03, TT::MODAL_SYMBOL_COUNTER_03_LEN>(o_value);
+            break;
+
+        case 4:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_04, TT::MODAL_SYMBOL_COUNTER_04_LEN>(o_value);
+            break;
+
+        case 5:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_05, TT::MODAL_SYMBOL_COUNTER_05_LEN>(o_value);
+            break;
+
+        case 6:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_06, TT::MODAL_SYMBOL_COUNTER_06_LEN>(o_value);
+            break;
+
+        case 7:
+            i_data.extractToRight<TT::MODAL_SYMBOL_COUNTER_07, TT::MODAL_SYMBOL_COUNTER_07_LEN>(o_value);
+            break;
+
+        default:
+            // shouldn't happen due to modulo above, but here just in case
+            FAPI_ERR("Modal symbol count field index failed range check");
+            fapi2::Assert(false);
+            break;
+    }
+
+    FAPI_INF("get_count(%d): 0x%02lx", l_field, o_value);
+}
+
+} // close namespace modal_symbol_count
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/ecc/read_error_count_regs.H b/src/import/generic/memory/lib/ecc/read_error_count_regs.H
index 78b0d7b31..352f28795 100644
--- a/src/import/generic/memory/lib/ecc/read_error_count_regs.H
+++ b/src/import/generic/memory/lib/ecc/read_error_count_regs.H
@@ -22,3 +22,628 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_ue_trap.H
+/// @brief Subroutines for the MBS Memory Scrub/Read Error Count registers (MBSEC*Q)
+///
+// *HWP HWP Owner: Matt Hickman <Matthew.Hickman@ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_READ_ERROR_COUNT_REGS_H_
+#define _MSS_READ_ERROR_COUNT_REGS_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H>
+#include <generic/memory/lib/utils/scom.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace read_error_count_reg0
+{
+
+///
+/// @brief Read MBS Memory Scrub/Read Error Count Register 0 (MBSEC0Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::READ_ERROR_COUNT_REG0, o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Memory Scrub/Read Error Count Register 0 (MBSEC0Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::READ_ERROR_COUNT_REG0, i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_intermittent_ce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_CE_COUNT: Intermittent CE Count This is a 12-bit count of
+/// @note intermittent CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_intermittent_ce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::INTERMITTENT_CE_COUNT, TT::INTERMITTENT_CE_COUNT_LEN>(i_value);
+    FAPI_INF("set_intermittent_ce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_intermittent_ce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_CE_COUNT: Intermittent CE Count This is a 12-bit count of
+/// @note intermittent CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_intermittent_ce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::INTERMITTENT_CE_COUNT, TT::INTERMITTENT_CE_COUNT_LEN>(o_value);
+    FAPI_INF("get_intermittent_ce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_soft_ce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_SOFT_CE_COUNT: Soft CE Count This is a 12-bit count of
+/// @note soft CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_soft_ce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SOFT_CE_COUNT, TT::SOFT_CE_COUNT_LEN>(i_value);
+    FAPI_INF("set_soft_ce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_soft_ce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_SOFT_CE_COUNT: Soft CE Count This is a 12-bit count of
+/// @note soft CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_soft_ce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SOFT_CE_COUNT, TT::SOFT_CE_COUNT_LEN>(o_value);
+    FAPI_INF("get_soft_ce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_hard_ce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_HARD_CE_COUNT: Hard CE Count This is a 12-bit count of
+/// @note hard CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_hard_ce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::HARD_CE_COUNT, TT::HARD_CE_COUNT_LEN>(i_value);
+    FAPI_INF("set_hard_ce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_hard_ce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_HARD_CE_COUNT: Hard CE Count This is a 12-bit count of
+/// @note hard CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_hard_ce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::HARD_CE_COUNT, TT::HARD_CE_COUNT_LEN>(o_value);
+    FAPI_INF("get_hard_ce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_intermittent_mce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_MCE_COUNT: Intermittent MCE Count This is a 12-bit count of
+/// @note intermittent Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_intermittent_mce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::INTERMITTENT_MCE_COUNT, TT::INTERMITTENT_MCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_intermittent_mce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_intermittent_mce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_MCE_COUNT: Intermittent MCE Count This is a 12-bit count of
+/// @note intermittent Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_intermittent_mce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::INTERMITTENT_MCE_COUNT, TT::INTERMITTENT_MCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_intermittent_mce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_soft_mce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_SOFT_MCE_COUNT: Soft MCE Count This is a 12-bit count of
+/// @note soft Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_soft_mce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SOFT_MCE_COUNT, TT::SOFT_MCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_soft_mce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_soft_mce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_SOFT_MCE_COUNT: Soft MCE Count This is a 12-bit count of
+/// @note soft Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_soft_mce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SOFT_MCE_COUNT, TT::SOFT_MCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_soft_mce_count: 0x%03lx", o_value);
+}
+
+} // close namespace read_error_count_reg0
+
+namespace read_error_count_reg1
+{
+
+///
+/// @brief Read MBS Memory Scrub/Read Error Count Register 1 (MBSEC1Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::READ_ERROR_COUNT_REG1, o_data) );
+    FAPI_INF("%s read: 0x%016lx", mss::c_str(i_target), o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Memory Scrub/Read Error Count Register 1 (MBSEC1Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::READ_ERROR_COUNT_REG1, i_data) );
+    FAPI_INF("%s write: 0x%016lx", mss::c_str(i_target), i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_hard_mce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_HARD_MCE_COUNT: Hard MCE Count This is a 12-bit count of
+/// @note hard Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_hard_mce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::HARD_MCE_COUNT, TT::HARD_MCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_hard_mce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_hard_mce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_HARD_MCE_COUNT: Hard MCE Count This is a 12-bit count of
+/// @note hard Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_hard_mce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::HARD_MCE_COUNT, TT::HARD_MCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_hard_mce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_ice_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_ICE_COUNT: ICE (IMPE) Count This is a 12-bit count of
+/// @note Intermittent Marked-Placed Chip Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_ice_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::ICE_COUNT, TT::ICE_COUNT_LEN>(i_value);
+    FAPI_INF("set_ice_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_ice_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_ICE_COUNT: ICE (IMPE) Count This is a 12-bit count of
+/// @note Intermittent Marked-Placed Chip Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_ice_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::ICE_COUNT, TT::ICE_COUNT_LEN>(o_value);
+    FAPI_INF("get_ice_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_ue_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_UE_COUNT: UE Count This is a 12-bit count of
+/// @note Uncorrectable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_ue_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::UE_COUNT, TT::UE_COUNT_LEN>(i_value);
+    FAPI_INF("set_ue_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_ue_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_UE_COUNT: UE Count This is a 12-bit count of
+/// @note Uncorrectable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_ue_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::UE_COUNT, TT::UE_COUNT_LEN>(o_value);
+    FAPI_INF("get_ue_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_aue_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_AUE_COUNT: AUE Count This is a 12-bit count of
+/// @note AUE Parity Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_aue_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::AUE_COUNT, TT::AUE_COUNT_LEN>(i_value);
+    FAPI_INF("set_aue_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_aue_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_AUE_COUNT: AUE Count This is a 12-bit count of
+/// @note AUE Parity Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_aue_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::AUE_COUNT, TT::AUE_COUNT_LEN>(o_value);
+    FAPI_INF("get_aue_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_rce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_RCE_COUNT: RCE Count This is a 12-bit count of
+/// @note Retried Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_rce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::RCE_COUNT, TT::RCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_rce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_rce_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_RCE_COUNT: RCE Count This is a 12-bit count of
+/// @note Retried Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_rce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::RCE_COUNT, TT::RCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_rce_count: 0x%03lx", o_value);
+}
+
+} // close namespace read_error_count_reg1
+
+namespace mark_symbol_count_reg
+{
+
+///
+/// @brief Read MBS Mark Symbol Error Count Register (MBSMSECQ)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::MARK_SYMBOL_COUNT_REG, o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mark Symbol Error Count Register (MBSMSECQ)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::MARK_SYMBOL_COUNT_REG, i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_symbol0_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL0_COUNT: MCE Symbol 0 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 0 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_symbol0_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL0_COUNT, TT::SYMBOL0_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol0_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol0_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL0_COUNT: MCE Symbol 0 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 0 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_symbol0_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL0_COUNT, TT::SYMBOL0_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol0_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_symbol1_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL1_COUNT: MCE Symbol 1 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 1 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_symbol1_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL1_COUNT, TT::SYMBOL1_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol1_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol1_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL1_COUNT: MCE Symbol 1 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 1 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_symbol1_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL1_COUNT, TT::SYMBOL1_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol1_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_symbol2_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL2_COUNT: MCE Symbol 2 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 2 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_symbol2_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL2_COUNT, TT::SYMBOL2_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol2_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol2_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL2_COUNT: MCE Symbol 2 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 2 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_symbol2_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL2_COUNT, TT::SYMBOL2_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol2_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_symbol3_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL3_COUNT: MCE Symbol 3 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 3 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void set_symbol3_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL3_COUNT, TT::SYMBOL3_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol3_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol3_count
+/// @tparam T fapi2 Target Type defaults to DEFAULT_MC_TARGET
+/// @tparam TT traits type defaults to eccTraits<DEFAULT_MC_TYPE, T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL3_COUNT: MCE Symbol 3 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 3 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = DEFAULT_MC_TARGET, typename TT = eccTraits<DEFAULT_MC_TYPE, T> >
+inline void get_symbol3_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL3_COUNT, TT::SYMBOL3_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol3_count: 0x%03lx", o_value);
+}
+
+} // close namespace mark_symbol_count_reg
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H b/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H
index b87cacba1..2e7c21455 100644
--- a/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H
+++ b/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist_address.H
@@ -38,7 +38,7 @@
 
 #include <fapi2.H>
 #include <utility>
-
+#include <generic/memory/lib/ecc/ecc_traits.H>
 
 namespace mss
 {
@@ -73,7 +73,7 @@ namespace ecc
 /// @tparam TT traits type defaults to eccTraits<T>
 ///
 // See declaration below
-template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T = mss::mcbistMCTraits<MC>::FWMS_ADDR_TARGET_TYPE, typename TT = mss::eccTraits<T> >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T = mss::mcbistMCTraits<MC>::FWMS_ADDR_TARGET_TYPE, typename TT = mss::eccTraits<MC, T> >
 class trap_address;
 
 namespace fwms
@@ -84,7 +84,7 @@ namespace fwms
 /// @brief Converts Firmware Mark Store ADDRESS field into mcbist::address
 /// @tparam MC the mc type of the T
 /// @tparam T fapi2 Target Type defaults to fapi2::TARGET_TYPE_MCA or TARGET_TYPE_MEM_PORT
-/// @tparam TT traits type defaults to eccTraits<T>
+/// @tparam TT traits type defaults to eccTraits<MC, T>
 /// @note template argument defaults are in forward declaration in lib/mcbist/address.H
 /// @note 12 = dimm
 /// @note 13:14 = mrank
@@ -93,7 +93,7 @@ namespace fwms
 /// @note 20:22 = bank
 ///
 // See declaration below
-template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T = mss::mcbistMCTraits<MC>::FWMS_ADDR_TARGET_TYPE, typename TT = mss::eccTraits<T> >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T = mss::mcbistMCTraits<MC>::FWMS_ADDR_TARGET_TYPE, typename TT = mss::eccTraits<MC, T> >
 class address;
 
 } // close namespace fwms
diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
index dd56562a4..09182bb70 100644
--- a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
+++ b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
@@ -229,6 +229,18 @@ enum generic_ffdc_codes
     POWER_LIMIT = 0x1072,
     SLOPE = 0x1073,
     INTERCEPT = 0x1074,
+
+    // Used in fw_mark_store.H for MSS_INVALID_RANK_PASSED
+    FWMS_READ = 30,
+    FWMS_WRITE = 31,
+
+    // Used in hw_mark_store.H for MSS_INVALID_RANK_PASSED
+    HWMS_READ = 40,
+    HWMS_WRITE = 41,
+
+    // MSS_INVALID_INDEX_PASSED
+    SYMBOL_COUNT_READ = 50,
+    SYMBOL_COUNT_WRITE = 51,
 };
 
 ///
diff --git a/src/import/generic/procedures/xml/error_info/generic_error.xml b/src/import/generic/procedures/xml/error_info/generic_error.xml
index af5fb64f0..a3f26ca8d 100644
--- a/src/import/generic/procedures/xml/error_info/generic_error.xml
+++ b/src/import/generic/procedures/xml/error_info/generic_error.xml
@@ -1061,4 +1061,67 @@
     <ffdc>RANK</ffdc>
   </hwpError>
 
+  <hwpError>
+    <rc>RC_MSS_INVALID_GALOIS_TO_SYMBOL</rc>
+    <description> An invalid galois code was found</description>
+    <ffdc>GALOIS</ffdc>
+    <callout>
+        <procedure>CODE</procedure>
+        <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_MSS_INVALID_SYMBOL_FOR_GALOIS</rc>
+    <description> An invalid symbol was passed to symbol_to_galois</description>
+    <ffdc>SYMBOL</ffdc>
+    <callout>
+        <procedure>CODE</procedure>
+        <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+      <rc>RC_MSS_INVALID_DQ_TO_SYMBOL</rc>
+    <description> An invalid DQ bit index received to map to Galois symbol</description>
+    <ffdc>DQ</ffdc>
+    <callout>
+        <procedure>CODE</procedure>
+        <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+      <rc>RC_MSS_INVALID_SYMBOL_TO_DQ</rc>
+    <description> An invalid symbol received to map to DQ bit index</description>
+    <ffdc>SYMBOL</ffdc>
+    <callout>
+        <procedure>CODE</procedure>
+        <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_MSS_INVALID_RANK_PASSED</rc>
+    <description> An invalid rank was passed to ecc::read function</description>
+    <ffdc>RANK</ffdc>
+    <ffdc>FUNCTION</ffdc>
+    <ffdc>TARGET</ffdc>
+    <callout>
+        <procedure>CODE</procedure>
+        <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_MSS_INVALID_INDEX_PASSED</rc>
+    <description> An invalid index was passed to MODAL_SYMBOL_COUNT function</description>
+    <ffdc>INDEX</ffdc>
+    <ffdc>FUNCTION</ffdc>
+    <callout>
+        <procedure>CODE</procedure>
+        <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
 </hwpErrors>