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| author | Sharath Manjunath <shamanj4@in.ibm.com> | 2018-11-28 11:47:12 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-03-07 09:19:04 -0600 |
| commit | bdaa5b1d2af3fbfc4bb222ef1d837966615593c3 (patch) | |
| tree | a7343d89a840611bf31d1af33a356dc1d152d1e2 /src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml | |
| parent | e7f0582196fbc0de65da15b7bf7371973e37f01f (diff) | |
| download | talos-hostboot-bdaa5b1d2af3fbfc4bb222ef1d837966615593c3.tar.gz talos-hostboot-bdaa5b1d2af3fbfc4bb222ef1d837966615593c3.zip | |
Update exp_draminit to read values from attributes
Change-Id: Ie2e72c0bff21c3a27a37708b3bd06a940a2c29e9
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69194
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69982
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml')
| -rw-r--r-- | src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml | 58 |
1 files changed, 57 insertions, 1 deletions
diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml index c94dc98fe..b34019c60 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml @@ -172,7 +172,7 @@ <valueType>uint8</valueType> <writeable/> <array>2</array> - <mssAccessorName>dram_columns_bits</mssAccessorName> + <mssAccessorName>dram_column_bits</mssAccessorName> </attribute> <attribute> @@ -787,4 +787,60 @@ <mssAccessorName>volt_vpp</mssAccessorName> </attribute> + <attribute> + <id>ATTR_MEM_EFF_MRAM_SUPPORT</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + Supports MRAM or not + </description> + <valueType>uint8</valueType> + <initToZero></initToZero> + <enum>NORMAL = 0, EVERSPIN = 1</enum> + <writeable/> + <mssAccessorName>mram_support</mssAccessorName> + </attribute> + + <attribute> + <id>ATTR_MEM_EFF_3DS_HEIGHT</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + ARRAY[DIMM] + Primary SDRAM Package Type. + Decodes Byte 6. + This byte defines the primary set of SDRAMs. + Monolithic = SPD, Multi-load stack = DDP/QDP, Single-load stack = 3DS + </description> + <valueType>uint8</valueType> + <initToZero></initToZero> + <enum>PLANAR = 0, H2 = 2, H4 = 4, H8 = 8</enum> + <writeable/> + <mssAccessorName>3ds_height</mssAccessorName> + </attribute> + +<attribute> + <id>ATTR_MEM_EFF_DDP_COMPATIBLE</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + DDP Compatibility + </description> + <valueType>uint8</valueType> + <initToZero></initToZero> + <enum>DISABLE = 0, ENABLE = 1</enum> + <writeable/> + <mssAccessorName>ddp_compatibility</mssAccessorName> + </attribute> + +<attribute> + <id>ATTR_MEM_EFF_TSV8H_SUPPORT</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + TSVH8 Support + </description> + <valueType>uint8</valueType> + <initToZero></initToZero> + <enum>DISABLE = 0, ENABLE = 1</enum> + <writeable/> + <mssAccessorName>tsv8h_support</mssAccessorName> + </attribute> + </attributes> |
