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author | Stephen Glancy <sglancy@us.ibm.com> | 2019-07-24 09:33:33 -0400 |
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committer | Christian R Geddes <crgeddes@us.ibm.com> | 2019-07-30 11:37:13 -0500 |
commit | 1552e3875f35b41928ffb6c63578c561c8324493 (patch) | |
tree | ea67e161b7d6a07c84627cd5b1fc3797f66d2937 /src/import/generic/memory | |
parent | 60d3cb8b4d2a34357c192b0f64c2907e7b2e8e68 (diff) | |
download | talos-hostboot-1552e3875f35b41928ffb6c63578c561c8324493.tar.gz talos-hostboot-1552e3875f35b41928ffb6c63578c561c8324493.zip |
Adds MCBIST beat/byte signature data patterns
Change-Id: I2725cee14d7d52efa84c228f0f454be4e3f6af88
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80895
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81147
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/generic/memory')
-rw-r--r-- | src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H b/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H index 03966e570..f18aacccf 100644 --- a/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H +++ b/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H @@ -2867,7 +2867,17 @@ inline fapi2::ReturnCode load_pattern( const fapi2::Target<T>& i_target, const p { uint64_t l_address = TT::PATTERN0_REG; - // TODO RTC:155561 Add random pattern support. + // Checks that the pattern is of the expected length, if not, error out + // Creates helpers for FAPI_ASSERT + const auto EXPECTED_SIZE = TT::EXPECTED_PATTERN_SIZE; + const auto ACTUAL_SIZE = i_pattern.size(); + FAPI_ASSERT(EXPECTED_SIZE == ACTUAL_SIZE, + fapi2::MSS_MCBIST_INCORRECT_PATTERN_LENGTH() + .set_TARGET(i_target) + .set_EXPECTED(EXPECTED_SIZE) + .set_ACTUAL(ACTUAL_SIZE), + "%s pattern expected size %u != actual size %u", + mss::c_str(i_target), EXPECTED_SIZE, ACTUAL_SIZE); // TK: algorithm for patterns which include ECC bits in them // Loop over the cache lines in the pattern. We write one half of the cache line @@ -3296,9 +3306,6 @@ fapi_try_exit: template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T> > inline fapi2::ReturnCode load_data_config( const fapi2::Target<T>& i_target, const mcbist::program<MC>& i_program ) { - uint64_t l_data_rotate_cnfg_addr = TT::DATA_ROTATE_CNFG_REG; - uint64_t l_data_rotate_seed_addr = TT::DATA_ROTATE_SEED_REG; - // First load the data pattern registers FAPI_INF("Loading the data pattern seeds for %s!", mss::c_str(i_target)); FAPI_TRY( mss::mcbist::load_pattern(i_target, i_program.iv_pattern) ); @@ -3316,8 +3323,8 @@ inline fapi2::ReturnCode load_data_config( const fapi2::Target<T>& i_target, con FAPI_TRY( mss::mcbist::load_maint_pattern(i_target, i_program.iv_pattern) ); FAPI_INF("Loading the data rotate config and seeds for %s!", mss::c_str(i_target)); - FAPI_TRY( fapi2::putScom(i_target, l_data_rotate_cnfg_addr, i_program.iv_data_rotate_cnfg) ); - FAPI_TRY( fapi2::putScom(i_target, l_data_rotate_seed_addr, i_program.iv_data_rotate_seed) ); + FAPI_TRY( fapi2::putScom(i_target, TT::DATA_ROTATE_CNFG_REG, i_program.iv_data_rotate_cnfg) ); + FAPI_TRY( fapi2::putScom(i_target, TT::DATA_ROTATE_SEED_REG, i_program.iv_data_rotate_seed) ); fapi_try_exit: return fapi2::current_err; |