Remove Nimbus dependencies from the SPD decoder

Created a new pre_data_engine to set preliminary data
needed before eff_config. Moved SPD to attribute mapping
to eff_dimm structure and away from the SPD decoder to make
it reusable for future memory controllers. Updated bugs in
unit tests. Added SPD factory classes.

This is only needed for Axone.

Change-Id: Ief0a479ee1c7a4dab852ffb18b595564c0125e35
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/58611
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59470
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 626 insertions, 2203 deletions

diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H
index f8031274e..49220680c 100644
--- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H
+++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H
@@ -39,84 +39,107 @@
 
 #include <fapi2.H>
 #include <vector>
+#include <generic/memory/lib/spd/spd_decoder_def.H>
 #include <generic/memory/lib/spd/common/dimm_module_decoder.H>
+#include <generic/memory/lib/spd/spd_reader.H>
 
 namespace mss
 {
 namespace spd
 {
-namespace ddr4
-{
-namespace lrdimm
-{
 
 ///
-/// @brief LRDIMM module decoder for revision 1.0
+/// @brief LRDIMM module decoder
+/// @tparam R SPD revision  - partial specialization
 ///
-class decoder_v1_0 : public dimm_module_decoder
+template < rev R >
+class decoder<DDR4, LRDIMM_MODULE, R > : public dimm_module_decoder
 {
-    public:
-
-        // First field - SPD byte
-        // Second field - start bit
-        // Third field - bit length
-        constexpr static field_t MODULE_NOMINAL_HEIGHT{128, 3, 5};
-        constexpr static field_t RAW_CARD_EXTENSION{128, 0, 3};
-
-        constexpr static field_t FRONT_MODULE_THICKNESS{129, 4, 4};
-        constexpr static field_t BACK_MODULE_THICKNESS{129, 0, 4};
-
-        constexpr static field_t NUM_REGISTERS_USED{131, 6, 2};
-        constexpr static field_t NUM_ROWS_OF_DRAMS{131, 4, 2};
-        constexpr static field_t REGISTER_TYPE{131, 0, 4};
-
-        constexpr static field_t HEAT_SPREADER_THERM_CHAR{132, 1, 7};
-        constexpr static field_t HEAT_SPREADER_SOLUTION{132, 0, 1};
-
-        constexpr static field_t CONTINUATION_CODES{133, 1, 7};
-        constexpr static field_t ADDR_MAPPING{136, 7, 1};
-
-        constexpr static field_t CKE_DRIVE_STRENGTH{137, 6, 2};
-        constexpr static field_t ODT_DRIVE_STRENGTH{137, 4, 2};
-        constexpr static field_t CA_DRIVE_STRENGTH{137, 2, 2};
-        constexpr static field_t CS_DRIVE_STRENGTH{137, 0, 2};
+    private:
 
-        constexpr static field_t B_SIDE_DRIVE_STRENGTH{138, 6, 2};
-        constexpr static field_t A_SIDE_DRIVE_STRENGTH{138, 4, 2};
-        constexpr static field_t BCOM_BODT_BCKE_DRIVE_STRENGTH{138, 3, 1};
-        constexpr static field_t BCK_DRIVE_STRENGTH{138, 2, 1};
-        constexpr static field_t RCD_SLEW_CNTRL{138, 1, 1 };
+        using fields_t = fields<DDR4, LRDIMM_MODULE>;
+        fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target;
+        std::vector<uint8_t> iv_data;
 
-        constexpr static field_t VREF_DQ_RANK0{140, 2, 6};
-        constexpr static field_t VREF_DQ_RANK1{141, 2, 6};
-        constexpr static field_t VREF_DQ_RANK2{142, 2, 6};
-        constexpr static field_t VREF_DQ_RANK3{143, 2, 6};
-
-        constexpr static field_t DATA_BUFFER_MDQ{145, 1, 3};
-
-        constexpr static field_t DRAM_VREF_DQ_RANGE{155, 4, 4};
-        constexpr static field_t DATA_BUFFER_VREF_DQ{155, 3, 1};
+        ///
+        /// @brief Helper function to check for reserved values for DRAM interface MDQ Drive Strenth
+        /// @tparam T SPD revision
+        /// @param[in] i_dimm_speed the dimm speed in MT/s
+        /// @param[in] i_input value to check reserved bits against
+        /// @return FAPI2_RC_SUCCESS iff okay
+        ///
+        template < rev T >
+        fapi2::ReturnCode check_for_reserved_values(const uint64_t i_dimm_speed,
+                const uint8_t i_input) const
+        {
+            static_assert(T <= LRDIMM_MAX, "Invalid SPD revision");
+            const std::vector<size_t> l_reserved_bits{0b011, 0b100, 0b110, 0b111};
+
+            // Lets make an additinal check that we aren't being set to a reserved field
+            FAPI_ASSERT( !std::binary_search(l_reserved_bits.begin(), l_reserved_bits.end(), i_input),
+                         fapi2::MSS_INVALID_DB_MDQ_DRIVE_STRENGTH()
+                         .set_DATA_RATE(i_dimm_speed)
+                         .set_TARGET(iv_target),
+                         "Reserved settings for data buffer MDQ drive strength received for dimm speed %d on %s",
+                         i_dimm_speed,
+                         spd::c_str(iv_target) );
+
+            return fapi2::FAPI2_RC_SUCCESS;
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
-        constexpr static field_t DATA_BUFFER_GAIN_ADJUST{156, 7, 1};
-        constexpr static field_t DATA_BUFFER_DFE{156, 6, 1};
+    public:
 
         // deleted default ctor
-        decoder_v1_0() = delete;
+        decoder() = delete;
 
         ///
         /// @brief ctor
         /// @param[in] i_target dimm target
         /// @param[in] i_spd_data vector DIMM SPD data
         ///
-        decoder_v1_0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                     const std::vector<uint8_t>& i_spd_data)
-            : dimm_module_decoder(i_target, i_spd_data)
-        {}
+        decoder(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+                const std::vector<uint8_t>& i_spd_data):
+            dimm_module_decoder(i_target, i_spd_data),
+            iv_target(i_target),
+            iv_data(i_spd_data)
+        {
+            static_assert( R <= rev::LRDIMM_MAX, " R > rev::LRDIMM_MAX");
+        }
 
         ///
         /// @brief default dtor
         ///
-        virtual ~decoder_v1_0() = default;
+        virtual ~decoder() = default;
+
+        ///
+        /// @brief Gets decoder target
+        /// @return fapi2::Target<fapi2::TARGET_TYPE_DIMM>
+        ///
+        virtual fapi2::Target<fapi2::TARGET_TYPE_DIMM> get_dimm_target() const
+        {
+            return iv_target;
+        }
+
+        ///
+        /// @brief Gets decoder SPD data
+        /// @return std::vector<uint8_t>
+        ///
+        virtual std::vector<uint8_t> get_data() const
+        {
+            return iv_data;
+        }
+
+        ///
+        /// @brief Sets decoder SPD data
+        /// @param[in] i_spd_data SPD data in a vector reference
+        ///
+        virtual void set_data(const std::vector<uint8_t>& i_spd_data)
+        {
+            iv_data = i_spd_data;
+        }
 
         ///
         /// @brief Decodes module nominal height max
@@ -127,7 +150,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 55
         ///
-        virtual fapi2::ReturnCode max_module_nominal_height(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode max_module_nominal_height(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::MODULE_NOMINAL_HEIGHT, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes raw card extension
@@ -138,7 +167,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 55
         ///
-        virtual fapi2::ReturnCode raw_card_extension(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode raw_card_extension(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::RAW_CARD_EXT, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes front module maximum thickness max
@@ -149,7 +184,14 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 55
         ///
-        virtual fapi2::ReturnCode front_module_max_thickness(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode front_module_max_thickness(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::FRONT_MODULE_THICKNESS, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+
+        }
 
         ///
         /// @brief Decodes back module maximum thickness max
@@ -160,7 +202,31 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 55
         ///
-        virtual fapi2::ReturnCode back_module_max_thickness(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode back_module_max_thickness(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::BACK_MODULE_THICKNESS, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+
+        }
+
+        ///
+        /// @brief Decodes reference raw card used
+        /// @param[out] o_output encoding from SPD
+        /// @return FAPI2_RC_SUCCESS if okay
+        /// @note SPD Byte 130 (Bits 7~0)
+        /// @note Item JEDEC Standard No. 21-C
+        /// @note DDR4 SPD Document Release 2
+        /// @note Page 4.1.2.12 - 48
+        ///
+        virtual fapi2::ReturnCode reference_raw_card(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::REF_RAW_CARD, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes number of registers used on LRDIMM
@@ -171,7 +237,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 57
         ///
-        virtual fapi2::ReturnCode num_registers_used(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode num_registers_used(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::NUM_REGS_USED, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes number of rows of DRAMs on LRDIMM
@@ -182,29 +254,49 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 57
         ///
-        virtual fapi2::ReturnCode num_rows_of_drams(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode num_rows_of_drams(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::ROWS_OF_DRAMS, rev::V1_0>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+
+        }
 
         ///
-        /// @brief Decodes heat spreader solution
-        /// @param[out] o_output drive strength encoding from SPD
+        /// @brief Decodes register and data buffer types
+        /// @param[out] o_output encoding from SPD
         /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 132 (Bit 7)
+        /// @note SPD Byte 131 (Bits 7~4)
         /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 2
-        /// @note Page 4.1.2.12.2 - 58
+        /// @note DDR4 SPD Document Release 3
+        /// @note Page 4.1.2.12.3 - 63
         ///
-        virtual fapi2::ReturnCode heat_spreader_solution(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode register_and_buffer_type(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::REGISTER_TYPE, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+
+        }
 
         ///
-        /// @brief Decodes number of continuation codes
+        /// @brief Decodes heat spreader solution
         /// @param[out] o_output drive strength encoding from SPD
         /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 133 (Bits 6~0)
+        /// @note SPD Byte 132 (Bit 7)
         /// @note Item JEDEC Standard No. 21-C
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 58
         ///
-        virtual fapi2::ReturnCode num_continuation_codes(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode heat_spreader_solution(uint8_t& o_output) const override
+        {
+            FAPI_TRY(  (mss::spd::reader<fields_t::HEAT_SPREADER_SOL, rev::V1_0>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register manufacturer ID code
@@ -215,7 +307,28 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 58
         ///
-        virtual fapi2::ReturnCode reg_manufacturer_id_code(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode reg_manufacturer_id_code(uint16_t& o_output) const override
+        {
+            uint8_t l_cont_codes = 0;
+            uint8_t l_last_nonzero_byte = 0;
+
+            FAPI_TRY( (mss::spd::reader<fields_t::CONTINUATION_CODES, R>(iv_target, iv_data, l_cont_codes)) );
+            FAPI_TRY( (mss::spd::reader<fields_t::LAST_NON_ZERO_BYTE, R>(iv_target, iv_data, l_last_nonzero_byte)) );
+
+            {
+                fapi2::buffer<uint16_t> l_buffer;
+                rightAlignedInsert(l_buffer, l_last_nonzero_byte, l_cont_codes);
+
+                o_output = l_buffer;
+
+                FAPI_INF("%s.Module Manufacturer ID Code: 0x%04x",
+                         spd::c_str(iv_target),
+                         o_output);
+            }
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register revision number
@@ -226,7 +339,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 58
         ///
-        virtual fapi2::ReturnCode register_rev_num(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode register_rev_num(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::REGISTER_REV, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes address mapping from register to dram
@@ -237,7 +356,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 59
         ///
-        virtual fapi2::ReturnCode register_to_dram_addr_mapping(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode register_to_dram_addr_mapping(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::ADDR_MAP_REG_TO_DRAM, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register output drive strength for CKE signal
@@ -247,7 +372,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode cke_signal_output_driver(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode cke_signal_output_driver(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::CKE_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register output drive strength for ODT signal
@@ -258,7 +389,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode odt_signal_output_driver(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode odt_signal_output_driver(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::ODT_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register output drive strength for command/address (CA) signal
@@ -269,7 +406,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode ca_signal_output_driver(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode ca_signal_output_driver(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::CA_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register output drive strength for control signal (CS) signal
@@ -280,7 +423,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode cs_signal_output_driver(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode cs_signal_output_driver(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::CS_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register output drive strength for clock (B side)
@@ -291,7 +440,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode b_side_clk_output_driver(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode b_side_clk_output_driver(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::YO_Y2_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes register output drive strength for clock (A side)
@@ -302,7 +457,65 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode a_side_clk_output_driver(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode a_side_clk_output_driver(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::Y1_Y3_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
+        /// @param[out] o_output encoded drive strength
+        /// @return FAPI2_RC_SUCCESS if okay
+        /// @note SPD Byte 138 (Bit 4)
+        /// @note Item JEDEC Standard No. 21-C
+        /// @note DDR4 SPD Document Release 3
+        /// @note Page 4.1.2.12.3 - 66
+        ///
+        virtual fapi2::ReturnCode bcom_bcke_bodt_drive_strength(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::BCOM_BODT_BCKE_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes register output drive strength for data buffer control (BCK)
+        /// @param[out] o_output encoded drive strength
+        /// @return FAPI2_RC_SUCCESS if okay
+        /// @note SPD Byte 138 (Bit 5)
+        /// @note Item JEDEC Standard No. 21-C
+        /// @note DDR4 SPD Document Release 3
+        /// @note Page 4.1.2.12.3 - 66
+        ///
+        virtual fapi2::ReturnCode bck_output_drive_strength(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::BCK_DRIVER, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes RCD output slew rate control
+        /// @param[out] o_output encoded drive strength
+        /// @return FAPI2_RC_SUCCESS if okay
+        /// @note SPD Byte 138 (Bit 6)
+        /// @note Item JEDEC Standard No. 21-C
+        /// @note DDR4 SPD Document Release 4
+        /// @note Page 4.1.2.L-4 - 70
+        ///
+        virtual fapi2::ReturnCode slew_rate_control(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::RCD_SLEW_CNTRL, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes data buffer revision number
@@ -313,7 +526,14 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 60
         ///
-        virtual fapi2::ReturnCode data_buffer_rev(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode data_buffer_rev(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::DATA_BUFFER_REV, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes DRAM VrefDQ for Package Rank 0
@@ -324,7 +544,14 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 61
         ///
-        virtual fapi2::ReturnCode dram_vref_dq_rank0(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_vref_dq_rank0(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::VREF_DQ_RANK0, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes DRAM VrefDQ for Package Rank 1
@@ -335,7 +562,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 61
         ///
-        virtual fapi2::ReturnCode dram_vref_dq_rank1(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_vref_dq_rank1(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::VREF_DQ_RANK1, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes DRAM VrefDQ for Package Rank 2
@@ -346,7 +579,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 61
         ///
-        virtual fapi2::ReturnCode dram_vref_dq_rank2(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_vref_dq_rank2(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::VREF_DQ_RANK2, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes DRAM VrefDQ for Package Rank 3
@@ -357,7 +596,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 61
         ///
-        virtual fapi2::ReturnCode dram_vref_dq_rank3(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_vref_dq_rank3(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::VREF_DQ_RANK3, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes data buffer VrefDQ for DRAM interface
@@ -368,7 +613,13 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 61
         ///
-        virtual fapi2::ReturnCode data_buffer_vref_dq(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode data_buffer_vref_dq(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::DATA_BUFFER_VREF_DQ, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes DRAM interface MDQ Drive Strenth
@@ -382,7 +633,49 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note Page 4.1.2.12.2 - 62
         ///
         virtual fapi2::ReturnCode data_buffer_mdq_drive_strength(const uint64_t i_dimm_speed,
-                uint8_t& o_output) const override;
+                uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DB_MDQ_LTE_1866, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DB_MDQ_LTE_2400, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DB_MDQ_LTE_3200, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
+                    break;
+            }
+
+            // Lets make an additinal check that we aren't being set to a reserved field
+            FAPI_TRY((check_for_reserved_values<R>(i_dimm_speed, o_output)),
+                     "Failed reserved bit check for %s", spd::c_str(iv_target));
+
+            // If we are here we have a valid output, exit
+            // to avoid error path of fapi_try_exit
+            return fapi2::FAPI2_RC_SUCCESS;
+
+        fapi_try_exit:
+            // A little output clean up if we fail out
+            o_output = 0;
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes DRAM interface MDQ read termination strength
@@ -395,7 +688,41 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 62
         ///
-        virtual fapi2::ReturnCode data_buffer_mdq_rtt(const uint64_t i_dimm_speed, uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode data_buffer_mdq_rtt(const uint64_t i_dimm_speed, uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DB_MDQ_RTT_LTE_1866, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DB_MDQ_RTT_LTE_2400, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DB_MDQ_RTT_LTE_3200, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
+                    break;
+            }
+
+            return fapi2::FAPI2_RC_SUCCESS;
+
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes DRAM drive strenth
@@ -408,7 +735,41 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 63
         ///
-        virtual fapi2::ReturnCode dram_drive_strength(const uint64_t i_dimm_speed, uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_drive_strength(const uint64_t i_dimm_speed, uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_DRIVE_STRENGTH_LTE_1866, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_DRIVE_STRENGTH_LTE_2400, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_DRIVE_STRENGTH_LTE_3200, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
+                    break;
+            }
+
+            return fapi2::FAPI2_RC_SUCCESS;
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes DRAM ODT for RTT_NOM
@@ -421,7 +782,42 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - (64 - 65)
         ///
-        virtual fapi2::ReturnCode dram_rtt_nom(const uint64_t i_dimm_speed, uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_rtt_nom(const uint64_t i_dimm_speed, uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_NOM_LTE_1866, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_NOM_LTE_2400, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_NOM_LTE_3200, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
+
+                    break;
+            }
+
+            return fapi2::FAPI2_RC_SUCCESS;
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes DRAM ODT for RTT_WR
@@ -434,7 +830,41 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - (64 - 65)
         ///
-        virtual fapi2::ReturnCode dram_rtt_wr(const uint64_t i_dimm_speed, uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_rtt_wr(const uint64_t i_dimm_speed, uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_WR_LTE_1866, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_WR_LTE_2400, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_WR_LTE_3200, R>(iv_target, iv_data, o_output)) );
+                    break;
+
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
+
+                    break;
+            }
+
+            return fapi2::FAPI2_RC_SUCCESS;
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes DRAM ODT for RTT_PARK, package ranks 0 & 1
@@ -447,172 +877,95 @@ class decoder_v1_0 : public dimm_module_decoder
         /// @note DDR4 SPD Document Release 2
         /// @note Page 4.1.2.12.2 - 65
         ///
-        virtual fapi2::ReturnCode dram_rtt_park_ranks0_1(const uint64_t i_dimm_speed, uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_rtt_park_ranks0_1(const uint64_t i_dimm_speed, uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_PARK_R01_LTE_1866, R>(iv_target, iv_data,
+                               o_output)) );
+                    break;
 
-        ///
-        /// @brief Decodes DRAM ODT for RTT_PARK, package ranks 2 & 3
-        /// for a particular dimm speed
-        /// @param[in] i_dimm_speed the dimm speed in MT/s
-        /// @param[out] o_output ODT termination strength (in ohms)
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 152 - 154 (Bits 5~3)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 2
-        /// @note Page 4.1.2.12.2 - 65
-        ///
-        virtual fapi2::ReturnCode dram_rtt_park_ranks2_3(const uint64_t i_dimm_speed, uint8_t& o_output) const override;
-
-};//decoder
-
-///
-/// @brief LRDIMM module decoder for revision 1.1
-///
-class decoder_v1_1 : public decoder_v1_0
-{
-    public:
-
-        // deleted default ctor
-        decoder_v1_1() = delete;
-
-        ///
-        /// @brief ctor
-        /// @param[in] i_target dimm target
-        /// @param[in] i_spd_data vector DIMM SPD data
-        ///
-        decoder_v1_1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                     const std::vector<uint8_t>& i_spd_data)
-            : decoder_v1_0(i_target, i_spd_data)
-        {}
-
-        ///
-        /// @brief default dtor
-        ///
-        virtual ~decoder_v1_1() = default;
-
-        ///
-        /// @brief Decodes register and data buffer types
-        /// @param[out] o_output encoding from SPD
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 131 (Bits 7~4)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 63
-        ///
-        virtual fapi2::ReturnCode register_and_buffer_type(uint8_t& o_output) const override;
-
-        ///
-        /// @brief Decodes register output drive strength for CKE signal
-        /// @param[out] o_output encoding from SPD
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 137 (Bits 1~0)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 65
-        ///
-        virtual fapi2::ReturnCode cke_signal_output_driver(uint8_t& o_output) const override;
-
-        ///
-        /// @brief Decodes register output drive strength for ODT signal
-        /// @param[out] o_output encoding from SPD
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 137 (Bits 3~2)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 65
-        ///
-        virtual fapi2::ReturnCode odt_signal_output_driver(uint8_t& o_output) const override;
-
-        ///
-        /// @brief Decodes register output drive strength for control signal (CS) signal
-        /// @param[out] o_output encoding from SPD
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 137 (Bits 6~7)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 65
-        ///
-        virtual fapi2::ReturnCode cs_signal_output_driver(uint8_t& o_output) const override;
-
-        ///
-        /// @brief Decodes register output drive strength for clock (B side)
-        /// @param[out] o_output drive strength encoding from SPD
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 138 (Bits 1~0)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 66
-        ///
-        virtual fapi2::ReturnCode b_side_clk_output_driver(uint8_t& o_output) const override;
-
-        ///
-        /// @brief Decodes register output drive strength for clock (A side)
-        /// @param[out] o_output drive strength encoding from SPD
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 138 (Bits 3~2)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 66
-        ///
-        virtual fapi2::ReturnCode a_side_clk_output_driver(uint8_t& o_output) const override;
-};
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_PARK_R01_LTE_2400, R>(iv_target, iv_data,
+                               o_output)) );
+                    break;
 
-///
-/// @brief LRDIMM module decoder for revision 1.2
-///
-class decoder_v1_2 : public  decoder_v1_1
-{
-    public:
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_PARK_R01_LTE_3200, R>(iv_target, iv_data,
+                               o_output)) );
+                    break;
 
-        // deleted default ctor
-        decoder_v1_2() = delete;
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
 
-        ///
-        /// @brief ctor
-        /// @param[in] i_target dimm target
-        /// @param[in] i_spd_data vector DIMM SPD data
-        ///
-        decoder_v1_2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                     const std::vector<uint8_t>& i_spd_data)
-            : decoder_v1_1(i_target, i_spd_data)
-        {}
+                    break;
+            }
 
-        ///
-        /// @brief default dtor
-        ///
-        virtual ~decoder_v1_2() = default;
+            return fapi2::FAPI2_RC_SUCCESS;
 
-        ///
-        /// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
-        /// @param[out] o_output encoded drive strength
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 138 (Bit 4)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 66
-        ///
-        virtual fapi2::ReturnCode bcom_bcke_bodt_drive_strength(uint8_t& o_output) const override;
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
-        ///
-        /// @brief Decodes register output drive strength for data buffer control (BCK)
-        /// @param[out] o_output encoded drive strength
-        /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 138 (Bit 5)
-        /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 3
-        /// @note Page 4.1.2.12.3 - 66
-        ///
-        virtual fapi2::ReturnCode bck_output_drive_strength(uint8_t& o_output) const override;
 
         ///
-        /// @brief Decodes RCD output slew rate control
-        /// @param[out] o_output encoded drive strength
+        /// @brief Decodes DRAM ODT for RTT_PARK, package ranks 2 & 3
+        /// for a particular dimm speed
+        /// @param[in] i_dimm_speed the dimm speed in MT/s
+        /// @param[out] o_output ODT termination strength (in ohms)
         /// @return FAPI2_RC_SUCCESS if okay
-        /// @note SPD Byte 138 (Bit 6)
+        /// @note SPD Byte 152 - 154 (Bits 5~3)
         /// @note Item JEDEC Standard No. 21-C
-        /// @note DDR4 SPD Document Release 4
-        /// @note Page 4.1.2.L-4 - 70
+        /// @note DDR4 SPD Document Release 2
+        /// @note Page 4.1.2.12.2 - 65
         ///
-        virtual fapi2::ReturnCode slew_rate_control(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_rtt_park_ranks2_3(const uint64_t i_dimm_speed, uint8_t& o_output) const override
+        {
+            switch(i_dimm_speed)
+            {
+                case mss::DIMM_SPEED_1600:
+                case mss::DIMM_SPEED_1866:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_PARK_R23_LTE_1866, R>(iv_target, iv_data,
+                               o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2133:
+                case mss::DIMM_SPEED_2400:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_PARK_R23_LTE_2400, R>(iv_target, iv_data,
+                               o_output)) );
+                    break;
+
+                case mss::DIMM_SPEED_2666:
+                case mss::DIMM_SPEED_2933:
+                case mss::DIMM_SPEED_3200:
+                    FAPI_TRY( (mss::spd::reader<fields_t::DRAM_ODT_RTT_PARK_R23_LTE_3200, R>(iv_target, iv_data,
+                               o_output)) );
+                    break;
+
+                default:
+                    FAPI_ASSERT(false,
+                                fapi2::MSS_INVALID_DIMM_SPEED()
+                                .set_DIMM_SPEED(i_dimm_speed)
+                                .set_TARGET(iv_target),
+                                "Invalid dimm speed received: %d for %s", i_dimm_speed, spd::c_str(iv_target));
+
+                    break;
+            }
+
+            return fapi2::FAPI2_RC_SUCCESS;
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes VrefDQ range for DRAM interface range
@@ -623,7 +976,14 @@ class decoder_v1_2 : public  decoder_v1_1
         /// @note DDR4 SPD Document Release 4
         /// @note Page 4.1.2.L-4 - 76
         ///
-        virtual fapi2::ReturnCode dram_vref_dq_range(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode dram_vref_dq_range(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::DRAM_VREF_DQ_RANGE, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 
         ///
         /// @brief Decodes data buffer VrefDQ range for DRAM interface range
@@ -634,7 +994,13 @@ class decoder_v1_2 : public  decoder_v1_1
         /// @note DDR4 SPD Document Release 4
         /// @note Page 4.1.2.L-4 - 76
         ///
-        virtual fapi2::ReturnCode data_buffer_vref_dq_range(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode data_buffer_vref_dq_range(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::DATA_BUFFER_VREF_DQ_RANGE, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes data buffer gain adjustment
@@ -645,7 +1011,13 @@ class decoder_v1_2 : public  decoder_v1_1
         /// @note DDR4 SPD Document Release 4
         /// @note Page 4.1.2.L-4 - 77
         ///
-        virtual fapi2::ReturnCode data_buffer_gain_adjustment(uint8_t& o_output) const override;
+        virtual fapi2::ReturnCode data_buffer_gain_adjustment(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::DATA_BUFFER_GAIN_ADJUST, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
 
         ///
         /// @brief Decodes data buffer Decision Feedback Equalization (DFE)
@@ -656,11 +1028,16 @@ class decoder_v1_2 : public  decoder_v1_1
         /// @note DDR4 SPD Document Release 4
         /// @note Page 4.1.2.L-4 - 77
         ///
-        virtual fapi2::ReturnCode data_buffer_dfe(uint8_t& o_output) const override;
-};
+        virtual fapi2::ReturnCode data_buffer_dfe(uint8_t& o_output) const override
+        {
+            FAPI_TRY( (mss::spd::reader<fields_t::DATA_BUFFER_DFE, R>(iv_target, iv_data, o_output)) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+};//decoder
 
-}// lrdimm
-}// ddr4
 }// spd
 }// mss
 
diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C
deleted file mode 100644
index dc3ef9cad..000000000
--- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C
+++ /dev/null
@@ -1,1368 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-///
-/// @file lrdimm_decoder_v1_0.C
-/// @brief LRDIMM module SPD decoder definitions for revision 1.0
-///
-// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
-// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: HB:FSP
-
-// std lib
-#include <vector>
-
-// fapi2
-#include <fapi2.H>
-
-// mss lib
-#include <generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H>
-#include <generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H>
-#include <generic/memory/lib/spd/spd_checker.H>
-#include <generic/memory/lib/utils/c_str.H>
-#include <generic/memory/lib/utils/find.H>
-
-using fapi2::TARGET_TYPE_MCA;
-using fapi2::TARGET_TYPE_MCS;
-using fapi2::TARGET_TYPE_DIMM;
-
-
-namespace mss
-{
-namespace spd
-{
-namespace ddr4
-{
-namespace lrdimm
-{
-
-/////////////////////////
-// Non-member helper functions
-// For LRDIMM module rev 1.0
-/////////////////////////
-
-///
-/// @brief Helper function to find SPD byte based on freq
-/// @param[in] i_dimm_speed DIMM speed in MT/s
-/// @param[out] o_byte byte to extract spd from
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400,
-///
-static fapi2::ReturnCode mdq_helper(const uint64_t i_dimm_speed, uint8_t& o_byte)
-{
-    switch(i_dimm_speed)
-    {
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT1866:
-            o_byte = 145;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2133:
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2400:
-            o_byte = 146;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
-            o_byte = 147;
-            break;
-
-        default:
-            FAPI_ERR("Invalid dimm speed received: %d", i_dimm_speed);
-            return fapi2::FAPI2_RC_INVALID_PARAMETER;
-            break;
-    }
-
-    return fapi2::FAPI2_RC_SUCCESS;
-};
-
-///
-/// @brief Helper function to find start bit based on freq
-/// @param[in] i_dimm_speed DIMM speed in MT/s
-/// @param[out] o_start_bit start bit to extract SPD from
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400,
-///
-static fapi2::ReturnCode drive_strength_start_bit_finder(const uint64_t i_dimm_speed, size_t& o_start_bit)
-{
-    switch(i_dimm_speed)
-    {
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT1866:
-            o_start_bit = 6;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2133:
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2400:
-            o_start_bit = 4;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
-            o_start_bit = 2;
-            break;
-
-        default:
-            FAPI_ERR("Invalid dimm speed received: %d", i_dimm_speed);
-            return fapi2::FAPI2_RC_INVALID_PARAMETER;
-            break;
-    }
-
-    return fapi2::FAPI2_RC_SUCCESS;
-}
-
-///
-/// @brief Helper function to find SPD byte based on freq
-/// @param[in] i_dimm_speed DIMM speed in MT/s
-/// @param[out] o_byte byte to extract spd from
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400,
-///
-static fapi2::ReturnCode rtt_wr_and_nom_byte_finder(const uint64_t i_dimm_speed, size_t& o_byte)
-{
-    switch(i_dimm_speed)
-    {
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT1866:
-            o_byte =  149;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2133:
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2400:
-            o_byte = 150;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
-            o_byte = 151;
-            break;
-
-        default:
-            FAPI_ERR("Invalid dimm speed received: %d", i_dimm_speed);
-            return fapi2::FAPI2_RC_INVALID_PARAMETER;
-            break;
-    }
-
-    return fapi2::FAPI2_RC_SUCCESS;
-}
-
-///
-/// @brief Helper function to find SPD byte based on freq
-/// @param[in] i_dimm_speed DIMM speed in MT/s
-/// @param[out] o_byte byte to extract spd from
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400,
-///
-static fapi2::ReturnCode rtt_park_byte_finder(const uint64_t i_dimm_speed, size_t& o_byte)
-{
-    switch(i_dimm_speed)
-    {
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT1866:
-            o_byte = 152;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2133:
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2400:
-            o_byte = 153;
-            break;
-
-        case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
-            o_byte = 154;
-            break;
-
-        default:
-            FAPI_ERR("Invalid dimm speed received: %d", i_dimm_speed);
-            return fapi2::FAPI2_RC_INVALID_PARAMETER;
-            break;
-    }
-
-    return fapi2::FAPI2_RC_SUCCESS;
-}
-
-/////////////////////////
-// Member Method implementation
-// For LRDIMM module rev 1.0
-/////////////////////////
-
-///
-/// @brief Decodes module nominal height max
-/// @param[out] o_output height range encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 128 (Bits 4~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 55
-///
-fapi2::ReturnCode decoder_v1_0::max_module_nominal_height(uint8_t& o_output) const
-{
-    const uint8_t l_field_bits = extract_spd_field< MODULE_NOMINAL_HEIGHT >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VALUE = 0b11111;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VALUE,
-              MODULE_NOMINAL_HEIGHT.iv_byte,
-              l_field_bits,
-              "Failed bound check for module nominal height max") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Max module nominal height: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes raw card extension
-/// @param[out] o_output raw card rev. encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 128 (Bits 7~5)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 55
-///
-fapi2::ReturnCode decoder_v1_0::raw_card_extension(uint8_t& o_output) const
-{
-    const uint8_t l_field_bits = extract_spd_field< RAW_CARD_EXTENSION >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VALUE = 0b111;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VALUE,
-              RAW_CARD_EXTENSION.iv_byte,
-              l_field_bits,
-              "Failed bound check for raw card extension") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Raw card extension: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes front module maximum thickness max
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 129 (Bits 3~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 55
-///
-fapi2::ReturnCode decoder_v1_0::front_module_max_thickness(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< FRONT_MODULE_THICKNESS >(iv_target, iv_spd_data);
-
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VALUE = 0b1111;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VALUE,
-              FRONT_MODULE_THICKNESS.iv_byte,
-              l_field_bits,
-              "Failed bound check for front module max thickness") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Front module max thickness: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-
-}
-
-///
-/// @brief Decodes back module maximum thickness max
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 129 (Bits 7~4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 55
-///
-fapi2::ReturnCode decoder_v1_0::back_module_max_thickness(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< BACK_MODULE_THICKNESS >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VALUE = 0b1111;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VALUE,
-              BACK_MODULE_THICKNESS.iv_byte,
-              l_field_bits,
-              "Failed bound check for back module max thickness") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Back module max thickness: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-
-}
-
-///
-/// @brief Decodes number of registers used on LRDIMM
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 131 (Bits 1~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 57
-///
-fapi2::ReturnCode decoder_v1_0::num_registers_used(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< NUM_REGISTERS_USED >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 0b10;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              NUM_REGISTERS_USED.iv_byte,
-              l_field_bits,
-              "Failed bound check for number of registers used on RDIMM ") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Number of registers used on LRDIMM : %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes number of rows of DRAMs on LRDIMM
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 131 (Bits 3~2)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 57
-///
-fapi2::ReturnCode decoder_v1_0::num_rows_of_drams(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< NUM_ROWS_OF_DRAMS >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 0b11;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              NUM_REGISTERS_USED.iv_byte,
-              l_field_bits,
-              "Failed bound check for number of rows of DRAMs on LRDIMM ") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Number of rows of DRAMs on LRDIMM : %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-
-}
-
-///
-/// @brief Decodes heat spreader solution
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 132 (Bit 7)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 58
-///
-fapi2::ReturnCode decoder_v1_0::heat_spreader_solution(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< HEAT_SPREADER_SOLUTION >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VALUE = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VALUE,
-              HEAT_SPREADER_SOLUTION.iv_byte,
-              l_field_bits,
-              "Failed bound check for heat spreader solution") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Heat spreader solution: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes number of continuation codes
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 133 (bit 6~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 58
-///
-fapi2::ReturnCode decoder_v1_0::num_continuation_codes(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< CONTINUATION_CODES >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VALUE = 10; // JEP106AS spec
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VALUE,
-              CONTINUATION_CODES.iv_byte,
-              l_field_bits,
-              "Failed bound check for number of continuation codes") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Number of continuation codes: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register manufacturer ID code
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 134 (bit 7~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 58
-///
-fapi2::ReturnCode decoder_v1_0::reg_manufacturer_id_code(uint8_t& o_output) const
-{
-    constexpr size_t BYTE_INDEX = 134;
-    uint8_t l_raw_byte = iv_spd_data[BYTE_INDEX];
-
-    // Trace in the front assists w/ debug
-    FAPI_INF("%s SPD data at Byte %d: 0x%llX.",
-             iv_target_str_storage,
-             BYTE_INDEX,
-             l_raw_byte);
-
-    // All bits used for encoding, no bounds to check
-    o_output = l_raw_byte;
-
-    FAPI_INF("%s. Register revision number: %d",
-             iv_target_str_storage,
-             o_output);
-
-    return fapi2::FAPI2_RC_SUCCESS;
-}
-
-///
-/// @brief Decodes register revision number
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 135 (bit 7~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 58
-///
-fapi2::ReturnCode decoder_v1_0::register_rev_num(uint8_t& o_output) const
-{
-    constexpr size_t BYTE_INDEX = 135;
-    uint8_t l_raw_byte = iv_spd_data[BYTE_INDEX];
-
-    // Trace in the front assists w/ debug
-    FAPI_INF("%s SPD data at Byte %d: 0x%llX.",
-             iv_target_str_storage,
-             BYTE_INDEX,
-             l_raw_byte);
-
-    // All bits used for encoding, no bounds to check
-    o_output = l_raw_byte;
-
-    FAPI_INF("%s. Register revision number: %d",
-             iv_target_str_storage,
-             o_output);
-
-    return fapi2::FAPI2_RC_SUCCESS;
-}
-
-///
-/// @brief Decodes address mapping from register to dram
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 136 (bit 0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 59
-///
-fapi2::ReturnCode decoder_v1_0::register_to_dram_addr_mapping(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< ADDR_MAPPING >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              ADDR_MAPPING.iv_byte,
-              l_field_bits,
-              "Failed bound check for to register to dram addr mapping") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Address mapping from register to dram: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for CKE signal
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (bit 1~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::cke_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< CKE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED, // extract sanity check
-              CKE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for CKE") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for CKE: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for ODT signal
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (bit 3~2)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::odt_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< ODT_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED, // extract sanity check
-              ODT_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for ODT") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for ODT: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for command/address (CA) signal
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (bit 5~4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::ca_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< CA_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t INVALID_VAL = 4;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < INVALID_VAL, // extract sanity check
-              CA_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for CA") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for CA: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for control signal (CS) signal
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (bit 6~7)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::cs_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< CS_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED, // extract sanity check
-              CS_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for CS") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for CS: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for clock (B side)
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (bit 1~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::b_side_clk_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< B_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED, // extract sanity check
-              B_SIDE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for clock (Y0,Y2)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for clock (Y0,Y2): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for clock (A side)
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (bit 3~2)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::a_side_clk_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< A_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              A_SIDE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for clock (Y1,Y3)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for clock (Y1,Y3): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes data buffer revision number
-/// @param[out] o_output revision number
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 139 (Bits 7~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 60
-///
-fapi2::ReturnCode decoder_v1_0::data_buffer_rev(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    constexpr size_t BYTE_INDEX = 139;
-    const uint8_t l_raw_byte = iv_spd_data[BYTE_INDEX];
-
-    // Trace in the front assists w/ debug
-    FAPI_INF("%s SPD data at Byte %d: 0x%llX.",
-             iv_target_str_storage,
-             BYTE_INDEX,
-             l_raw_byte);
-
-    // This checks JEDEC range is met
-    constexpr size_t UNDEFINED = 0xFF;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_raw_byte != UNDEFINED,
-              BYTE_INDEX,
-              l_raw_byte,
-              "Failed bounds check for data buffer revision number") );
-
-    // Update output only if check passes
-    o_output = l_raw_byte;
-
-    FAPI_INF("%s. Data buffer rev: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-
-}
-
-///
-/// @brief Decodes DRAM VrefDQ for Package Rank 0
-/// @param[out] o_output encoding of MR6 A5:A0 in JESD790-4 spec
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 140 (Bits 5~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 61
-///
-fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank0(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK0 >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // JESD79-4 specification
-    constexpr size_t RESERVED = 0b110011;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              VREF_DQ_RANK0.iv_byte,
-              l_field_bits,
-              "Failed bounds check for DRAM VrefDQ for Package Rank 0") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. DRAM VrefDQ for Package Rank 0: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM VrefDQ for Package Rank 1
-/// @param[out] o_output encoding of MR6 A5:A0 in JESD790-4 spec
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 141 (Bits 5~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 61
-///
-fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank1(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK1 >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // JESD79-4 specification
-    constexpr size_t RESERVED = 0b110011;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              VREF_DQ_RANK1.iv_byte,
-              l_field_bits,
-              "Failed bounds check for DRAM VrefDQ for Package Rank 1") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. DRAM VrefDQ for Package Rank 1: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM VrefDQ for Package Rank 2
-/// @param[out] o_output encoding of MR6 A5:A0 in JESD790-4 spec
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 142 (Bits 5~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 61
-///
-fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank2(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK2  >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // JESD79-4 specification
-    constexpr size_t RESERVED = 0b110011;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              VREF_DQ_RANK2.iv_byte,
-              l_field_bits,
-              "Failed bounds check for DRAM VrefDQ for Package Rank 2") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. DRAM VrefDQ for Package Rank 2: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM VrefDQ for Package Rank 3
-/// @param[out] o_output encoding of MR6 A5:A0 in JESD790-4 spec
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 143 (Bits 5~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.12.2 - 61
-///
-fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank3(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK3 >(iv_target, iv_spd_data);
-    FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-    // JESD79-4 specification
-    constexpr size_t RESERVED = 0b110011;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED,
-              VREF_DQ_RANK3.iv_byte,
-              l_field_bits,
-              "Failed bounds check for DRAM VrefDQ for Package Rank 3") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. DRAM VrefDQ for Package Rank 3: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes data buffer VrefDQ for DRAM interface
-/// @param[out] o_output encoding of F5BC6x in DDR4DB01 spec
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 144 (Bits 5~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 61
-///
-fapi2::ReturnCode decoder_v1_0::data_buffer_vref_dq(uint8_t& o_output) const
-{
-    constexpr size_t BYTE_INDEX = 144;
-    uint8_t l_raw_data = iv_spd_data[BYTE_INDEX];
-
-    // Trace in the front assists w/ debug
-    FAPI_INF("%s SPD data at Byte %d: 0x%llX.",
-             iv_target_str_storage,
-             BYTE_INDEX,
-             l_raw_data);
-
-    // DDR4DB01 spec
-    constexpr size_t RESERVED = 0b00110011;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_raw_data < RESERVED,
-              BYTE_INDEX,
-              l_raw_data,
-              "Failed bounds check for data buffer VrefDQ for DRAM interface") );
-
-    // Update output only if check passes
-    o_output = l_raw_data;
-
-    FAPI_INF("%s. Data buffer VrefDQ for DRAM interface: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM interface MDQ Drive Strenth
-/// of the data buffer component for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output encoding of F5BC6x in
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 145 - 147 (Bits 6~4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 62
-///
-fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_drive_strength(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    uint8_t l_byte = 0;
-
-    FAPI_TRY( mdq_helper(i_dimm_speed, l_byte) );
-
-    {
-        constexpr size_t START = 1;
-        constexpr size_t LEN = 3;
-        const field_t MDQ_DRIVE_STRENGTH(l_byte, START, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field( iv_target, MDQ_DRIVE_STRENGTH, iv_spd_data );
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // Lets make sure we aren't being set to a reserved field
-        bool is_reserved_bit = false;
-
-        switch(l_field_bits)
-        {
-            case 0b011:
-            case 0b100:
-            case 0b110:
-            case 0b111:
-                is_reserved_bit = true;
-                break;
-
-            default:
-                is_reserved_bit = false;
-                break;
-        }
-
-        // This checks my extracting params returns a value within bound
-        constexpr size_t MAX_VALID_VALUE = 7;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  (l_field_bits <= MAX_VALID_VALUE) &&
-                  (is_reserved_bit != true),
-                  l_byte,
-                  l_field_bits,
-                  "Failed bounds check for DRAM interface MDQ Drive Strenth") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM interface MDQ Drive Strenth: %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM interface MDQ read termination strength
-/// of the data buffer component for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output encoding of F5BC6x in
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 145 - 147 (Bits 2~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 62
-///
-fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_rtt(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    uint8_t l_byte = 0;
-
-    FAPI_TRY( mdq_helper(i_dimm_speed, l_byte) );
-
-    {
-        constexpr size_t START = 1;
-        constexpr size_t LEN = 3;
-        const field_t DATA_BUFFER_MDQ_RTT(l_byte, START, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field( iv_target, DATA_BUFFER_MDQ_RTT, iv_spd_data );
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // This checks my extracting params returns a value within bound
-        constexpr size_t MAX_VALID_VALUE = 7;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  l_field_bits <= MAX_VALID_VALUE,
-                  l_byte,
-                  l_field_bits,
-                  "Failed bounds check for DRAM interface MDQ RTT:") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM interface MDQ RTT: %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM drive strenth
-/// for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output DRAM drive strength (encoding)
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 148 (Bits 5~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 63
-///
-fapi2::ReturnCode decoder_v1_0::dram_drive_strength(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    size_t l_start = 0;
-    FAPI_TRY( drive_strength_start_bit_finder(i_dimm_speed, l_start) );
-
-    {
-        constexpr size_t BYTE_INDEX = 148;
-        constexpr size_t LEN = 2;
-        const field_t DRAM_DRIVE_STRENGTH(BYTE_INDEX, l_start, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field( iv_target, DRAM_DRIVE_STRENGTH, iv_spd_data );
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // SPD JEDEC specification
-        constexpr size_t RESERVED = 0b11;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  l_field_bits < RESERVED,
-                  BYTE_INDEX,
-                  l_field_bits,
-                  "Failed bounds check for DRAM VrefDQ for Package Rank 3") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM drive strenth: %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM ODT for RTT_NOM
-/// for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output ODT termination strength (encoding)
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 149 - 151 (Bits 2~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - (64 - 65)
-///
-fapi2::ReturnCode decoder_v1_0::dram_rtt_nom(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    size_t l_byte = 0;
-    FAPI_TRY( rtt_wr_and_nom_byte_finder(i_dimm_speed, l_byte) );
-
-    {
-        constexpr size_t START = 5;
-        constexpr size_t LEN = 3;
-        const field_t DRAM_RTT_NOM(l_byte, START, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field(iv_target,  DRAM_RTT_NOM, iv_spd_data);
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // This checks my extracting params returns a value within bound
-        constexpr size_t MAX_VALID_VALUE = 7;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  l_field_bits <= MAX_VALID_VALUE,
-                  l_byte,
-                  l_field_bits,
-                  "Failed bounds check for DRAM RTT_NOM") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM RTT_NOM: %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM ODT for RTT_WR
-/// for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output ODT termination strength (encoding)
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 149 - 151 (Bits 5~3)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - (64 - 65)
-///
-fapi2::ReturnCode decoder_v1_0::dram_rtt_wr(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    size_t l_byte = 0;
-    FAPI_TRY( rtt_wr_and_nom_byte_finder(i_dimm_speed, l_byte) );
-
-    {
-        constexpr size_t START = 2;
-        constexpr size_t LEN = 3;
-        const field_t DRAM_RTT_WR(l_byte, START, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_WR, iv_spd_data);
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // Lets make sure we aren't being set to a reserved field
-        bool is_reserved_bit = false;
-
-        switch(l_field_bits)
-        {
-            case 0b101:
-            case 0b110:
-            case 0b111:
-                is_reserved_bit = true;
-                break;
-
-            default:
-                is_reserved_bit = false;
-                break;
-        }
-
-        // This checks my extracting params returns a value within bound
-        constexpr size_t MAX_VALID_VALUE = 7;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  (l_field_bits <= MAX_VALID_VALUE) &&
-                  (is_reserved_bit != true),
-                  l_byte,
-                  l_field_bits,
-                  "Failed bounds check for DRAM RTT_WR") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM_RTT_WR: %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM ODT for RTT_PARK, package ranks 0 & 1
-/// for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output ODT termination strength (encoding)
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 152 - 154 (Bits 2~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 65
-///
-fapi2::ReturnCode decoder_v1_0::dram_rtt_park_ranks0_1(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    size_t l_byte = 0;
-    FAPI_TRY( rtt_park_byte_finder(i_dimm_speed, l_byte) );
-
-    {
-        constexpr size_t START = 5;
-        constexpr size_t LEN = 3;
-        const field_t DRAM_RTT_PARK(l_byte, START, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_PARK, iv_spd_data);
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // This checks my extracting params returns a value within bound
-        constexpr size_t MAX_VALID_VALUE = 7;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  l_field_bits <= MAX_VALID_VALUE,
-                  l_byte,
-                  l_field_bits,
-                  "Failed bounds check for DRAM RTT_PARK (package ranks 0,1)") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM RTT_PARK (package ranks 0,1): %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes DRAM ODT for RTT_PARK, package ranks 2 & 3
-/// for a particular dimm speed
-/// @param[in] i_dimm_speed the dimm speed in MT/s
-/// @param[out] o_output ODT termination strength (encoding)
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 152 - 154 (Bits 5~3)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 2
-/// @note Page 4.1.2.12.2 - 65
-///
-fapi2::ReturnCode decoder_v1_0::dram_rtt_park_ranks2_3(const uint64_t i_dimm_speed, uint8_t& o_output) const
-{
-    size_t l_byte = 0;
-    FAPI_TRY( rtt_park_byte_finder(i_dimm_speed, l_byte) );
-
-    {
-        constexpr size_t START = 2;
-        constexpr size_t LEN = 3;
-        const field_t DRAM_RTT_PARK(l_byte, START, LEN);
-
-        const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_PARK, iv_spd_data);
-        FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits);
-
-        // This checks my extracting params returns a value within bound
-        constexpr size_t MAX_VALID_VALUE = 7;
-
-        FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-                  l_field_bits <= MAX_VALID_VALUE,
-                  l_byte,
-                  l_field_bits,
-                  "Failed bounds check for DRAM RTT_PARK (package ranks 2,3)") );
-
-        // Update output only if check passes
-        o_output = l_field_bits;
-
-        FAPI_INF("%s. DRAM RTT_PARK (package ranks 2,3): %d",
-                 iv_target_str_storage,
-                 o_output);
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-}// lrdimm
-}// ddr4
-}// spd
-}// mss
diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C
deleted file mode 100644
index 3cccbb654..000000000
--- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C
+++ /dev/null
@@ -1,276 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-///
-/// @file lrdimm_decoder_v1_1.C
-/// @brief LRDIMM module SPD decoder definitions for revision 1.1
-///
-// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
-// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: HB:FSP
-
-// std lib
-#include <vector>
-
-// fapi2
-#include <fapi2.H>
-
-// mss lib
-#include <generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H>
-#include <generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H>
-#include <generic/memory/lib/spd/spd_checker.H>
-#include <generic/memory/lib/utils/c_str.H>
-#include <generic/memory/lib/utils/find.H>
-
-using fapi2::TARGET_TYPE_MCA;
-using fapi2::TARGET_TYPE_MCS;
-using fapi2::TARGET_TYPE_DIMM;
-
-namespace mss
-{
-namespace spd
-{
-namespace ddr4
-{
-namespace lrdimm
-{
-
-///
-/// @brief Decodes register and data buffer types
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 131 (Bits 7~4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 63
-///
-fapi2::ReturnCode decoder_v1_1::register_and_buffer_type(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< REGISTER_TYPE >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t RESERVED = 2;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits < RESERVED, // extract sanity check
-              REGISTER_TYPE.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register and Data Buffer Types") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register and Data Buffer Types: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-
-}
-
-///
-/// @brief Decodes register output drive strength for CKE signal
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (Bits 1~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 65
-///
-fapi2::ReturnCode decoder_v1_1::cke_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< CKE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              CKE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for CKE") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for CKE: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for ODT signal
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (Bits 3~2)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 65
-///
-fapi2::ReturnCode decoder_v1_1::odt_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< ODT_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              ODT_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for ODT") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for ODT: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for control signal (CS) signal
-/// @param[out] o_output encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 137 (Bits 6~7)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 65
-///
-fapi2::ReturnCode decoder_v1_1::cs_signal_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< CS_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              CS_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for CS") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for CS: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for clock (B side)
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bits 1~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 66
-///
-fapi2::ReturnCode decoder_v1_1::b_side_clk_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< B_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              B_SIDE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for clock (Y0,Y2)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for clock (Y0,Y2): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for clock (A side)
-/// @param[out] o_output drive strength encoding from SPD
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bits 3~2)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 3
-/// @note Page 4.1.2.12.3 - 66
-///
-fapi2::ReturnCode decoder_v1_1::a_side_clk_output_driver(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< A_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 3;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL,
-              A_SIDE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for clock (Y1,Y3)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for clock (Y1,Y3): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-}// lrdimm
-}// ddr4
-}// spd
-}// mss
diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C
deleted file mode 100644
index 029ad635e..000000000
--- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C
+++ /dev/null
@@ -1,310 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C $ */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-///
-/// @file lrdimm_decoder_v1_2.C
-/// @brief LRDIMM module SPD decoder definitions for revision 1.2
-///
-// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
-// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: HB:FSP
-
-// std lib
-#include <vector>
-
-// fapi2
-#include <fapi2.H>
-
-// mss lib
-#include <generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H>
-#include <generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H>
-#include <generic/memory/lib/spd/spd_checker.H>
-#include <generic/memory/lib/utils/c_str.H>
-#include <generic/memory/lib/utils/find.H>
-
-using fapi2::TARGET_TYPE_MCA;
-using fapi2::TARGET_TYPE_MCS;
-using fapi2::TARGET_TYPE_DIMM;
-
-namespace mss
-{
-namespace spd
-{
-namespace ddr4
-{
-namespace lrdimm
-{
-
-///
-/// @brief Decodes register output drive strength for data buffer control (BCOM, BODT, BKCE)
-/// @param[out] o_output encoded drive strength
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bit 4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.12.3 - 76
-///
-fapi2::ReturnCode decoder_v1_2::bcom_bcke_bodt_drive_strength(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< BCOM_BODT_BCKE_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL,
-              BCOM_BODT_BCKE_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for data buffer control (BCOM, BODT, BCKE)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for data buffer control (BCOM, BODT, BCKE): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes register output drive strength for data buffer control (BCK)
-/// @param[out] o_output encoded drive strength
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bit 5)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.12.3 - 76
-///
-fapi2::ReturnCode decoder_v1_2::bck_output_drive_strength(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< BCK_DRIVE_STRENGTH >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL,
-              BCK_DRIVE_STRENGTH.iv_byte,
-              l_field_bits,
-              "Failed bounds check for Register Output Driver for data buffer control (BCK)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Register Output Driver for data buffer control (BCK): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes RCD output slew rate control
-/// @param[out] o_output encoded drive strength
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 138 (Bit 6)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.L-4 - 76
-///
-fapi2::ReturnCode decoder_v1_2::slew_rate_control(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< RCD_SLEW_CNTRL >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 0b1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              RCD_SLEW_CNTRL.iv_byte,
-              l_field_bits,
-              "Failed bound check for RCD output slew rate control") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. RCD output slew rate control: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes VrefDQ range for DRAM interface range
-/// @param[out] o_output spd encoding
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 155 (Bits 3~0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.L-4 - 76
-///
-fapi2::ReturnCode decoder_v1_2::dram_vref_dq_range(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< DRAM_VREF_DQ_RANGE >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 0b1111;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              DRAM_VREF_DQ_RANGE.iv_byte,
-              l_field_bits,
-              "Failed bound check for VrefDQ range for DRAM interface range ") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. VrefDQ range for DRAM interface range: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes data buffer VrefDQ range for DRAM interface range
-/// @param[out] o_output spd encoding
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 155 (Bit 4)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.L-4 - 76
-///
-fapi2::ReturnCode decoder_v1_2::data_buffer_vref_dq_range(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< DATA_BUFFER_VREF_DQ >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              DATA_BUFFER_VREF_DQ.iv_byte,
-              l_field_bits,
-              "Failed bound check for data buffer VrefDQ range for DRAM interface range") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Data buffer VrefDQ range for DRAM interface range: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes data buffer gain adjustment
-/// @param[out] o_output spd encoding
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 156 (Bit 0)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.L-4 - 77
-///
-fapi2::ReturnCode decoder_v1_2::data_buffer_gain_adjustment(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< DATA_BUFFER_GAIN_ADJUST >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              DATA_BUFFER_GAIN_ADJUST.iv_byte,
-              l_field_bits,
-              "Failed bound check for data buffer gain adjustment") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Data buffer gain adjustment: %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
-/// @brief Decodes data buffer Decision Feedback Equalization (DFE)
-/// @param[out] o_output spd encoding
-/// @return FAPI2_RC_SUCCESS if okay
-/// @note SPD Byte 156 (Bit 1)
-/// @note Item JEDEC Standard No. 21-C
-/// @note DDR4 SPD Document Release 4
-/// @note Page 4.1.2.L-4 - 77
-///
-fapi2::ReturnCode decoder_v1_2::data_buffer_dfe(uint8_t& o_output) const
-{
-    // Extracting desired bits
-    uint8_t l_field_bits = extract_spd_field< DATA_BUFFER_DFE >(iv_target, iv_spd_data);
-    FAPI_INF("Field Bits value: %d", l_field_bits);
-
-    // This checks my extracting params returns a value within bound
-    constexpr size_t MAX_VALID_VAL = 1;
-
-    FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target,
-              l_field_bits <= MAX_VALID_VAL, // extract sanity check
-              DATA_BUFFER_DFE.iv_byte,
-              l_field_bits,
-              "Failed bound check for data buffer Decision Feedback Equalization (DFE)") );
-
-    // Update output only if check passes
-    o_output = l_field_bits;
-
-    FAPI_INF("%s. Data buffer Decision Feedback Equalization (DFE): %d",
-             iv_target_str_storage,
-             o_output);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-}// lrdimm
-}// ddr4
-}// spd
-}// mss