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author | Andre A. Marin <aamarin@us.ibm.com> | 2019-04-15 14:41:46 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-04-25 12:39:26 -0500 |
commit | 508ddc960ec66dd9d6b312eb699589f3431dad1d (patch) | |
tree | f71c402b6715705fa224cfc483a9560bf20ebf17 /src/import/generic/memory/lib/mss_generic_attribute_getters.H | |
parent | 357441ef8b732b8f2b0a697d2ae7c368b3646649 (diff) | |
download | talos-hostboot-508ddc960ec66dd9d6b312eb699589f3431dad1d.tar.gz talos-hostboot-508ddc960ec66dd9d6b312eb699589f3431dad1d.zip |
Add mem_size and misc attrs, unit tests enable
Consulting w/PRD (Zane), ATTR_EFF_DIMM_RANK_CONFIGED
is not required to be initialized early in the ipl flow.
So we move it from pre_eff_config to eff_config.
Added attr_derived_engine to set attrs derived
from other attrs or hardcodes. Updated unit tests.
Added attrs not set in exp_draminit implementation of
eff_config
Change-Id: I0bb5e1913160d2cd0224cbb8566b7548eabe46d4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75440
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75575
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/generic/memory/lib/mss_generic_attribute_getters.H')
-rw-r--r-- | src/import/generic/memory/lib/mss_generic_attribute_getters.H | 120 |
1 files changed, 106 insertions, 14 deletions
diff --git a/src/import/generic/memory/lib/mss_generic_attribute_getters.H b/src/import/generic/memory/lib/mss_generic_attribute_getters.H index f16829f3b..c8fd30b63 100644 --- a/src/import/generic/memory/lib/mss_generic_attribute_getters.H +++ b/src/import/generic/memory/lib/mss_generic_attribute_getters.H @@ -1464,14 +1464,60 @@ fapi_try_exit: } /// +/// @brief ATTR_MEM_EFF_PRIM_DIE_COUNT getter +/// @param[in] const ref to the TARGET_TYPE_DIMM +/// @param[out] uint8_t& reference to store the value +/// @note Generated by gen_accessors.pl generate_mc_port_params +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note ARRAY[DIMM] Primary SDRAM Die Count. Decodes Byte 6 (bits 6~4). +/// +inline fapi2::ReturnCode get_prim_die_count(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2] = {}; + const auto l_port = i_target.getParent<fapi2::TARGET_TYPE_MEM_PORT>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_PRIM_DIE_COUNT, l_port, l_value) ); + o_value = l_value[mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed getting ATTR_MEM_EFF_PRIM_DIE_COUNT: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MEM_EFF_PRIM_DIE_COUNT getter +/// @param[in] const ref to the TARGET_TYPE_MEM_PORT +/// @param[out] uint8_t&[] array reference to store the value +/// @note Generated by gen_accessors.pl generate_mc_port_params +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note ARRAY[DIMM] Primary SDRAM Die Count. Decodes Byte 6 (bits 6~4). +/// +inline fapi2::ReturnCode get_prim_die_count(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target, + uint8_t (&o_array)[2]) +{ + uint8_t l_value[2] = {}; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_PRIM_DIE_COUNT, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed getting ATTR_MEM_EFF_PRIM_DIE_COUNT: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// /// @brief ATTR_MEM_EFF_PRIM_STACK_TYPE getter /// @param[in] const ref to the TARGET_TYPE_DIMM /// @param[out] uint8_t& reference to store the value /// @note Generated by gen_accessors.pl generate_mc_port_params /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note ARRAY[DIMM] Primary SDRAM Package Type. Decodes Byte 6. This byte defines the primary -/// set of SDRAMs. Monolithic = SPD, Multi-load stack = DDP/QDP, Single-load stack = -/// 3DS +/// @note ARRAY[DIMM] Primary SDRAM Package Type (bits 1~0). Decodes Byte 6. This byte defines +/// the primary set of SDRAMs. Monolithic = SPD, Multi-load stack = DDP/QDP, Single-load +/// stack = 3DS /// inline fapi2::ReturnCode get_prim_stack_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) { @@ -1494,9 +1540,9 @@ fapi_try_exit: /// @param[out] uint8_t&[] array reference to store the value /// @note Generated by gen_accessors.pl generate_mc_port_params /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note ARRAY[DIMM] Primary SDRAM Package Type. Decodes Byte 6. This byte defines the primary -/// set of SDRAMs. Monolithic = SPD, Multi-load stack = DDP/QDP, Single-load stack = -/// 3DS +/// @note ARRAY[DIMM] Primary SDRAM Package Type (bits 1~0). Decodes Byte 6. This byte defines +/// the primary set of SDRAMs. Monolithic = SPD, Multi-load stack = DDP/QDP, Single-load +/// stack = 3DS /// inline fapi2::ReturnCode get_prim_stack_type(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target, uint8_t (&o_array)[2]) @@ -1514,6 +1560,52 @@ fapi_try_exit: } /// +/// @brief ATTR_MEM_EFF_PRIM_BUS_WIDTH getter +/// @param[in] const ref to the TARGET_TYPE_DIMM +/// @param[out] uint8_t& reference to store the value +/// @note Generated by gen_accessors.pl generate_mc_port_params +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note ARRAY[DIMM] Primary bus with (bits 1~0). Decodes Byte 13. +/// +inline fapi2::ReturnCode get_prim_bus_width(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2] = {}; + const auto l_port = i_target.getParent<fapi2::TARGET_TYPE_MEM_PORT>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_PRIM_BUS_WIDTH, l_port, l_value) ); + o_value = l_value[mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed getting ATTR_MEM_EFF_PRIM_BUS_WIDTH: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MEM_EFF_PRIM_BUS_WIDTH getter +/// @param[in] const ref to the TARGET_TYPE_MEM_PORT +/// @param[out] uint8_t&[] array reference to store the value +/// @note Generated by gen_accessors.pl generate_mc_port_params +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note ARRAY[DIMM] Primary bus with (bits 1~0). Decodes Byte 13. +/// +inline fapi2::ReturnCode get_prim_bus_width(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target, + uint8_t (&o_array)[2]) +{ + uint8_t l_value[2] = {}; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_PRIM_BUS_WIDTH, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed getting ATTR_MEM_EFF_PRIM_BUS_WIDTH: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// /// @brief ATTR_MEM_EFF_DRAM_PPR getter /// @param[in] const ref to the TARGET_TYPE_DIMM /// @param[out] uint8_t& reference to store the value @@ -1968,7 +2060,7 @@ fapi_try_exit: } /// -/// @brief ATTR_MEM_EFF_NUM_RANKS_PER_DIMM getter +/// @brief ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM getter /// @param[in] const ref to the TARGET_TYPE_DIMM /// @param[out] uint8_t& reference to store the value /// @note Generated by gen_accessors.pl generate_mc_port_params @@ -1979,24 +2071,24 @@ fapi_try_exit: /// number of logical ranks per DIMM. Logical rank refers the individually addressable /// die in a 3DS stack and has no meaning for monolithic or multi-load stacked SDRAMs. /// -inline fapi2::ReturnCode get_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, +inline fapi2::ReturnCode get_logical_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) { uint8_t l_value[2] = {}; const auto l_port = i_target.getParent<fapi2::TARGET_TYPE_MEM_PORT>(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_NUM_RANKS_PER_DIMM, l_port, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM, l_port, l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed getting ATTR_MEM_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", + FAPI_ERR("failed getting ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_MEM_EFF_NUM_RANKS_PER_DIMM getter +/// @brief ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM getter /// @param[in] const ref to the TARGET_TYPE_MEM_PORT /// @param[out] uint8_t&[] array reference to store the value /// @note Generated by gen_accessors.pl generate_mc_port_params @@ -2007,17 +2099,17 @@ fapi_try_exit: /// number of logical ranks per DIMM. Logical rank refers the individually addressable /// die in a 3DS stack and has no meaning for monolithic or multi-load stacked SDRAMs. /// -inline fapi2::ReturnCode get_num_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target, +inline fapi2::ReturnCode get_logical_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target, uint8_t (&o_array)[2]) { uint8_t l_value[2] = {}; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_NUM_RANKS_PER_DIMM, i_target, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM, i_target, l_value) ); memcpy(o_array, &l_value, 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed getting ATTR_MEM_EFF_NUM_RANKS_PER_DIMM: 0x%lx (target: %s)", + FAPI_ERR("failed getting ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } |