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authorShelton Leung <sleung@us.ibm.com>2016-05-26 18:05:32 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2016-07-05 14:26:46 -0400
commite10c05e00df8649c94965746ebfa07267b315443 (patch)
tree7e9f10c038569e88a2d45d8efdd5b5efe85e97b7 /src/import/chips
parent6ae7434ab89e9fdc53bf50cf932452e7ce4eb9f7 (diff)
downloadtalos-hostboot-e10c05e00df8649c94965746ebfa07267b315443.tar.gz
talos-hostboot-e10c05e00df8649c94965746ebfa07267b315443.zip
MCA,MCBIST,MCS (all files in one, no 2 part thing anymore)
Change-Id: I4ea7b43d0c3334be5c2466d68ee15d031ab7836e Original-Change-Id: I043c035b91fc03bd29648ca2723a1ee318b56bf6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25099 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26641 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r--src/import/chips/p9/initfiles/p9.mc.scan.initfile36
-rw-r--r--src/import/chips/p9/initfiles/p9.mca.scom.initfile172
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.C86
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.H41
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.mk29
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C129
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.C212
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.H19
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C64
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.H19
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.mk2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C18
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C50
15 files changed, 796 insertions, 89 deletions
diff --git a/src/import/chips/p9/initfiles/p9.mc.scan.initfile b/src/import/chips/p9/initfiles/p9.mc.scan.initfile
new file mode 100644
index 000000000..92e34a968
--- /dev/null
+++ b/src/import/chips/p9/initfiles/p9.mc.scan.initfile
@@ -0,0 +1,36 @@
+SyntaxVersion = 3
+
+target_type 0 TARGET_TYPE_MCBIST;
+
+# RELIC FROM sample.mc.scan.initfile
+# unconditional idial, test binary data input
+## TODO: test when side eCMD release available (supporting putspy to mcbist target type)
+# ispy MCP.PORT0.WRITE.ASYNC_INJ [when=L] {
+# spyv;
+# 0b101;
+# }
+
+##########################
+# MC TEAM DICTATED INITS #
+##########################
+
+# FOR DD1 Prefetch Limit needs to be scan init to 0 because SCOM is broken (HW366248)
+# Always OR-ed with previous value. Essentially we can only set bits, not clear. So we want to scan init to 0.
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ spyv;
+ 0b000000;
+}
+ispy MC01.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ spyv;
+ 0b000000;
+}
+ispy MC01.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ spyv;
+ 0b000000;
+}
+ispy MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ spyv;
+ 0b000000;
+}
+
+
diff --git a/src/import/chips/p9/initfiles/p9.mca.scom.initfile b/src/import/chips/p9/initfiles/p9.mca.scom.initfile
index ef5392325..013bc45a8 100644
--- a/src/import/chips/p9/initfiles/p9.mca.scom.initfile
+++ b/src/import/chips/p9/initfiles/p9.mca.scom.initfile
@@ -5,18 +5,17 @@
#--******************************************************************************
#-- ISSUES TO RESOVLE
#--******************************************************************************
-# ANDRE missing attributes
-# ATTR_EFF_TCCD_S disappeared (temp commented to 4 for now)
+#
#--******************************************************************************
#-- IMPORTANT SUPPORT NOTES AS OF 4/21/2016
#--******************************************************************************
# Currently only supports DIMMS where CL=TRCD=TRP (ie 16-16-16)
# Steve Powell says he's seen DIMMs that don't match
# What needs to be done to support other DIMMs
-# Replace def_MEM_TYPE_1866_13_13_13 variables with freq+CL variables
+# Replace def_MEM_TYPE_1866_13_13_13 variables with freq+CL variables
# Because TRCD and TRP don't really matter for the equations that this variable is being used for
# So we should rewrite these equations in terms of just freq+CL
-# Here we assume WL = ATTR_EFF_DRAM_CWL (which is true if no Additive Latency / Posted CAS).
+# Here we assume WL = ATTR_EFF_DRAM_CWL (which is true if no Additive Latency / Posted CAS).
# So no support for Posted CAS / Additive latency
# Only supports Burst Length 8 (CODE AND LOGIC STATEMENT)
# Initfile is hardcoded assuming BL=8 and BL/2=4
@@ -24,36 +23,50 @@
# If other burst lengths are to be supported, a logic change would be required
# Only supports RDIMM with RDIMM and LRDIMM with LRDIMM, no mixing (CODE AND LOGIC STATEMENT)
# Logic would have to support different wr data delays to differen DIMMs. It does NOT.
+#
+#--******************************************************************************
+#-- FUTURE ENHANCEMENTS
+#--******************************************************************************
# Enhancements to be done later: ATTR_EFF_RDTAG_DLY and ATTR_EFF_WRDATA_DLY attributes
# What needs to be done to support other DIMMs
# ATTR_EFF_RDTAG_DLY and ATTR_EFF_WRDATA_DLY attributes (better to calculate in code than init file)
# MBA_DSM0Q_CFG_RDTAG_DLY to use ATTR_EFF_RDTAG_DLY
# MBA_DSM0Q_CFG_WRDATA_DLY to use ATTR_EFF_WRDATA_DLY
+# ATTR_EFF_TCCD_S attribute (hardcoded to 4 for now)
-## References for file
-# /gsa/ausgsa-h3/15/sleung/ekb/
+#--******************************************************************************
+#-- REFERENCES FOR FILE
+#--******************************************************************************
# Files used to check what target type attributes are
-# ekb/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
-# ekb/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml
+# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml
# Example:
# <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id>
# <targetType>TARGET_TYPE_MCS</targetType>
# File used to see if attribute is 1D or 2D array
-# ekb/output/gen/attribute_ids.H
+# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/output/gen/attribute_ids.H
# Example:
# typedef uint8_t ATTR_EFF_DIMM_TYPE_Type[2][2];
# File for finding correct spydef name
-# /afs/awd.austin.ibm.com/projects/eclipz/lab/p9/vbu_models/n10_e9035_tp035_ec138u51a_soa_sc_u073_01/edc/*.spydef
+# 1st find the spydef file this ekb build is looking at by finding SPYDEF_FILE_LOCATION in file below
+# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/tools/ifCompiler/scan_procedures.mk
+# 2nd open *.spydef in that dir and search for spy names
+# /afs/awd/projects/eclipz/lab/p9/vbu_models/n10_e9050_tp046_ec150u01a_soa_sc_u138_01/edc/*.spydef
# (File comes from actually building a vbu file and looking at the spydef)
# Example:
# idial MCP.PORT1.SRQ.PC.MBAREF0Q_CFG_TRFC {
# Wrapper file calling this
-# ekb/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
+# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
# Output file generated
-# ekb/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C
+# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C
+#
+# COMMON DEBUG
+# -debug5.16.i6.d
+# If complaining unsupported attribute, try commenting out of attribute in attribute file
+# If complaining memory fault, maybe wrong integer length in attribute file
+
-
#--******************************************************************************
#-- Required keywords/variables
#--******************************************************************************
@@ -63,9 +76,12 @@ SyntaxVersion = 3
target_type 0 TARGET_TYPE_MCA;
target_type 1 TARGET_TYPE_MCBIST;
target_type 2 TARGET_TYPE_MCS;
+target_type 3 TARGET_TYPE_SYSTEM;
+
define MCBIST = TGT1; # If referencing Attr from mcbist, add "MCBIST." in front
define MCS = TGT2; # If referencing Attr from mcs, add "MCS." in front
+define SYS = TGT3; # If referencing Attr from system, add "SYS." in front
#--******************************************************************************
#-- Systems Config
@@ -80,7 +96,7 @@ define def_POSITION = ATTR_CHIP_UNIT_POS;
define def_PORT_INDEX = def_POSITION % 2;
# define frequency range for potential support of sync mode
-define def_MSS_FREQ_EQ_1866 = ( (MCBIST.ATTR_MSS_FREQ<1867));
+define def_MSS_FREQ_EQ_1866 = ( (MCBIST.ATTR_MSS_FREQ<1867));
define def_MSS_FREQ_EQ_2133 = ((MCBIST.ATTR_MSS_FREQ>=1867) && (MCBIST.ATTR_MSS_FREQ<2134));
define def_MSS_FREQ_EQ_2400 = ((MCBIST.ATTR_MSS_FREQ>=2134) && (MCBIST.ATTR_MSS_FREQ<2401));
define def_MSS_FREQ_EQ_2667 = ((MCBIST.ATTR_MSS_FREQ>=2667) );
@@ -96,7 +112,7 @@ define def_MEM_TYPE_2667_18_18_18 = def_MSS_FREQ_EQ_2667 && ( MCS.ATTR_E
define def_MEM_TYPE_2667_19_19_19 = def_MSS_FREQ_EQ_2667 && ( MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] == 19 ) && ( MCS.ATTR_EFF_DRAM_TRCD[def_PORT_INDEX] == 19 ) && ( MCS.ATTR_EFF_DRAM_TRP[def_PORT_INDEX] == 19 );
define def_MEM_TYPE_2667_20_20_20 = def_MSS_FREQ_EQ_2667 && ( MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] == 20 ) && ( MCS.ATTR_EFF_DRAM_TRCD[def_PORT_INDEX] == 20 ) && ( MCS.ATTR_EFF_DRAM_TRP[def_PORT_INDEX] == 20 );
-define def_NUM_RANKS = ( MCS.ATTR_EFF_NUM_RANKS_PER_DIMM[def_PORT_INDEX][0]
+define def_NUM_RANKS = ( MCS.ATTR_EFF_NUM_RANKS_PER_DIMM[def_PORT_INDEX][0]
+ MCS.ATTR_EFF_NUM_RANKS_PER_DIMM[def_PORT_INDEX][1] );
define def_REFRESH_INTERVAL = ((MCS.ATTR_EFF_DRAM_TREFI[def_PORT_INDEX])/(8*def_NUM_RANKS));
define def_RANK_SWITCH_TCK = 4 + ((MCBIST.ATTR_MSS_FREQ-1866)/267); # 1866: 4 2133: 5 2400: 6 2667: 7
@@ -106,45 +122,41 @@ define def_BUS_TURNAROUND_TCK = 4 + ((MCBIST.ATTR_MSS_FREQ-1866)/267);
#-- Dial Assignments
#--******************************************************************************
-# TMR0 SCOM REGISTER #
+# TMR0 SCOM REGISTER #
# DRAM TIMING PARAMETERS #
-
+
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RRDM_DLY [when=S] { # BL/2+rank_switch
spyv;
- 4 + def_RANK_SWITCH_TCK;
+ 4 + def_RANK_SWITCH_TCK;
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RRSMSR_DLY [when=S] { # tccd_s
spyv;
- # ATTR_EFF_TCCD_S;
4;
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RRSMDR_DLY [when=S] { # tccd_s
spyv;
- # ATTR_EFF_TCCD_S;
4;
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RROP_DLY [when=S] { # tccd_l
spyv;
- MCS.ATTR_EFF_DRAM_TCCD_L[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TCCD_L[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_WWDM_DLY [when=S] { # BL/2+rank_switch
spyv;
- 4 + def_RANK_SWITCH_TCK;
+ 4 + def_RANK_SWITCH_TCK;
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_WWSMSR_DLY [when=S] { # tccd_s
spyv;
- # ATTR_EFF_TCCD_S;
4;
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_WWSMDR_DLY [when=S] { # tccd_s
spyv;
- # ATTR_EFF_TCCD_S;
4;
}
@@ -155,22 +167,22 @@ ispy MCP.PORT0.SRQ.MBA_TMR0Q_WWOP_DLY [when=S] { # tccd_l
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RWDM_DLY [when=S] { # (RL+BL/2+turn_around)-WL
spyv;
- MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RWSMSR_DLY [when=S] { # (RL+BL/2+turn_around)-WL
spyv;
- MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_RWSMDR_DLY [when=S] { # (RL+BL/2+turn_around)-WL
spyv;
- MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_WRDM_DLY [when=S] { # (WL+BL/2+turn_around)-RL
spyv;
- MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX] + 4 + def_BUS_TURNAROUND_TCK - MCS.ATTR_EFF_DRAM_CL[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR0Q_WRSMSR_DLY [when=S] { # WL+BL/2+(Twtr_s/clock period)
@@ -184,37 +196,37 @@ ispy MCP.PORT0.SRQ.MBA_TMR0Q_WRSMDR_DLY [when=S] { # WL+BL/2+Twtr_s
}
-# TMR1 SCOM REGISTER #
+# TMR1 SCOM REGISTER #
# DRAM TIMING PARAMETERS #
ispy MCP.PORT0.SRQ.MBA_TMR1Q_RRSBG_DLY [when=S] { # tCCDL
spyv;
- MCS.ATTR_EFF_DRAM_TCCD_L[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TCCD_L[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_WRSBG_DLY [when=S] { # WL+BL/2+Twtr_l
spyv;
- MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX] + 4 + MCS.ATTR_EFF_DRAM_TWTR_L[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX] + 4 + MCS.ATTR_EFF_DRAM_TWTR_L[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_TFAW [when=S] {
spyv;
- MCS.ATTR_EFF_DRAM_TFAW[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TFAW[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_TRCD [when=S] {
spyv;
- MCS.ATTR_EFF_DRAM_TRCD[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TRCD[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_TRP [when=S] {
spyv;
- MCS.ATTR_EFF_DRAM_TRP[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TRP[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_TRAS [when=S] {
spyv;
- MCS.ATTR_EFF_DRAM_TRAS[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TRAS[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_WR2PRE [when=S] { # CWL+BL/2+Twr
@@ -222,14 +234,14 @@ ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_WR2PRE [when=S] { # CWL+BL/2+Twr
MCS.ATTR_EFF_DRAM_CWL[def_PORT_INDEX] + 4 + MCS.ATTR_EFF_DRAM_TWR[def_PORT_INDEX];
}
-ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_RD2PRE [when=S] {
+ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_RD2PRE [when=S] {
spyv;
- MCS.ATTR_EFF_DRAM_TRTP[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TRTP[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_TRRD [when=S] {
spyv;
- MCS.ATTR_EFF_DRAM_TRRD_S[def_PORT_INDEX];
+ MCS.ATTR_EFF_DRAM_TRRD_S[def_PORT_INDEX];
}
ispy MCP.PORT0.SRQ.MBA_TMR1Q_TRRD_SBG [when=S] {
@@ -246,7 +258,7 @@ ispy MCP.PORT0.SRQ.MBA_TMR1Q_CFG_ACT_TO_DIFF_RANK_DLY [when=S] {
}
-# DSM0 SCOM REGISTER #
+# DSM0 SCOM REGISTER #
# DRAM TIMING PARAMETERS #
# TODO ANDRE will make ATTR_EFF_RDTAG_DLY a precalculated attribute
@@ -265,7 +277,7 @@ ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_RDTAG_DLY [when=S] { # ATTR_EFF_DIMM_T
19, ((def_MEM_TYPE_2667_18_18_18==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1));
20, ((def_MEM_TYPE_2667_19_19_19==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1));
21, ((def_MEM_TYPE_2667_20_20_20==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1));
-
+
16, ((def_MEM_TYPE_1866_13_13_13==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
17, ((def_MEM_TYPE_1866_14_14_14==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
18, ((def_MEM_TYPE_2133_15_15_15==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
@@ -277,7 +289,7 @@ ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_RDTAG_DLY [when=S] { # ATTR_EFF_DIMM_T
22, ((def_MEM_TYPE_2667_19_19_19==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
23, ((def_MEM_TYPE_2667_20_20_20==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
}
-
+
# TODO ANDRE will make ATTR_EFF_WRDATA_DLY a precalculated attribute
ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_WRDATA_DLY [when=S] {
# spyv;
@@ -287,7 +299,7 @@ ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_WRDATA_DLY [when=S] {
4, ((def_MSS_FREQ_EQ_2133==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1));
5, ((def_MSS_FREQ_EQ_2400==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1));
6, ((def_MSS_FREQ_EQ_2667==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==1));
-
+
2, ((def_MSS_FREQ_EQ_1866==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
3, ((def_MSS_FREQ_EQ_2133==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
4, ((def_MSS_FREQ_EQ_2400==1) && (MCS.ATTR_EFF_DIMM_TYPE[def_PORT_INDEX][0]==3));
@@ -296,7 +308,7 @@ ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_WRDATA_DLY [when=S] {
ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_WRDONE_DLY [when=S] {
spyv;
- 24;
+ 24;
}
ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_RODT_START_DLY [when=S] {
@@ -337,16 +349,16 @@ ispy MCP.PORT0.SRQ.MBA_DSM0Q_CFG_WODT_END_DLY [when=S] {
6;
}
-# FARB0 SCOM REGISTER #
+# FARB0 SCOM REGISTER #
espy MCP.PORT0.SRQ.MBA_FARB0Q_CFG_PARITY_AFTER_CMD [when=S] {
spyv;
ON;
}
-# REF0 SCOM REGISTER #
+# REF0 SCOM REGISTER #
-#gdial std_size 4gbx4 (8GB rank)
+#gdial std_size 4gbx4 (8GB rank)
ispy MCP.PORT0.SRQ.PC.MBAREF0Q_CFG_REFRESH_INTERVAL [when=S] {
spyv;
@@ -363,7 +375,7 @@ ispy MCP.PORT0.SRQ.PC.MBAREF0Q_CFG_REFR_TSV_STACK [when=S] {
MCS.ATTR_EFF_DRAM_TRFC_DLR[def_PORT_INDEX];
}
-# RPC0 SCOM REGISTER #
+# RPC0 SCOM REGISTER #
ispy MCP.PORT0.SRQ.PC.MBARPC0Q_CFG_PUP_PDN [when=S] { # tCKE
spyv, expr;
@@ -389,7 +401,7 @@ ispy MCP.PORT0.SRQ.PC.MBARPC0Q_CFG_PUP_AVAIL [when=S] { # tXP
9, (def_MSS_FREQ_EQ_2667==1);
}
-# STR0 SCOM REGISTER #
+# STR0 SCOM REGISTER #
ispy MCP.PORT0.SRQ.PC.MBASTR0Q_CFG_TCKSRE [when=S] {
spyv, expr;
@@ -421,3 +433,67 @@ ispy MCP.PORT0.SRQ.PC.MBASTR0Q_CFG_TXSDLL [when=S] {
}
+####################################################
+# Force clock enable high DD1 Periodics Issue
+####################################################
+
+espy MCP.PORT0.SRQ.MBA_FARB0Q_CFG_OE_ALWAYS_ON [when=S]{
+ spyv;
+ ON;
+}
+
+
+
+####################################################
+# MCS SCOMS MOVED HERE (USING BEN GASS DLL OVERRIDE)
+####################################################
+
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_JITTER_EPSILON [when=S] {
+ spyv;
+ 0x1;
+}
+
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_LOCAL_NODE_EPSILON [when=S] {
+ spyv;
+ SYS.ATTR_PROC_EPS_READ_CYCLES_T0 / 4;
+}
+
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_NEAR_NODAL_EPSILON [when=S] {
+ spyv;
+ SYS.ATTR_PROC_EPS_READ_CYCLES_T1 / 4;
+}
+
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_REMOTE_NODAL_EPSILON [when=S] {
+ spyv;
+ SYS.ATTR_PROC_EPS_READ_CYCLES_T2 / 4;
+}
+
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_GROUP_EPSILON [when=S] {
+ spyv;
+ SYS.ATTR_PROC_EPS_READ_CYCLES_T1 / 4;
+}
+
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_VECTOR_GROUP_EPSILON [when=S] {
+ spyv;
+ SYS.ATTR_PROC_EPS_READ_CYCLES_T2 / 4;
+}
+
+# MC TEAM DICTATED INITS #
+
+# HW366164
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_SQ_LFSR_CNTL [when=S] {
+ spyv;
+ 0b0100;
+}
+
+
+espy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_EN_ALT_CR [when=S] {
+ spyv;
+ OFF;
+}
+
+# HW366248
+ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=S] {
+ spyv;
+ 0b000000;
+}
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.C
new file mode 100644
index 000000000..9688c8b2c
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.C
@@ -0,0 +1,86 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/hwp/initfiles/p9_mc_scan.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#include "p9_mc_scan.H"
+#include <stdint.h>
+#include <stddef.h>
+#include <fapi2.H>
+
+using namespace fapi2;
+
+constexpr auto literal_0b000000 = 0b000000;
+
+fapi2::ReturnCode p9_mc_scan(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT0)
+{
+ fapi2::ReturnCode l_rc = 0;
+
+ do
+ {
+ {
+ fapi2::variable_buffer l_MC01_PORT0_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT(6);
+ l_MC01_PORT0_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT.insertFromRight<uint64_t>(literal_0b000000, 0, 6);
+ l_rc = fapi2::putSpy(TGT0, "MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT",
+ l_MC01_PORT0_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putSpy (MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT)");
+ break;
+ }
+ }
+ {
+ fapi2::variable_buffer l_MC01_PORT1_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT(6);
+ l_MC01_PORT1_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT.insertFromRight<uint64_t>(literal_0b000000, 0, 6);
+ l_rc = fapi2::putSpy(TGT0, "MC01.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT",
+ l_MC01_PORT1_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putSpy (MC01.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT)");
+ break;
+ }
+ }
+ {
+ fapi2::variable_buffer l_MC01_PORT2_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT(6);
+ l_MC01_PORT2_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT.insertFromRight<uint64_t>(literal_0b000000, 0, 6);
+ l_rc = fapi2::putSpy(TGT0, "MC01.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT",
+ l_MC01_PORT2_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putSpy (MC01.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT)");
+ break;
+ }
+ }
+ {
+ fapi2::variable_buffer l_MC01_PORT3_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT(6);
+ l_MC01_PORT3_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT.insertFromRight<uint64_t>(literal_0b000000, 0, 6);
+ l_rc = fapi2::putSpy(TGT0, "MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT",
+ l_MC01_PORT3_ATCL_CL_CLSCOM_MCPERF0_PREFETCH_LIMIT);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putSpy (MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT)");
+ break;
+ }
+ }
+ }
+ while (0);
+
+ return l_rc;
+}
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.H
new file mode 100644
index 000000000..5137b4471
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.H
@@ -0,0 +1,41 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/hwp/initfiles/p9_mc_scan.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef _INIT_P9_MC_SCAN_PROCEDURE_H_
+#define _INIT_P9_MC_SCAN_PROCEDURE_H_
+
+
+#include <stddef.h>
+#include <stdint.h>
+#include <fapi2.H>
+
+#ifdef IFCOMPILER_PLAT
+#define INITFILE_PROCEDURE \
+ p9_mc_scan(TGT0);
+#endif
+
+typedef fapi2::ReturnCode (*p9_mc_scan_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&);
+
+extern "C"
+{
+
+ fapi2::ReturnCode p9_mc_scan(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT0);
+
+}
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.mk b/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.mk
new file mode 100644
index 000000000..27d4de5f8
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mc_scan.mk
@@ -0,0 +1,29 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: chips/p9/procedures/hwp/initfiles/p9_mc_scan.mk $
+#
+# IBM CONFIDENTIAL
+#
+# EKB Project
+#
+# COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_mc_scan
+lib$(PROCEDURE)_COMMONFLAGS+=-DFAPI_SUPPORT_SPY_AS_STRING=1
+$(call BUILD_PROCEDURE)
+
+PROCEDURE=p9_mc_scan_ifCompiler
+lib$(PROCEDURE)_COMMONFLAGS+=-DFAPI_SUPPORT_SPY_AS_STRING=1
+lib$(PROCEDURE)_COMMONFLAGS+=-DIFCOMPILER_PLAT=1
+FAPI=2_IFCOMPILER
+OBJS+=p9_mc_scan.o
+lib$(PROCEDURE)_LIBPATH=$(LIBPATH)/ifCompiler
+$(call BUILD_PROCEDURE) \ No newline at end of file
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C
index 0e6a03ea5..42c4871c8 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C
@@ -23,6 +23,10 @@
using namespace fapi2;
+constexpr auto literal_0b000000 = 0b000000;
+constexpr auto literal_0b0100 = 0b0100;
+constexpr auto literal_0x1 = 0x1;
+constexpr auto literal_4 = 4;
constexpr auto literal_1 = 1;
constexpr auto literal_2 = 2;
constexpr auto literal_0 = 0;
@@ -42,7 +46,6 @@ constexpr auto literal_21 = 21;
constexpr auto literal_3 = 3;
constexpr auto literal_22 = 22;
constexpr auto literal_23 = 23;
-constexpr auto literal_4 = 4;
constexpr auto literal_5 = 5;
constexpr auto literal_6 = 6;
constexpr auto literal_24 = 24;
@@ -59,13 +62,130 @@ constexpr auto literal_768 = 768;
constexpr auto literal_939 = 939;
fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0,
- const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT1, const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT2)
+ const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT1, const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT2,
+ const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT3)
{
fapi2::ReturnCode l_rc = 0;
do
{
fapi2::buffer<uint64_t> l_scom_buffer;
+ {
+ l_rc = fapi2::getScom( TGT0, 0x5010823ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x5010823ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b000000, 28, 6, 58 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x5010823ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x5010823ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x5010824ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x5010824ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b0100, 28, 4, 60 );
+ }
+
+ {
+ constexpr auto l_scom_buffer_OFF = 0x0;
+ l_scom_buffer.insert<uint64_t> (l_scom_buffer_OFF, 62, 1, 63 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x5010824ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x5010824ull)");
+ break;
+ }
+ }
+ fapi2::ATTR_PROC_EPS_READ_CYCLES_T0_Type l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T0;
+ l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T0, TGT3, l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T0);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_PROC_EPS_READ_CYCLES_T0)");
+ break;
+ }
+
+ fapi2::ATTR_PROC_EPS_READ_CYCLES_T1_Type l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T1;
+ l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T1, TGT3, l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T1);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_PROC_EPS_READ_CYCLES_T1)");
+ break;
+ }
+
+ fapi2::ATTR_PROC_EPS_READ_CYCLES_T2_Type l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T2;
+ l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T2, TGT3, l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T2);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_PROC_EPS_READ_CYCLES_T2)");
+ break;
+ }
+
+ {
+ l_rc = fapi2::getScom( TGT0, 0x5010826ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x5010826ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0x1, 0, 8, 56 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> ((l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T0 / literal_4), 8, 8, 56 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> ((l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T1 / literal_4), 16, 8, 56 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> ((l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T2 / literal_4), 32, 8, 56 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> ((l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T1 / literal_4), 24, 8, 56 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> ((l_TGT3_ATTR_PROC_EPS_READ_CYCLES_T2 / literal_4), 40, 8, 56 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x5010826ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x5010826ull)");
+ break;
+ }
+ }
+
fapi2::ATTR_EFF_DIMM_TYPE_Type l_TGT2_ATTR_EFF_DIMM_TYPE;
l_rc = FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_TYPE, TGT2, l_TGT2_ATTR_EFF_DIMM_TYPE);
@@ -691,6 +811,11 @@ fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0,
l_scom_buffer.insert<uint64_t> (l_scom_buffer_ON, 38, 1, 63 );
}
+ {
+ constexpr auto l_scom_buffer_ON = 0x1;
+ l_scom_buffer.insert<uint64_t> (l_scom_buffer_ON, 55, 1, 63 );
+ }
+
l_rc = fapi2::putScom(TGT0, 0x7010913ull, l_scom_buffer);
if (l_rc)
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.H
index d8a462e08..2cd074b2d 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.H
@@ -26,13 +26,15 @@
typedef fapi2::ReturnCode (*p9_mca_scom_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_MCA>&,
- const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&, const fapi2::Target<fapi2::TARGET_TYPE_MCS>&);
+ const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&, const fapi2::Target<fapi2::TARGET_TYPE_MCS>&,
+ const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>&);
extern "C"
{
fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0,
- const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT1, const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT2);
+ const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT1, const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT2,
+ const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT3);
}
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.C
index 324f81980..90513d27c 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.C
@@ -16,3 +16,215 @@
/* deposited with the U.S. Copyright Office. */
/* */
/* IBM_PROLOG_END_TAG */
+#include "p9_mcbist_scom.H"
+#include <stdint.h>
+#include <stddef.h>
+#include <fapi2.H>
+
+using namespace fapi2;
+
+constexpr auto literal_0b010000000000000000000000000000000000000000000000 =
+ 0b010000000000000000000000000000000000000000000000;
+constexpr auto literal_0b00000000000000000000001111111011111111111111 = 0b00000000000000000000001111111011111111111111;
+constexpr auto literal_0b10000000000000000 = 0b10000000000000000;
+constexpr auto literal_0b10000000001000000000000000000100000000000000 = 0b10000000001000000000000000000100000000000000;
+constexpr auto literal_0b11110000000 = 0b11110000000;
+constexpr auto literal_0b00001000000000000000 = 0b00001000000000000000;
+constexpr auto literal_0b100 = 0b100;
+constexpr auto literal_0b0100 = 0b0100;
+
+fapi2::ReturnCode p9_mcbist_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT0)
+{
+ fapi2::ReturnCode l_rc = 0;
+
+ do
+ {
+ fapi2::buffer<uint64_t> l_scom_buffer;
+ {
+ l_rc = fapi2::getScom( TGT0, 0x7012380ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x7012380ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b010000000000000000000000000000000000000000000000, 0, 48, 16 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x7012380ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x7012380ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x7012381ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x7012381ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b00000000000000000000001111111011111111111111, 0, 44, 20 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b10000000000000000, 44, 17, 47 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x7012381ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x7012381ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x7012383ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x7012383ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b10000000001000000000000000000100000000000000, 0, 44, 20 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x7012383ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x7012383ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x70123e0ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x70123e0ull)");
+ break;
+ }
+
+ {
+ constexpr auto l_scom_buffer_OFF = 0x0;
+ l_scom_buffer.insert<uint64_t> (l_scom_buffer_OFF, 36, 1, 63 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x70123e0ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x70123e0ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x70123e8ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x70123e8ull)");
+ break;
+ }
+
+ {
+ constexpr auto l_scom_buffer_ON = 0x1;
+ l_scom_buffer.insert<uint64_t> (l_scom_buffer_ON, 0, 1, 63 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b11110000000, 23, 11, 53 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x70123e8ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x70123e8ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x70123e9ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x70123e9ull)");
+ break;
+ }
+
+ {
+ constexpr auto l_scom_buffer_ON = 0x1;
+ l_scom_buffer.insert<uint64_t> (l_scom_buffer_ON, 0, 1, 63 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x70123e9ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x70123e9ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x70123eaull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x70123eaull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b00001000000000000000, 20, 20, 44 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x70123eaull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x70123eaull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x70123ebull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x70123ebull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b100, 23, 3, 61 );
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b0100, 37, 4, 60 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x70123ebull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x70123ebull)");
+ break;
+ }
+ }
+ }
+ while (0);
+
+ return l_rc;
+}
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.H
index 2c73f002f..d317481c6 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.H
@@ -16,3 +16,22 @@
/* deposited with the U.S. Copyright Office. */
/* */
/* IBM_PROLOG_END_TAG */
+#ifndef _INIT_P9_MCBIST_SCOM_PROCEDURE_H_
+#define _INIT_P9_MCBIST_SCOM_PROCEDURE_H_
+
+
+#include <stddef.h>
+#include <stdint.h>
+#include <fapi2.H>
+
+
+typedef fapi2::ReturnCode (*p9_mcbist_scom_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&);
+
+extern "C"
+{
+
+ fapi2::ReturnCode p9_mcbist_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& TGT0);
+
+}
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.mk b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.mk
index 5f8022393..599d99466 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.mk
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcbist_scom.mk
@@ -16,3 +16,5 @@
# deposited with the U.S. Copyright Office.
#
# IBM_PROLOG_END_TAG
+PROCEDURE=p9_mcbist_scom
+$(call BUILD_PROCEDURE) \ No newline at end of file
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C
index 2d55090ee..54af79262 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C
@@ -16,3 +16,67 @@
/* deposited with the U.S. Copyright Office. */
/* */
/* IBM_PROLOG_END_TAG */
+#include "p9_mcs_scom.H"
+#include <stdint.h>
+#include <stddef.h>
+#include <fapi2.H>
+
+using namespace fapi2;
+
+constexpr auto literal_0b0111 = 0b0111;
+
+fapi2::ReturnCode p9_mcs_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT0)
+{
+ fapi2::ReturnCode l_rc = 0;
+
+ do
+ {
+ fapi2::buffer<uint64_t> l_scom_buffer;
+ {
+ l_rc = fapi2::getScom( TGT0, 0x5010810ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x5010810ull)");
+ break;
+ }
+
+ {
+ l_scom_buffer.insert<uint64_t> (literal_0b0111, 46, 4, 60 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x5010810ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x5010810ull)");
+ break;
+ }
+ }
+ {
+ l_rc = fapi2::getScom( TGT0, 0x5010812ull, l_scom_buffer );
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: getScom (0x5010812ull)");
+ break;
+ }
+
+ {
+ constexpr auto l_scom_buffer_ON = 0x1;
+ l_scom_buffer.insert<uint64_t> (l_scom_buffer_ON, 10, 1, 63 );
+ }
+
+ l_rc = fapi2::putScom(TGT0, 0x5010812ull, l_scom_buffer);
+
+ if (l_rc)
+ {
+ FAPI_ERR("ERROR executing: putScom (0x5010812ull)");
+ break;
+ }
+ }
+ }
+ while (0);
+
+ return l_rc;
+}
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.H b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.H
index efb2563bf..614a1feb3 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.H
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.H
@@ -16,3 +16,22 @@
/* deposited with the U.S. Copyright Office. */
/* */
/* IBM_PROLOG_END_TAG */
+#ifndef _INIT_P9_MCS_SCOM_PROCEDURE_H_
+#define _INIT_P9_MCS_SCOM_PROCEDURE_H_
+
+
+#include <stddef.h>
+#include <stdint.h>
+#include <fapi2.H>
+
+
+typedef fapi2::ReturnCode (*p9_mcs_scom_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_MCS>&);
+
+extern "C"
+{
+
+ fapi2::ReturnCode p9_mcs_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& TGT0);
+
+}
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.mk b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.mk
index 7f8333225..d40ad0a2a 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.mk
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.mk
@@ -16,3 +16,5 @@
# deposited with the U.S. Copyright Office.
#
# IBM_PROLOG_END_TAG
+PROCEDURE=p9_mcs_scom
+$(call BUILD_PROCEDURE) \ No newline at end of file
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
index 7f1a93273..964937c53 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
@@ -30,6 +30,7 @@
#include <fapi2.H>
#include <p9_mss_scominit.H>
#include <p9_mca_scom.H>
+#include <p9_mcbist_scom.H>
#include <p9_ddrphy_scom.H>
using fapi2::TARGET_TYPE_MCA;
@@ -46,10 +47,13 @@ fapi2::ReturnCode p9_mss_scominit( const fapi2::Target<TARGET_TYPE_MCBIST>& i_ta
FAPI_INF("Start MSS SCOM init");
auto l_mca_targets = i_target.getChildren<TARGET_TYPE_MCA>();
+ fapi2::ReturnCode l_rc;
+ fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
+
for (auto l_mca_target : l_mca_targets )
{
- fapi2::ReturnCode l_rc;
- FAPI_EXEC_HWP(l_rc, p9_mca_scom, l_mca_target, i_target, l_mca_target.getParent<fapi2::TARGET_TYPE_MCS>() );
+ FAPI_EXEC_HWP(l_rc, p9_mca_scom, l_mca_target, i_target, l_mca_target.getParent<fapi2::TARGET_TYPE_MCS>(),
+ FAPI_SYSTEM );
if (l_rc)
{
@@ -68,6 +72,16 @@ fapi2::ReturnCode p9_mss_scominit( const fapi2::Target<TARGET_TYPE_MCBIST>& i_ta
}
}
+ FAPI_EXEC_HWP(l_rc, p9_mcbist_scom, i_target );
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9.mcbist.scom.initfile");
+ fapi2::current_err = l_rc;
+ goto fapi_try_exit;
+ }
+
+
fapi_try_exit:
FAPI_INF("End MSS SCOM init");
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
index 1a2691eb0..3b8528c0e 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
@@ -39,14 +39,7 @@
#include <p9_fbc_ioe_dl_scom.H>
#include <p9_fbc_ioo_tl_scom.H>
#include <p9_fbc_ioo_dl_scom.H>
-#include <p9_mc_scom_addresses.H>
-#include <p9_mc_scom_addresses_fld.H>
-
-//------------------------------------------------------------------------------
-// Constant definitions
-//------------------------------------------------------------------------------
-
-const uint8_t MCEPS_JITTER_EPSILON = 0x1;
+#include <p9_mcs_scom.H>
//------------------------------------------------------------------------------
// Function definitions
@@ -58,38 +51,25 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_XBUS>> l_xbus_chiplets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
- std::vector<fapi2::Target<fapi2::TARGET_TYPE_MCA>> l_mca_targets;
+ std::vector<fapi2::Target<fapi2::TARGET_TYPE_MCS>> l_mcs_targets;
fapi2::ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_Type l_fbc_optics_cfg_mode = { fapi2::ENUM_ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_SMP };
- fapi2::buffer<uint64_t> l_mceps;
- fapi2::ATTR_PROC_EPS_READ_CYCLES_T0_Type l_eps_read_cycles_t0;
- fapi2::ATTR_PROC_EPS_READ_CYCLES_T1_Type l_eps_read_cycles_t1;
- fapi2::ATTR_PROC_EPS_READ_CYCLES_T2_Type l_eps_read_cycles_t2;
FAPI_DBG("Start");
+ l_mcs_targets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>();
- // apply MC epsilons
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T0, FAPI_SYSTEM, l_eps_read_cycles_t0),
- "Error from FAPI_ATTR_GET (ATTR_PROC_EPS_READ_CYCLES_T0)");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T1, FAPI_SYSTEM, l_eps_read_cycles_t1),
- "Error from FAPI_ATTR_GET (ATTR_PROC_EPS_READ_CYCLES_T1)");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_EPS_READ_CYCLES_T2, FAPI_SYSTEM, l_eps_read_cycles_t2),
- "Error from FAPI_ATTR_GET (ATTR_PROC_EPS_READ_CYCLES_T2)");
- l_mceps.insertFromRight<MCS_PORT02_MCEPSQ_JITTER_EPSILON, MCS_PORT02_MCEPSQ_JITTER_EPSILON_LEN>(MCEPS_JITTER_EPSILON);
- l_mceps.insertFromRight<MCS_PORT02_MCEPSQ_LOCAL_NODE_EPSILON, MCS_PORT02_MCEPSQ_LOCAL_NODE_EPSILON_LEN>
- (l_eps_read_cycles_t0 / 4);
- l_mceps.insertFromRight<MCS_PORT02_MCEPSQ_NEAR_NODAL_EPSILON, MCS_PORT02_MCEPSQ_NEAR_NODAL_EPSILON_LEN>
- (l_eps_read_cycles_t1 / 4);
- l_mceps.insertFromRight<MCS_PORT02_MCEPSQ_REMOTE_NODAL_EPSILON, MCS_PORT02_MCEPSQ_REMOTE_NODAL_EPSILON_LEN>
- (l_eps_read_cycles_t2 / 4);
- l_mceps.insertFromRight<MCS_PORT02_MCEPSQ_GROUP_EPSILON, MCS_PORT02_MCEPSQ_GROUP_EPSILON_LEN>(l_eps_read_cycles_t1 / 4);
- l_mceps.insertFromRight<MCS_PORT02_MCEPSQ_VECTOR_GROUP_EPSILON, MCS_PORT02_MCEPSQ_VECTOR_GROUP_EPSILON_LEN>
- (l_eps_read_cycles_t2 / 4);
- l_mca_targets = i_target.getChildren<fapi2::TARGET_TYPE_MCA>();
-
- for (auto l_mca_target : l_mca_targets)
+ for (auto l_mcs_target : l_mcs_targets)
{
- FAPI_TRY(fapi2::putScom(l_mca_target, MCS_PORT02_MCEPSQ, l_mceps),
- "Error from putScom (MCS_PORT02_MCEPSQ)");
+
+ FAPI_DBG("Invoking p9.mcs.scom.initfile...");
+ FAPI_EXEC_HWP(l_rc, p9_mcs_scom, l_mcs_target );
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9.mcs.scom.initfile");
+ fapi2::current_err = l_rc;
+ goto fapi_try_exit;
+ }
+
}
// apply FBC non-hotplug initfile
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