Initial check-in of p9_cme_sram_access

Change-Id: I8e280251e7ff420aa60007a7fe053fd8681726b3
RTC:148998
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24824
Tested-by: Jenkins Server
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50670
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 328 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.C b/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.C
new file mode 100644
index 000000000..25404108d
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.C
@@ -0,0 +1,164 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.C $  */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file  p9_cme_sram_access.C
+/// @brief Display data from the targetted CME's SRAM array.
+
+// *HWP HWP Owner       : Brian Vanderpool <vanderp@us.ibm.com>
+// *HWP Backup HWP Owner: Greg Still <stillgs@us.ibm.com>
+// *HWP FW Owner        : Sangeetha T S <sangeet2@in.ibm.com>
+// *HWP Team            : PM
+// *HWP Level           : 2
+// *HWP Consumed by     : HS:CRO:SBE
+///
+///-----------------------------------------------------------------------------
+
+///
+/// High-level procedure flow:
+/// @verbatim
+/// High-level procedure flow:
+///
+///
+/// @endverbatim
+
+// -----------------------------------------------------------------------------
+//  Includes
+// -----------------------------------------------------------------------------
+#include <p9_cme_sram_access.H>
+
+
+
+// ----------------------------------------------------------------------
+// Constants
+// ----------------------------------------------------------------------
+
+const uint8_t CSCR_AUTO_INCREMENT_BIT = 0;
+
+
+// -----------------------------------------------------------------------------
+//  Function prototypes
+// -----------------------------------------------------------------------------
+
+// -----------------------------------------------------------------------------
+//  Function definitions
+// -----------------------------------------------------------------------------
+
+/// @brief Dump the contents of the CME SRAM
+///
+/// @param [in]  i_cme_target         EX target
+/// @param [in]  i_start_address      Start Address is between 0xFFFF80000 and 0xFFFFFFFF and must be 8B aligned
+/// @param [in]  i_length_dword       Length in dwords (# of accesses)
+/// @param [out] o_data               Output Data
+/// @param [out] o_dwords_read        Number of actual words in the output buffer.
+///
+/// @retval FAPI_RC_SUCCESS
+/// @retval ERROR defined in xml
+
+fapi2::ReturnCode p9_cme_sram_access(
+    const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_cme_target,
+    const uint32_t i_start_address,
+    const uint32_t i_length_dword,
+    uint64_t*      o_data,
+    uint32_t&      o_dwords_read)
+{
+
+    fapi2::buffer<uint64_t> l_data64;
+
+    // These are initialized before being used.
+    // Not doing an initial assignment to 0 to save space on the SBE.
+    uint32_t                l_norm_address;
+    uint32_t                l_words_to_read;
+
+
+    FAPI_IMP("> p9_cme_sram_access");
+
+    // Ensure the address is between 0xFFFF8000 and 0xFFFFFFFF.
+    // No need to check the upper limit, since that will overflow the uint32_t data type.
+
+    if (i_start_address < 0xFFFF8000)
+    {
+        // Return Error - invalid start address
+        FAPI_DBG("Invalid Start Address %08X", i_start_address);
+        FAPI_ASSERT(false,
+                    fapi2::CME_SRAM_ACCESS_ERROR().set_ADDRESS(i_start_address),
+                    "Invalid CME Start address");
+    }
+
+    if ((i_start_address & 0x00000007) != 0)
+    {
+        // Return Error - invalid start address alignment
+        FAPI_DBG("Invalid Start Address alignment %08X", i_start_address);
+        FAPI_ASSERT(false,
+                    fapi2::CME_SRAM_ACCESS_ERROR().set_ADDRESS(i_start_address),
+                    "Invalid CME Start address alignment");
+    }
+
+
+    // Enable auto increment
+    FAPI_INF("  CME display enable auto increment mode");
+    l_data64.flush<0>().setBit<CSCR_AUTO_INCREMENT_BIT>();
+    FAPI_TRY(fapi2::putScom(i_cme_target, EX_CSCR_OR, l_data64), "Error enabling auto increment mode");
+
+
+
+    // Set the CME address
+    // The SRAM address is defined as 16:28 (64k) but the CME only supports 32k, so mask off bit 16
+
+    l_norm_address = i_start_address & 0x00007FF8;
+
+    l_data64 = ((uint64_t)(l_norm_address)) << 32;
+
+    FAPI_DBG("   CME Setting Read address (CSAR) to 0x%08X", l_data64);
+    FAPI_TRY(fapi2::putScom(i_cme_target, EX_CSAR, l_data64), "Error setting read address in CSR");
+
+    // Compute the number of words
+    if ((l_norm_address + i_length_dword * 8) > 0x8000)
+    {
+        l_words_to_read = (0x8000 - l_norm_address) / 8;
+    }
+    else
+    {
+        l_words_to_read = i_length_dword;
+    }
+
+    FAPI_DBG("   Reading %d words From 0x%08X to 0x%08X", l_words_to_read, l_norm_address,
+             l_norm_address + l_words_to_read * 8);
+
+    // o_dwords_read will indicate the number of words successfully read.   Increment after each read.
+    o_dwords_read = 0;
+
+    for (uint32_t x = 0; x < l_words_to_read; x++)
+    {
+        FAPI_TRY(fapi2::getScom(i_cme_target, EX_CSDR, l_data64), "Error reading data from CSDR");
+        o_data[x] = l_data64();
+        o_dwords_read++;
+    }
+
+
+
+fapi_try_exit:
+    FAPI_INF("< p9_cme_sram_access");
+    return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.H b/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.H
new file mode 100644
index 000000000..7b64df928
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.H
@@ -0,0 +1,99 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.H $  */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file  p9_cme_sram_access.H
+/// @brief Display data from the targetted CME's SRAM array.
+///
+// *HWP HWP Owner       : Brian Vanderpool <vanderp@us.ibm.com>
+// *HWP Backup HWP Owner: Greg Still <stillgs@us.ibm.com>
+// *HWP FW Owner        : Sangeetha T S <sangeet2@in.ibm.com>
+// *HWP Team            : PM
+// *HWP Level           : 2
+// *HWP Consumed by     : HS:CRO:SBE
+///
+///-----------------------------------------------------------------------------
+
+#ifndef _p9_cme_sram_access_H_
+#define _p9_cme_sram_access_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include <fapi2.H>
+#include <p9_quad_scom_addresses.H>
+
+#include <p9_pm.H>
+
+
+// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_cme_sram_access_FP_t) (
+    const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_cme_target,
+    const uint32_t i_start_address,
+    const uint32_t i_length_dword,
+    uint64_t* o_data,
+    uint32_t& o_dwords_read);
+
+extern "C" {
+
+
+// -----------------------------------------------------------------------------
+//  Function prototype
+// -----------------------------------------------------------------------------
+
+/// @addtogroup pm_fapi
+/// @{
+
+/// @brief Display data from the targetted CME's SRAM array.
+///
+/// High-level procedure flow:
+///
+///
+///  Procedure Prereq:
+///     - System clocks are running
+///     - CME to display is enabled and unfenced
+///  Note that the address does not wrap if the length + starting address exceeds the maximum address
+///
+/// @param [in]  i_cme_target         EX target
+/// @param [in]  i_start_address      Start Address is between 0xFFFF80000 and 0xFFFFFFFF and must be 8B aligned
+/// @param [in]  i_length_dword       Length in dwords (# of accesses)
+/// @param [out] o_data               Output Data
+/// @param [out] o_dwords_read        Number of actual words in the output buffer.
+
+///
+/// @retval FAPI2_RC_SUCCESS
+/// @retval RC_PROCPM_GPE_CODE_BAD_MODE
+    fapi2::ReturnCode p9_cme_sram_access(
+        const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_cme_target,
+        const uint32_t i_start_address,
+        const uint32_t i_length_dword,
+        uint64_t* o_data,
+        uint32_t& o_dwords_read);
+
+/// @}  end addtogroup
+
+} // extern "C"
+
+#endif // _p9_cme_sram_access_H_
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.mk b/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.mk
new file mode 100644
index 000000000..adea041d8
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.mk
@@ -0,0 +1,27 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/import/chips/p9/procedures/hwp/pm/p9_cme_sram_access.mk $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2015,2017
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_cme_sram_access
+#$(call ADD_MODULE_SRCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9/procedures/hwp/lib)
+$(call BUILD_PROCEDURE)
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_cme_sram_access_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_cme_sram_access_errors.xml
new file mode 100644
index 000000000..05a485bc4
--- /dev/null
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_cme_sram_access_errors.xml
@@ -0,0 +1,38 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_cme_sram_access_errors.xml $ -->
+<!--                                                                        -->
+<!-- OpenPOWER HostBoot Project                                             -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2017                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- Error definitions for p9_cme_sram_access procedure -->
+<hwpErrors>
+  <!-- *********************************************************************-->
+  <hwpError>
+    <rc>RC_CME_SRAM_ACCESS_ERROR</rc>
+    <description>Incorrect Address passed to CME SRAM Display routine
+    </description>
+    <ffdc>ADDRESS</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+</hwpErrors>