diff options
author | Srinivas Naga <srinivan@in.ibm.com> | 2016-11-01 18:54:20 +0100 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-12-05 12:15:43 -0500 |
commit | bf021a35c3333f4193a5342e80f4256628b9241c (patch) | |
tree | 9ad0725f35ff9d278c4f5a1d8c91cd90572c0071 /src/import/chips | |
parent | a760376b03f184565c02e8b11b1b8e1ad4900d71 (diff) | |
download | talos-hostboot-bf021a35c3333f4193a5342e80f4256628b9241c.tar.gz talos-hostboot-bf021a35c3333f4193a5342e80f4256628b9241c.zip |
Removing clearing of ECC enable before reading ECID fuse
Change-Id: I65ae1554101db1230870088ed6802ceff76cdb7b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32075
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32079
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_getecid.C | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C index 129d42e98..880ff2e50 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C @@ -47,34 +47,15 @@ #include <p9_misc_scom_addresses_fld.H> #include <p9_const_common.H> -enum P9_SBE_COMMON_Private_Constants -{ - OTPC_M_MODE_REGISTER_ECC_ENABLE_BIT = 1 // OTPROM mode register MODE_ECC_ENABLE field/bit definitions -}; fapi2::ReturnCode p9_getecid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, fapi2::variable_buffer& o_fuseString) { uint64_t attr_data[2]; - bool secure_mode = false; fapi2::buffer<uint64_t> l_ecid_part0_data64 = 0; fapi2::buffer<uint64_t> l_ecid_part1_data64 = 0; FAPI_INF("Entering ..."); - FAPI_DBG("determine if security is enabled"); - fapi2::buffer<uint64_t> l_data64; - FAPI_TRY(fapi2::getScom(i_target_chip, PERV_CBS_CS_SCOM, l_data64)); - secure_mode = l_data64.getBit<4>(); - - FAPI_DBG("clear ECC enable before reading ECID data (read-modify-write OTPROM Mode register), insecure mode only"); - - if (!secure_mode) - { - fapi2::buffer<uint64_t> l_data64; - FAPI_TRY(fapi2::getScom(i_target_chip, PU_MODE_REGISTER, l_data64)); - l_data64.clearBit<OTPC_M_MODE_REGISTER_ECC_ENABLE_BIT>(); - FAPI_TRY(fapi2::putScom(i_target_chip, PU_MODE_REGISTER, l_data64)); - } FAPI_DBG("extract and manipulate ECID data"); FAPI_TRY(fapi2::getScom(i_target_chip, PU_OTPROM0_ECID_PART0_REGISTER, l_ecid_part0_data64)); @@ -94,19 +75,8 @@ fapi2::ReturnCode p9_getecid(const FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_ECID, i_target_chip, attr_data)); - FAPI_DBG("restore ECC enable setting (insecure mode only)"); - - if (!secure_mode) - { - fapi2::buffer<uint64_t> l_data64; - FAPI_TRY(fapi2::getScom(i_target_chip, PU_MODE_REGISTER, l_data64)); - l_data64.setBit<OTPC_M_MODE_REGISTER_ECC_ENABLE_BIT>(); - FAPI_TRY(fapi2::putScom(i_target_chip, PU_MODE_REGISTER, l_data64)); - } - FAPI_INF("Exiting ..."); -// return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: return fapi2::current_err; |