diff options
| author | Prachi Gupta <pragupta@us.ibm.com> | 2016-03-09 10:41:51 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-03-31 14:00:06 -0400 |
| commit | bc5cd69732cd82f7cd53dd7f10bbd2ea7582d7e6 (patch) | |
| tree | 12e3a7475ee1d55596a8bbf1656d16893a5b897e /src/import/chips | |
| parent | 2e4ed15597059fc551bcb54c967c7de564d16723 (diff) | |
| download | talos-hostboot-bc5cd69732cd82f7cd53dd7f10bbd2ea7582d7e6.tar.gz talos-hostboot-bc5cd69732cd82f7cd53dd7f10bbd2ea7582d7e6.zip | |
Update xbus initfile procedures with latest initCompiler changes
Change-Id: Ibf752a3768636155d003d44f8073755b117cf9b2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21857
Tested-by: Jenkins Server
Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22125
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g0_scom.C | 1890 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g1_scom.C | 1891 |
2 files changed, 2406 insertions, 1375 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g0_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g0_scom.C index c67f69210..ebb4fdf42 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g0_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g0_scom.C @@ -27,57 +27,497 @@ using namespace fapi2; #define ATTR_IS_SIMULATION_ATTRIBUTE_VALUE_0 0 #define ATTR_IS_SIMULATION_ATTRIBUTE_VALUE_1 1 -#define LITERAL_0b00 0b00 -#define LITERAL_0b0000 0b0000 -#define LITERAL_0b00000 0b00000 -#define LITERAL_0b000000 0b000000 -#define LITERAL_0b0000000 0b0000000 -#define LITERAL_0b0000000000000000 0b0000000000000000 -#define LITERAL_0b0000011 0b0000011 -#define LITERAL_0b00001 0b00001 -#define LITERAL_0b0010000 0b0010000 -#define LITERAL_0b0010001 0b0010001 -#define LITERAL_0b01 0b01 -#define LITERAL_0b0110 0b0110 -#define LITERAL_0b01100 0b01100 -#define LITERAL_0b01111 0b01111 -#define LITERAL_0b01111111 0b01111111 -#define LITERAL_0b100111 0b100111 -#define LITERAL_0b1011 0b1011 -#define LITERAL_0b11 0b11 -#define LITERAL_DRV_0S 0x0 -#define LITERAL_ENABLED 0x0 -#define LITERAL_FENCED 0x80000000 -#define LITERAL_OFF 0x0 -#define LITERAL_ON 0x80000000 -#define LITERAL_PATTERN_24_A_0_15 0x10000000 -#define LITERAL_PATTERN_24_A_16_22 0x84000000 -#define LITERAL_PATTERN_24_B_0_15 0xf03e0000 -#define LITERAL_PATTERN_24_B_16_22 0x7c000000 -#define LITERAL_PATTERN_24_C_0_15 0x7bc0000 -#define LITERAL_PATTERN_24_C_12_ACGH_16_22 0x0 -#define LITERAL_PATTERN_24_D_0_15 0x7c70000 -#define LITERAL_PATTERN_24_D_16_22 0xc0000000 -#define LITERAL_PATTERN_24_EF_16_22 0x80000000 -#define LITERAL_PATTERN_24_E_0_15 0x3ef0000 -#define LITERAL_PATTERN_24_F_0_15 0x1f0f0000 -#define LITERAL_PATTERN_24_GH_16_22 0x6000000 -#define LITERAL_PATTERN_24_G_0_15 0x18000000 -#define LITERAL_PATTERN_24_H_0_15 0x9c000000 -#define LITERAL_PATTERN_TX_AB_HALF_A_0_15 0x0 -#define LITERAL_PATTERN_TX_A_16_22 0x2000000 -#define LITERAL_PATTERN_TX_B_16_22 0xf8000000 -#define LITERAL_PATTERN_TX_C_0_15 0x1e0000 -#define LITERAL_PATTERN_TX_C_16_22 0xf6000000 -#define LITERAL_PATTERN_TX_DG_16_22 0x18000000 -#define LITERAL_PATTERN_TX_D_0_15 0x1f0000 -#define LITERAL_PATTERN_TX_E_16_22 0xbc000000 -#define LITERAL_PATTERN_TX_E_HALF_B_0_15 0xf0000 -#define LITERAL_PATTERN_TX_F_0_15 0x7c0000 -#define LITERAL_PATTERN_TX_F_HALF_A_16_22 0x20000000 -#define LITERAL_PATTERN_TX_G_0_15 0xc630000 -#define LITERAL_PATTERN_TX_H_0_15 0xe730000 -#define LITERAL_PATTERN_TX_H_HALF_B_16_22 0x9c000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFE12_EN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFEHISPD_EN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_END_LANE_ID_0b0010000 0b0010000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_FENCE_FENCED 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_IQSPD_CFG_0b11 0b11 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_0b0000000000000000 0b0000000000000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_0b01111111 0b01111111 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LTE_EN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_RX_BUS_WIDTH_0b0010001 0b0010001 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_0b0010001 0b0010001 +#define LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_0b00001 0b00001 +#define LITERAL_IOF1_RX_RX0_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15 0x7c70000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22 0xc0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15 0xf03e0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22 0x7c000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15 0x7bc0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15 0x10000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22 0x84000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15 0x1f0f0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15 0x9c000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15 0x3ef0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15 0x18000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15 0x9c000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15 0x18000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15 0x10000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22 0x84000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15 0x3ef0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15 0x7bc0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15 0x1f0f0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15 0x7c70000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22 0xc0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15 0x10000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22 0x84000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15 0xf03e0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22 0x7c000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_0b000000 0b000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_0b0010001 0b0010001 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_OFF 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_DRV_0S 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_END_LANE_ID_0b0010000 0b0010000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_0b0000000000000000 0b0000000000000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_0b01111111 0b01111111 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_MAX_BAD_LANES_0b00001 0b00001 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PDWN_LITE_DISABLE_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b00 0b00 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b01 0b01 +#define LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_0b0000000 0b0000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22 0x2000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22 0xf8000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15 0x1e0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22 0xf6000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15 0x1f0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15 0xf0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22 0xbc000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15 0x7c0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22 0x20000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15 0xc630000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15 0xe730000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22 0x9c000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22 0x2000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15 0xe730000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22 0x9c000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15 0xc630000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15 0x7c0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22 0x20000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15 0xf0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22 0xbc000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15 0x1f0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15 0x1e0000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22 0xf6000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22 0xf8000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22 0x2000000 fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& TGT0, const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1) @@ -95,7 +535,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_scom0.insert<uint64_t> (LITERAL_0b000000, 48, 6, 58 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_0b000000, 48, 6, 58 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0; l_rc = fapi2::getScom( TGT0, 0x800c0c000601103full, IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0 ); @@ -106,7 +547,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0.insert<uint64_t> (LITERAL_0b000000, 48, 6, 58 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_0b000000, 48, 6, 58 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0; l_rc = fapi2::getScom( TGT0, 0x800980000601103full, IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0 ); @@ -117,7 +559,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0000000, 49, 7, 57 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_0b0000000, 49, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0; l_rc = fapi2::getScom( TGT0, 0x800c84000601103full, @@ -129,11 +572,14 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0000000, 49, 7, 57 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_0b0000000, 49, 7, 57 ); - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0010000, 57, 7, 57 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_END_LANE_ID_0b0010000, 57, 7, 57 ); - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0010000, 57, 7, 57 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_END_LANE_ID_0b0010000, 57, 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0; l_rc = fapi2::getScom( TGT0, 0x8009b8000601103full, IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0 ); @@ -144,7 +590,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> (LITERAL_0b0010001, 48, 7, 57 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_0b0010001, 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0; l_rc = fapi2::getScom( TGT0, 0x800c1c000601103full, IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0 ); @@ -155,9 +602,11 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0.insert<uint64_t> (LITERAL_0b0010001, 56, 7, 57 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_0b0010001, 56, 7, 57 ); - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> (LITERAL_0b0010001, 55, 7, 57 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_RX_BUS_WIDTH_0b0010001, 55, 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8009e0000601103full, @@ -169,8 +618,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_scom0.insert<uint64_t> (LITERAL_0b0000000000000000, 48, - 16, 48 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_0b0000000000000000, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_scom0; l_rc = fapi2::getScom( TGT0, 0x8009e8000601103full, @@ -182,8 +631,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> (LITERAL_0b01111111, 48, 8, - 56 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_0b01111111, 48, 8, 56 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x800cec000601103full, @@ -196,7 +645,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_scom0.insert<uint64_t> - (LITERAL_0b0000000000000000, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_0b0000000000000000, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_scom0; l_rc = fapi2::getScom( TGT0, 0x800cf4000601103full, @@ -208,8 +657,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> (LITERAL_0b01111111, 48, - 8, 56 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_0b01111111, 48, 8, 56 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220000601103full, @@ -221,8 +670,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220010601103full, @@ -234,8 +683,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220020601103full, @@ -247,8 +696,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220030601103full, @@ -260,8 +709,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220040601103full, @@ -273,8 +722,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220050601103full, @@ -286,8 +735,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220060601103full, @@ -299,8 +748,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220070601103full, @@ -312,8 +761,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220080601103full, @@ -325,8 +774,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220090601103full, @@ -338,8 +787,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002200a0601103full, @@ -351,8 +800,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002200b0601103full, @@ -364,8 +813,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002200c0601103full, @@ -377,8 +826,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002200d0601103full, @@ -390,8 +839,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002200e0601103full, @@ -403,8 +852,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002200f0601103full, @@ -416,8 +865,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220100601103full, @@ -429,8 +878,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220110601103full, @@ -442,7 +891,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_ON, 48, 1, 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_ON, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008000601103full, @@ -454,8 +904,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008010601103full, @@ -467,8 +917,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008020601103full, @@ -480,8 +930,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008030601103full, @@ -493,8 +943,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008040601103full, @@ -506,8 +956,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008050601103full, @@ -519,8 +969,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008060601103full, @@ -532,8 +982,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008070601103full, @@ -545,8 +995,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008080601103full, @@ -558,8 +1008,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008090601103full, @@ -571,8 +1021,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000080a0601103full, @@ -584,8 +1034,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000080b0601103full, @@ -597,8 +1047,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000080c0601103full, @@ -610,8 +1060,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000080d0601103full, @@ -623,8 +1073,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000080e0601103full, @@ -636,8 +1086,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000080f0601103full, @@ -649,8 +1099,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008100601103full, @@ -662,8 +1112,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008110601103full, @@ -675,8 +1125,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_ON, 54, - 1, 63 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_ON, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404000601103full, @@ -688,8 +1138,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404010601103full, @@ -701,8 +1151,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404020601103full, @@ -714,8 +1164,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404030601103full, @@ -727,8 +1177,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404040601103full, @@ -740,8 +1190,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404050601103full, @@ -753,8 +1203,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404060601103full, @@ -766,8 +1216,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404070601103full, @@ -779,8 +1229,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404080601103full, @@ -792,8 +1242,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404090601103full, @@ -805,8 +1255,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004040a0601103full, @@ -818,8 +1268,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004040b0601103full, @@ -831,8 +1281,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004040c0601103full, @@ -844,8 +1294,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004040d0601103full, @@ -857,8 +1307,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004040e0601103full, @@ -870,8 +1320,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004040f0601103full, @@ -883,8 +1333,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404100601103full, @@ -896,8 +1346,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800810000601103full, IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0 ); @@ -908,7 +1358,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800c14000601103full, IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0 ); @@ -919,7 +1370,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, 63 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0; l_rc = fapi2::getScom( TGT0, 0x800990000601103full, IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0 ); @@ -930,9 +1382,11 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> (LITERAL_ON, 58, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_ON, 58, 1, 63 ); - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_ON, 59, 1, 63 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PDWN_LITE_DISABLE_ON, 59, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0000601103full, @@ -945,7 +1399,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0010601103full, @@ -958,7 +1412,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0020601103full, @@ -971,7 +1425,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0030601103full, @@ -984,7 +1438,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0040601103full, @@ -997,7 +1451,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_E_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0050601103full, @@ -1010,7 +1464,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0060601103full, @@ -1023,7 +1477,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0070601103full, @@ -1036,7 +1490,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0080601103full, @@ -1049,7 +1503,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0090601103full, @@ -1062,7 +1516,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c00a0601103full, @@ -1075,7 +1529,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c00b0601103full, @@ -1088,7 +1542,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c00c0601103full, @@ -1101,7 +1555,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_E_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c00d0601103full, @@ -1114,7 +1568,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c00e0601103full, @@ -1127,7 +1581,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c00f0601103full, @@ -1140,7 +1594,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0100601103full, @@ -1153,7 +1607,7 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8000601103full, @@ -1166,7 +1620,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8010601103full, @@ -1179,7 +1634,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8020601103full, @@ -1192,7 +1648,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_12_ACGH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8030601103full, @@ -1205,7 +1662,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8040601103full, @@ -1218,7 +1676,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8050601103full, @@ -1231,7 +1690,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8060601103full, @@ -1244,7 +1704,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8070601103full, @@ -1257,7 +1718,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8080601103full, @@ -1270,7 +1732,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8090601103full, @@ -1283,7 +1746,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c80a0601103full, @@ -1296,7 +1760,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c80b0601103full, @@ -1309,7 +1774,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c80c0601103full, @@ -1322,7 +1788,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c80d0601103full, @@ -1335,7 +1802,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c80e0601103full, @@ -1348,7 +1816,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_12_ACGH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c80f0601103full, @@ -1361,7 +1830,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8100601103full, @@ -1374,7 +1844,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c000601103full, @@ -1387,7 +1858,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c010601103full, @@ -1400,7 +1872,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c020601103full, @@ -1413,7 +1886,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c030601103full, @@ -1426,7 +1900,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c040601103full, @@ -1439,7 +1914,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_HALF_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c050601103full, @@ -1452,7 +1928,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c060601103full, @@ -1465,7 +1942,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c070601103full, @@ -1478,7 +1956,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c080601103full, @@ -1491,7 +1970,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c090601103full, @@ -1504,7 +1984,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c0a0601103full, @@ -1517,7 +1998,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c0b0601103full, @@ -1530,7 +2012,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c0c0601103full, @@ -1543,7 +2026,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_HALF_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c0d0601103full, @@ -1556,7 +2040,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c0e0601103full, @@ -1569,7 +2054,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c0f0601103full, @@ -1582,7 +2068,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c100601103full, @@ -1595,7 +2082,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444000601103full, @@ -1608,7 +2096,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444010601103full, @@ -1621,7 +2110,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444020601103full, @@ -1634,7 +2124,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444030601103full, @@ -1647,7 +2138,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444040601103full, @@ -1660,7 +2152,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444050601103full, @@ -1673,7 +2166,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_HALF_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444060601103full, @@ -1686,7 +2180,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444070601103full, @@ -1699,7 +2194,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_HALF_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444080601103full, @@ -1712,7 +2208,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444090601103full, @@ -1725,7 +2222,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_HALF_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004440a0601103full, @@ -1738,7 +2236,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004440b0601103full, @@ -1751,7 +2250,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_HALF_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004440c0601103full, @@ -1764,7 +2264,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004440d0601103full, @@ -1777,7 +2278,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004440e0601103full, @@ -1790,7 +2292,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004440f0601103full, @@ -1803,7 +2306,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444100601103full, @@ -1816,7 +2320,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0; l_rc = fapi2::getScom( TGT0, 0x800998000601103full, IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0 ); @@ -1827,9 +2332,11 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0.insert<uint64_t> (LITERAL_0b00001, 48, 5, 59 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_0b00001, 48, 5, 59 ); - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_0b00001, 53, 5, 59 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_MAX_BAD_LANES_0b00001, 53, 5, 59 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0; l_rc = fapi2::getScom( TGT0, 0x8008c0000601103full, IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0 ); @@ -1840,15 +2347,20 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_OFF, 55, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_OFF, 55, 1, 63 ); - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_OFF, 56, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LTE_EN_OFF, 56, 1, 63 ); - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_0b11, 57, 2, 62 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_IQSPD_CFG_0b11, 57, 2, 62 ); - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_ON, 59, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFEHISPD_EN_ON, 59, 1, 63 ); - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_ON, 60, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFE12_EN_ON, 60, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800b80000601103full, @@ -1860,7 +2372,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX0_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 60, 1, 63 ); + IOF1_RX_RX0_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_OFF, 60, 1, 63 ); ATTR_IS_SIMULATION_Type iv_TGT1_ATTR_IS_SIMULATION; l_rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, TGT1, iv_TGT1_ATTR_IS_SIMULATION); @@ -1885,11 +2398,13 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> (LITERAL_0b00, 56, 2, 62 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b00, 56, 2, 62 ); } else if (iv_def_IS_SIM) { - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> (LITERAL_0b01, 56, 2, 62 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b01, 56, 2, 62 ); } fapi2::buffer<uint64_t> @@ -1906,19 +2421,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000280d0601103full, @@ -1933,34 +2448,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -1975,24 +2490,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2008,23 +2523,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2041,19 +2556,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000280f0601103full, @@ -2068,34 +2583,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2110,24 +2625,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2143,23 +2658,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2176,19 +2691,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000280e0601103full, @@ -2203,34 +2718,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2245,24 +2760,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2278,23 +2793,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2311,19 +2826,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028100601103full, @@ -2338,34 +2853,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2380,24 +2895,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2413,23 +2928,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2446,19 +2961,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000280b0601103full, @@ -2473,34 +2988,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2515,24 +3030,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2548,23 +3063,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2581,19 +3096,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028090601103full, @@ -2608,34 +3123,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2650,24 +3165,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2683,23 +3198,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2716,19 +3231,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000280c0601103full, @@ -2743,34 +3258,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2785,24 +3300,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2818,23 +3333,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2851,19 +3366,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000280a0601103full, @@ -2878,34 +3393,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2920,24 +3435,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2953,23 +3468,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2986,19 +3501,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028070601103full, @@ -3013,34 +3528,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3055,24 +3570,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3088,23 +3603,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3121,19 +3636,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028110601103full, @@ -3148,34 +3663,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3190,24 +3705,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3223,23 +3738,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3256,19 +3771,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028060601103full, @@ -3283,34 +3798,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3325,24 +3840,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3358,23 +3873,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3391,19 +3906,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028080601103full, @@ -3418,34 +3933,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3460,24 +3975,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3493,23 +4008,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3526,19 +4041,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028040601103full, @@ -3553,34 +4068,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3595,24 +4110,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3628,23 +4143,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3661,19 +4176,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028020601103full, @@ -3688,34 +4203,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3730,24 +4245,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3763,23 +4278,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3796,19 +4311,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028050601103full, @@ -3823,34 +4338,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3865,24 +4380,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3898,23 +4413,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3931,19 +4446,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028030601103full, @@ -3958,34 +4473,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -4000,24 +4515,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -4033,23 +4548,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -4066,19 +4581,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028000601103full, @@ -4093,34 +4608,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -4135,24 +4650,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -4168,23 +4683,23 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -4201,19 +4716,19 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028010601103full, @@ -4228,34 +4743,34 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -4270,24 +4785,24 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -4303,26 +4818,27 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX0_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } - IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> (LITERAL_FENCED, 57, 1, 63 ); + IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_FENCE_FENCED, 57, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_scom0; l_rc = fapi2::getScom( TGT0, 0x800c24000601103full, @@ -4334,8 +4850,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_scom0.insert<uint64_t> (LITERAL_DRV_0S, 48, 2, - 62 ); + IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_DRV_0S, 48, 2, 62 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c000601103full, @@ -4347,8 +4863,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c010601103full, @@ -4360,8 +4876,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c020601103full, @@ -4373,8 +4889,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c030601103full, @@ -4386,8 +4902,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c040601103full, @@ -4399,8 +4915,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c050601103full, @@ -4412,8 +4928,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c060601103full, @@ -4425,8 +4941,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c070601103full, @@ -4438,8 +4954,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c080601103full, @@ -4451,8 +4967,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c090601103full, @@ -4464,8 +4980,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c0a0601103full, @@ -4477,8 +4993,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c0b0601103full, @@ -4490,8 +5006,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c0c0601103full, @@ -4503,8 +5019,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c0d0601103full, @@ -4516,8 +5032,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c0e0601103full, @@ -4529,8 +5045,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c0f0601103full, @@ -4542,8 +5058,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c100601103full, @@ -4555,8 +5071,8 @@ fapi2::ReturnCode p9_xbus_g0_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX0_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); l_rc = fapi2::putScom( TGT0, 0x800000000601103full, diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g1_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g1_scom.C index 5a63bfe0d..ef2d150d2 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g1_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_xbus_g1_scom.C @@ -27,58 +27,497 @@ using namespace fapi2; #define ATTR_IS_SIMULATION_ATTRIBUTE_VALUE_0 0 #define ATTR_IS_SIMULATION_ATTRIBUTE_VALUE_1 1 -#define LITERAL_0b00 0b00 -#define LITERAL_0b0000 0b0000 -#define LITERAL_0b00000 0b00000 -#define LITERAL_0b000000 0b000000 -#define LITERAL_0b0000000 0b0000000 -#define LITERAL_0b0000000000000000 0b0000000000000000 -#define LITERAL_0b000001 0b000001 -#define LITERAL_0b0000011 0b0000011 -#define LITERAL_0b00001 0b00001 -#define LITERAL_0b0010000 0b0010000 -#define LITERAL_0b0010001 0b0010001 -#define LITERAL_0b01 0b01 -#define LITERAL_0b0110 0b0110 -#define LITERAL_0b01100 0b01100 -#define LITERAL_0b01111 0b01111 -#define LITERAL_0b01111111 0b01111111 -#define LITERAL_0b100111 0b100111 -#define LITERAL_0b1011 0b1011 -#define LITERAL_0b11 0b11 -#define LITERAL_DRV_0S 0x0 -#define LITERAL_ENABLED 0x0 -#define LITERAL_FENCED 0x80000000 -#define LITERAL_OFF 0x0 -#define LITERAL_ON 0x80000000 -#define LITERAL_PATTERN_24_A_0_15 0x10000000 -#define LITERAL_PATTERN_24_A_16_22 0x84000000 -#define LITERAL_PATTERN_24_B_0_15 0xf03e0000 -#define LITERAL_PATTERN_24_B_16_22 0x7c000000 -#define LITERAL_PATTERN_24_C_0_15 0x7bc0000 -#define LITERAL_PATTERN_24_C_12_ACGH_16_22 0x0 -#define LITERAL_PATTERN_24_D_0_15 0x7c70000 -#define LITERAL_PATTERN_24_D_16_22 0xc0000000 -#define LITERAL_PATTERN_24_EF_16_22 0x80000000 -#define LITERAL_PATTERN_24_E_0_15 0x3ef0000 -#define LITERAL_PATTERN_24_F_0_15 0x1f0f0000 -#define LITERAL_PATTERN_24_GH_16_22 0x6000000 -#define LITERAL_PATTERN_24_G_0_15 0x18000000 -#define LITERAL_PATTERN_24_H_0_15 0x9c000000 -#define LITERAL_PATTERN_TX_AB_HALF_A_0_15 0x0 -#define LITERAL_PATTERN_TX_A_16_22 0x2000000 -#define LITERAL_PATTERN_TX_B_16_22 0xf8000000 -#define LITERAL_PATTERN_TX_C_0_15 0x1e0000 -#define LITERAL_PATTERN_TX_C_16_22 0xf6000000 -#define LITERAL_PATTERN_TX_DG_16_22 0x18000000 -#define LITERAL_PATTERN_TX_D_0_15 0x1f0000 -#define LITERAL_PATTERN_TX_E_16_22 0xbc000000 -#define LITERAL_PATTERN_TX_E_HALF_B_0_15 0xf0000 -#define LITERAL_PATTERN_TX_F_0_15 0x7c0000 -#define LITERAL_PATTERN_TX_F_HALF_A_16_22 0x20000000 -#define LITERAL_PATTERN_TX_G_0_15 0xc630000 -#define LITERAL_PATTERN_TX_H_0_15 0xe730000 -#define LITERAL_PATTERN_TX_H_HALF_B_16_22 0x9c000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_0b000001 0b000001 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFE12_EN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFEHISPD_EN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_END_LANE_ID_0b0010000 0b0010000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_FENCE_FENCED 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_IQSPD_CFG_0b11 0b11 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_0b0000000000000000 0b0000000000000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_0b01111111 0b01111111 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LTE_EN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_RX_BUS_WIDTH_0b0010001 0b0010001 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_0b0010001 0b0010001 +#define LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_0b00001 0b00001 +#define LITERAL_IOF1_RX_RX1_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15 0xf03e0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22 0x7c000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15 0x7c70000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22 0xc0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15 0x10000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22 0x84000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15 0x7bc0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15 0x9c000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15 0x1f0f0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15 0x18000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15 0x3ef0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15 0x10000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22 0x84000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15 0x18000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15 0x9c000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22 0x6000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15 0x7bc0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15 0x3ef0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15 0x7c70000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22 0xc0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15 0x1f0f0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15 0xf03e0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22 0x7c000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15 0x10000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22 0x84000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011 0b1011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100 0b01100 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000 0b0000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011 0b0000011 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000 0b000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111 0b100111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000 0b0000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110 0b0110 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000 0b00000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111 0b01111 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON 0x80000000 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF 0x0 +#define LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_0b000001 0b000001 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_0b0010001 0b0010001 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_OFF 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_DRV_0S 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_END_LANE_ID_0b0010000 0b0010000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_0b0000000000000000 0b0000000000000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_0b01111111 0b01111111 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_MAX_BAD_LANES_0b00001 0b00001 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PDWN_LITE_DISABLE_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b00 0b00 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b01 0b01 +#define LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_0b0000000 0b0000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22 0x2000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22 0xf8000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15 0x1e0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22 0xf6000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15 0x1f0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15 0xf0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22 0xbc000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15 0x7c0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22 0x20000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15 0xc630000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15 0xe730000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22 0x9c000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22 0x2000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15 0xe730000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22 0x9c000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15 0xc630000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15 0x7c0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22 0x20000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15 0xf0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22 0xbc000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15 0x1f0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22 0x18000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15 0x1e0000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22 0xf6000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22 0xf8000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON 0x80000000 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15 0x0 +#define LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22 0x2000000 fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& TGT0, const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1) @@ -96,7 +535,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_scom0.insert<uint64_t> (LITERAL_0b000001, 48, 6, 58 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_BUS_ID_0b000001, 48, 6, 58 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0; l_rc = fapi2::getScom( TGT0, 0x800c0c200601103full, IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0 ); @@ -107,7 +547,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0.insert<uint64_t> (LITERAL_0b000001, 48, 6, 58 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_ID_0b000001, 48, 6, 58 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0; l_rc = fapi2::getScom( TGT0, 0x800980200601103full, IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0 ); @@ -118,7 +559,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0000000, 49, 7, 57 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_0b0000000, 49, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0; l_rc = fapi2::getScom( TGT0, 0x800c84200601103full, @@ -130,11 +572,14 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0000000, 49, 7, 57 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_0b0000000, 49, 7, 57 ); - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0010000, 57, 7, 57 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_END_LANE_ID_0b0010000, 57, 7, 57 ); - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> (LITERAL_0b0010000, 57, 7, 57 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_START_LANE_ID_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_END_LANE_ID_0b0010000, 57, 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0; l_rc = fapi2::getScom( TGT0, 0x8009b8200601103full, IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0 ); @@ -145,7 +590,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> (LITERAL_0b0010001, 48, 7, 57 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_0b0010001, 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0; l_rc = fapi2::getScom( TGT0, 0x800c1c200601103full, IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0 ); @@ -156,9 +602,11 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0.insert<uint64_t> (LITERAL_0b0010001, 56, 7, 57 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_BUS_WIDTH_0b0010001, 56, 7, 57 ); - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> (LITERAL_0b0010001, 55, 7, 57 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_TX_BUS_WIDTH_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_RX_BUS_WIDTH_0b0010001, 55, 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8009e0200601103full, @@ -170,8 +618,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_scom0.insert<uint64_t> (LITERAL_0b0000000000000000, 48, - 16, 48 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_0_15_0b0000000000000000, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_scom0; l_rc = fapi2::getScom( TGT0, 0x8009e8200601103full, @@ -183,8 +631,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> (LITERAL_0b01111111, 48, 8, - 56 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LANE_DISABLED_VEC_16_23_0b01111111, 48, 8, 56 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x800cec200601103full, @@ -197,7 +645,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_scom0.insert<uint64_t> - (LITERAL_0b0000000000000000, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_0_15_0b0000000000000000, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_scom0; l_rc = fapi2::getScom( TGT0, 0x800cf4200601103full, @@ -209,8 +657,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> (LITERAL_0b01111111, 48, - 8, 56 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_LANE_DISABLED_VEC_16_23_0b01111111, 48, 8, 56 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220200601103full, @@ -222,8 +670,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220210601103full, @@ -235,8 +683,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220220601103full, @@ -248,8 +696,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220230601103full, @@ -261,8 +709,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220240601103full, @@ -274,8 +722,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220250601103full, @@ -287,8 +735,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220260601103full, @@ -300,8 +748,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220270601103full, @@ -313,8 +761,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220280601103full, @@ -326,8 +774,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220290601103full, @@ -339,8 +787,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002202a0601103full, @@ -352,8 +800,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002202b0601103full, @@ -365,8 +813,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002202c0601103full, @@ -378,8 +826,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002202d0601103full, @@ -391,8 +839,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002202e0601103full, @@ -404,8 +852,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8002202f0601103full, @@ -417,8 +865,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220300601103full, @@ -430,8 +878,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, - 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800220310601103full, @@ -443,7 +891,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> (LITERAL_ON, 48, 1, 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_LANE_DIG_PDWN_ON, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008200601103full, @@ -455,8 +904,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008210601103full, @@ -468,8 +917,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008220601103full, @@ -481,8 +930,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008230601103full, @@ -494,8 +943,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008240601103full, @@ -507,8 +956,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008250601103full, @@ -520,8 +969,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008260601103full, @@ -533,8 +982,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008270601103full, @@ -546,8 +995,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008280601103full, @@ -559,8 +1008,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008290601103full, @@ -572,8 +1021,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000082a0601103full, @@ -585,8 +1034,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000082b0601103full, @@ -598,8 +1047,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000082c0601103full, @@ -611,8 +1060,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000082d0601103full, @@ -624,8 +1073,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000082e0601103full, @@ -637,8 +1086,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000082f0601103full, @@ -650,8 +1099,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008300601103full, @@ -663,8 +1112,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, - 54, 1, 63 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_OFF, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800008310601103full, @@ -676,8 +1125,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> (LITERAL_ON, 54, - 1, 63 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_LANE_ANA_PDWN_ON, 54, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404200601103full, @@ -689,8 +1138,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404210601103full, @@ -702,8 +1151,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404220601103full, @@ -715,8 +1164,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404230601103full, @@ -728,8 +1177,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404240601103full, @@ -741,8 +1190,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404250601103full, @@ -754,8 +1203,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404260601103full, @@ -767,8 +1216,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404270601103full, @@ -780,8 +1229,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404280601103full, @@ -793,8 +1242,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404290601103full, @@ -806,8 +1255,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004042a0601103full, @@ -819,8 +1268,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004042b0601103full, @@ -832,8 +1281,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004042c0601103full, @@ -845,8 +1294,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004042d0601103full, @@ -858,8 +1307,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004042e0601103full, @@ -871,8 +1320,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x8004042f0601103full, @@ -884,8 +1333,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800404300601103full, @@ -897,8 +1346,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> (LITERAL_ENABLED, 48, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_LANE_PDWN_ENABLED, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800810200601103full, IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0 ); @@ -909,7 +1358,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_CLKDIST_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800c14200601103full, IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0 ); @@ -920,7 +1370,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 48, 1, 63 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_OFF, 48, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0; l_rc = fapi2::getScom( TGT0, 0x800990200601103full, IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0 ); @@ -931,9 +1382,11 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> (LITERAL_ON, 58, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_ON, 58, 1, 63 ); - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_ON, 59, 1, 63 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PDWN_LITE_DISABLE_ON, 59, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0200601103full, @@ -946,7 +1399,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0210601103full, @@ -959,7 +1412,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0220601103full, @@ -972,7 +1425,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0230601103full, @@ -985,7 +1438,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0240601103full, @@ -998,7 +1451,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_E_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0250601103full, @@ -1011,7 +1464,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0260601103full, @@ -1024,7 +1477,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0270601103full, @@ -1037,7 +1490,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0280601103full, @@ -1050,7 +1503,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0290601103full, @@ -1063,7 +1516,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_H_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c02a0601103full, @@ -1076,7 +1529,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_G_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c02b0601103full, @@ -1089,7 +1542,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_F_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c02c0601103full, @@ -1102,7 +1555,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_E_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_E_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c02d0601103full, @@ -1115,7 +1568,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_D_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c02e0601103full, @@ -1128,7 +1581,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_C_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c02f0601103full, @@ -1141,7 +1594,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_B_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c0300601103full, @@ -1154,7 +1607,7 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_0_15_PATTERN_24_A_0_15, 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8200601103full, @@ -1167,7 +1620,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8210601103full, @@ -1180,7 +1634,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8220601103full, @@ -1193,7 +1648,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_12_ACGH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8230601103full, @@ -1206,7 +1662,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8240601103full, @@ -1219,7 +1676,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8250601103full, @@ -1232,7 +1690,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8260601103full, @@ -1245,7 +1704,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8270601103full, @@ -1258,7 +1718,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8280601103full, @@ -1271,7 +1732,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8290601103full, @@ -1284,7 +1746,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c82a0601103full, @@ -1297,7 +1760,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_GH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_GH_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c82b0601103full, @@ -1310,7 +1774,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c82c0601103full, @@ -1323,7 +1788,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_EF_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_EF_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c82d0601103full, @@ -1336,7 +1802,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_D_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_D_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c82e0601103full, @@ -1349,7 +1816,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_C_12_ACGH_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_C_12_ACGH_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c82f0601103full, @@ -1362,7 +1830,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8002c8300601103full, @@ -1375,7 +1844,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_24_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RD_RX_BIT_REGS_RX_PRBS_SEED_VALUE_16_22_PATTERN_24_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c200601103full, @@ -1388,7 +1858,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c210601103full, @@ -1401,7 +1872,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c220601103full, @@ -1414,7 +1886,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c230601103full, @@ -1427,7 +1900,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c240601103full, @@ -1440,7 +1914,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_HALF_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c250601103full, @@ -1453,7 +1928,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c260601103full, @@ -1466,7 +1942,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c270601103full, @@ -1479,7 +1956,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c280601103full, @@ -1492,7 +1970,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c290601103full, @@ -1505,7 +1984,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_H_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c2a0601103full, @@ -1518,7 +1998,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_G_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_G_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c2b0601103full, @@ -1531,7 +2012,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_F_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c2c0601103full, @@ -1544,7 +2026,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_HALF_B_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_E_HALF_B_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c2d0601103full, @@ -1557,7 +2040,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_D_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_D_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c2e0601103full, @@ -1570,7 +2054,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_C_0_15, 48, 16, + 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c2f0601103full, @@ -1583,7 +2068,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0; l_rc = fapi2::getScom( TGT0, 0x80043c300601103full, @@ -1596,7 +2082,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_AB_HALF_A_0_15, 48, 16, 48 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_0_15_PATTERN_TX_AB_HALF_A_0_15, + 48, 16, 48 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444200601103full, @@ -1609,7 +2096,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444210601103full, @@ -1622,7 +2110,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444220601103full, @@ -1635,7 +2124,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444230601103full, @@ -1648,7 +2138,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444240601103full, @@ -1661,7 +2152,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444250601103full, @@ -1674,7 +2166,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_HALF_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444260601103full, @@ -1687,7 +2180,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444270601103full, @@ -1700,7 +2194,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_HALF_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444280601103full, @@ -1713,7 +2208,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444290601103full, @@ -1726,7 +2222,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_H_HALF_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_H_HALF_B_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004442a0601103full, @@ -1739,7 +2236,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004442b0601103full, @@ -1752,7 +2250,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_F_HALF_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_F_HALF_A_16_22, + 48, 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004442c0601103full, @@ -1765,7 +2264,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_E_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_E_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004442d0601103full, @@ -1778,7 +2278,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_DG_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_DG_16_22, 48, + 7, 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004442e0601103full, @@ -1791,7 +2292,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_C_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_C_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x8004442f0601103full, @@ -1804,7 +2306,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_B_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_B_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0; l_rc = fapi2::getScom( TGT0, 0x800444300601103full, @@ -1817,7 +2320,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& } IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_scom0.insert<uint64_t> - (LITERAL_PATTERN_TX_A_16_22, 48, 7, 57 ); + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_PRBS_SEED_VALUE_16_22_PATTERN_TX_A_16_22, 48, 7, + 57 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0; l_rc = fapi2::getScom( TGT0, 0x800998200601103full, IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0 ); @@ -1828,9 +2332,11 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0.insert<uint64_t> (LITERAL_0b00001, 48, 5, 59 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_WTR_MAX_BAD_LANES_0b00001, 48, 5, 59 ); - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_0b00001, 53, 5, 59 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_MAX_BAD_LANES_0b00001, 53, 5, 59 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0; l_rc = fapi2::getScom( TGT0, 0x8008c0200601103full, IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0 ); @@ -1841,15 +2347,20 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_OFF, 55, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_OFF, 55, 1, 63 ); - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_OFF, 56, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_LTE_EN_OFF, 56, 1, 63 ); - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_0b11, 57, 2, 62 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_IQSPD_CFG_0b11, 57, 2, 62 ); - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_ON, 59, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFEHISPD_EN_ON, 59, 1, 63 ); - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> (LITERAL_ON, 60, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PEAK_TUNE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DFE12_EN_ON, 60, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_scom0; l_rc = fapi2::getScom( TGT0, 0x800b80200601103full, @@ -1861,7 +2372,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_RX_RX1_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_scom0.insert<uint64_t> (LITERAL_OFF, 60, 1, 63 ); + IOF1_RX_RX1_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_DATASM_DATASM_REGS_RX_CTL_DATASM_CLKDIST_PDWN_OFF, 60, 1, 63 ); ATTR_IS_SIMULATION_Type iv_TGT1_ATTR_IS_SIMULATION; l_rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, TGT1, iv_TGT1_ATTR_IS_SIMULATION); @@ -1886,11 +2398,13 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> (LITERAL_0b00, 56, 2, 62 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b00, 56, 2, 62 ); } else if (iv_def_IS_SIM) { - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> (LITERAL_0b01, 56, 2, 62 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_PG_SPARE_MODE_8_9_0b01, 56, 2, 62 ); } fapi2::buffer<uint64_t> @@ -1907,19 +2421,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028210601103full, @@ -1934,34 +2448,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -1976,24 +2490,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2009,23 +2523,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2042,19 +2556,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028230601103full, @@ -2069,34 +2583,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2111,24 +2625,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2144,23 +2658,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2177,19 +2691,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028200601103full, @@ -2204,34 +2718,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2246,24 +2760,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2279,23 +2793,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2312,19 +2826,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028220601103full, @@ -2339,34 +2853,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2381,24 +2895,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2414,23 +2928,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_0_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2447,19 +2961,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028270601103full, @@ -2474,34 +2988,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2516,24 +3030,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2549,23 +3063,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2582,19 +3096,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028250601103full, @@ -2609,34 +3123,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2651,24 +3165,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2684,23 +3198,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2717,19 +3231,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028260601103full, @@ -2744,34 +3258,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2786,24 +3300,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2819,23 +3333,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2852,19 +3366,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028240601103full, @@ -2879,34 +3393,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -2921,24 +3435,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -2954,23 +3468,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_1_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -2987,19 +3501,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028280601103full, @@ -3014,34 +3528,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3056,24 +3570,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3089,23 +3603,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3122,19 +3636,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000282a0601103full, @@ -3149,34 +3663,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3191,24 +3705,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3224,23 +3738,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3257,19 +3771,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028290601103full, @@ -3284,34 +3798,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3326,24 +3840,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3359,23 +3873,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3392,19 +3906,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028310601103full, @@ -3419,34 +3933,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3461,24 +3975,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3494,23 +4008,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_2_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3527,19 +4041,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000282e0601103full, @@ -3554,34 +4068,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3596,24 +4110,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3629,23 +4143,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_0_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3662,19 +4176,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000282c0601103full, @@ -3689,34 +4203,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3731,24 +4245,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3764,23 +4278,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_1_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3797,19 +4311,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000282d0601103full, @@ -3824,34 +4338,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -3866,24 +4380,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -3899,23 +4413,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_2_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -3932,19 +4446,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000282b0601103full, @@ -3959,34 +4473,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -4001,24 +4515,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -4034,23 +4548,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_3_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -4067,19 +4581,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x8000282f0601103full, @@ -4094,34 +4608,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -4136,24 +4650,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -4169,23 +4683,23 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_4_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } fapi2::buffer<uint64_t> @@ -4202,19 +4716,19 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_OFF, 53, 1, 63 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_ON, 53, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_ON, 53, 1, 63 ); } IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 54, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_6_OFF, 54, 1, 63 ); IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_5_scom0.insert<uint64_t> - (LITERAL_OFF, 55, 1, 63 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_PL_DATA_DAC_SPARE_MODE_7_OFF, 55, 1, 63 ); fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0; l_rc = fapi2::getScom( TGT0, 0x800028300601103full, @@ -4229,34 +4743,34 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0000, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0000, 48, 4, 60 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b0110, 48, 4, 60 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_0b0110, 48, 4, 60 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b00000, 52, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 52, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_EVEN_INTEG_FINE_GAIN_0b01111, 52, 5, 59 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b00000, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b00000, 57, 5, 59 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_INTEG_COARSE_GAIN_scom0.insert<uint64_t> - (LITERAL_0b01111, 57, 5, 59 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_ODD_INTEG_FINE_GAIN_0b01111, 57, 5, 59 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0; @@ -4271,24 +4785,24 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b00000, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b00000, 48, 5, 59 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b01100, - 48, 5, 59 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_0b01100, 48, 5, 59 ); } if (iv_def_IS_HW) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b0000, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b0000, 53, 4, 60 ); } else if (iv_def_IS_SIM) { - IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> (LITERAL_0b1011, - 53, 4, 60 ); + IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_PEAK_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_CTLE_GAIN_0b1011, 53, 4, 60 ); } fapi2::buffer<uint64_t> IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0; @@ -4304,26 +4818,27 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000000, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000000, 48, 7, 57 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b0000011, 48, 7, 57 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_0b0000011, 48, 7, 57 ); } if (iv_def_IS_HW) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b000000, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b000000, 55, 6, 58 ); } else if (iv_def_IS_SIM) { IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1ARATIO_VAL_scom0.insert<uint64_t> - (LITERAL_0b100111, 55, 6, 58 ); + (LITERAL_IOF1_RX_RX1_RXPACKS_3_RXPACK_RD_SLICE_5_RX_DAC_REGS_RX_DAC_REGS_RX_A_H1CAL_VAL_0b100111, 55, 6, 58 ); } - IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> (LITERAL_FENCED, 57, 1, 63 ); + IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_PDWN_LITE_DISABLE_scom0.insert<uint64_t> + (LITERAL_IOF1_RX_RX1_RXCTL_CTL_REGS_RX_CTL_REGS_RX_FENCE_FENCED, 57, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_scom0; l_rc = fapi2::getScom( TGT0, 0x800c24200601103full, @@ -4335,8 +4850,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_scom0.insert<uint64_t> (LITERAL_DRV_0S, 48, 2, - 62 ); + IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXCTL_CTL_REGS_TX_CTL_REGS_TX_DRV_CLK_PATTERN_GCRMSG_DRV_0S, 48, 2, 62 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c200601103full, @@ -4348,8 +4863,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c210601103full, @@ -4361,8 +4876,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c220601103full, @@ -4374,8 +4889,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c230601103full, @@ -4387,8 +4902,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_0_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c240601103full, @@ -4400,8 +4915,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c250601103full, @@ -4413,8 +4928,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c260601103full, @@ -4426,8 +4941,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c270601103full, @@ -4439,8 +4954,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_1_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c280601103full, @@ -4452,8 +4967,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c290601103full, @@ -4465,8 +4980,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c2a0601103full, @@ -4478,8 +4993,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c2b0601103full, @@ -4491,8 +5006,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_2_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c2c0601103full, @@ -4504,8 +5019,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_0_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c2d0601103full, @@ -4517,8 +5032,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_1_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c2e0601103full, @@ -4530,8 +5045,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_2_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c2f0601103full, @@ -4543,8 +5058,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_3_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); fapi2::buffer<uint64_t> IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0; l_rc = fapi2::getScom( TGT0, 0x80040c300601103full, @@ -4556,8 +5071,8 @@ fapi2::ReturnCode p9_xbus_g1_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& break; } - IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> (LITERAL_ON, 62, 1, - 63 ); + IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_scom0.insert<uint64_t> + (LITERAL_IOF1_TX_WRAP_TX1_TXPACKS_3_TXPACK_DD_SLICE_4_DD_TX_BIT_REGS_TX_CAL_LANE_SEL_ON, 62, 1, 63 ); l_rc = fapi2::putScom( TGT0, 0x800000200601103full, |
