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| author | Claus Michael Olsen <cmolsen@us.ibm.com> | 2016-09-19 11:38:17 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-24 15:45:15 -0400 |
| commit | b7ef219d889fa2831d293e1aad9275270bc995af (patch) | |
| tree | e138e790c921fd5cdf50c9cde26bd5a7b51fec80 /src/import/chips | |
| parent | ae1e0735bb243904249a1555292ece14415d2b38 (diff) | |
| download | talos-hostboot-b7ef219d889fa2831d293e1aad9275270bc995af.tar.gz talos-hostboot-b7ef219d889fa2831d293e1aad9275270bc995af.zip | |
xip_customize: Updated to error on empty ring section for SBE,CME,SGPE.
Change-Id: I6de4925d21d7d314e8b33f0d3313e814fff5e620
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29896
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29950
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C | 17 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml | 10 |
2 files changed, 21 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C index d222b3642..d37126473 100644 --- a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C +++ b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C @@ -33,12 +33,6 @@ using namespace fapi2; -template<typename T> -T min (T a, T b) -{ - return ((a < b) ? a : b); -} - #define MBOX_ATTR_WRITE(ID,TARGET,IMAGE) \ { \ fapi2::ID##_Type ID##_attrVal; \ @@ -906,6 +900,11 @@ fapi2::ReturnCode p9_xip_customize ( io_ringSectionBufSize = l_xipRingsSection.iv_size; + FAPI_ASSERT( io_ringSectionBufSize > 0, + fapi2::XIPC_EMPTY_RING_SECTION(). + set_CHIP_TARGET(i_proc_target), + "Ring section size in SBE image is zero. No TOR. Can't append rings."); + FAPI_DBG("Size of .rings section before VPD update: %d", io_ringSectionBufSize); l_maxRingSectionSize = l_maxImageSize - l_imageSizeWithoutRings; @@ -1094,6 +1093,12 @@ fapi2::ReturnCode p9_xip_customize ( "p9_xip_get_section() failed (7) getting .rings section w/rc=0x%08X", (uint32_t)l_rc ); + FAPI_ASSERT( l_xipRingsSection.iv_size > 0, + fapi2::XIPC_EMPTY_RING_SECTION(). + set_CHIP_TARGET(i_proc_target), + "CME or SGPE ring section size is zero (sysPhase=%d). No TOR. Can't append rings.", + i_sysPhase ); + l_hwRingsSection = (void*)((uintptr_t)io_image + l_xipRingsSection.iv_offset); // Extract the DD level diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml index 28f9752bc..39f0982e6 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml @@ -177,6 +177,16 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <rc>RC_XIPC_EMPTY_RING_SECTION</rc> + <description>The ring section size is zero. No TOR. Can't append rings</description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <ffdc>CHIP_TARGET</ffdc> + </hwpError> + <!-- ********************************************************************* --> + <hwpError> <rc>RC_XIPC_IMAGE_WOULD_OVERFLOW</rc> <description> Ran out of image buffer space trying to append a ring to the .rings section |
