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| author | Chris Steffen <cwsteffen@us.ibm.com> | 2016-10-14 11:55:05 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-10-16 21:36:56 -0400 |
| commit | b6e7e73f9d7907a814f3e98fdf6c0694b83dbb47 (patch) | |
| tree | 27ec7857c5a1dca1958a9926cae39a6cfefe0a8a /src/import/chips | |
| parent | b9589258af1a8dfa64069657a0f56b163f017159 (diff) | |
| download | talos-hostboot-b6e7e73f9d7907a814f3e98fdf6c0694b83dbb47.tar.gz talos-hostboot-b6e7e73f9d7907a814f3e98fdf6c0694b83dbb47.zip | |
io scom fix
- breaks were removed by accident recently with a target type fix.
- Added breaks to my switch statement.
Change-Id: Icf447f2dddac44f4cc3831415beef56f0274e517
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31255
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31256
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/io/p9_io_scom.H | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H b/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H index 3069b28e0..da5f35a2f 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H +++ b/src/import/chips/p9/procedures/hwp/io/p9_io_scom.H @@ -130,18 +130,23 @@ inline uint32_t get_base_address( const fapi2::Target < K > i_target, uint32_t& { case fapi2::TargetType::TARGET_TYPE_XBUS: o_base_addr = P9_XBUS_PHY_BASE_0x06010C00; + break; case fapi2::TargetType::TARGET_TYPE_ABUS: o_base_addr = P9_ABUS0_PHY_BASE_0x09011000; + break; case fapi2::TargetType::TARGET_TYPE_MCS: o_base_addr = P9_DMI0_PHY_BASE_0x02011A00; + break; case fapi2::TargetType::TARGET_TYPE_OBUS: o_base_addr = P9_OBUS0_PHY_BASE_0x09010C00; + break; case fapi2::TargetType::TARGET_TYPE_MEMBUF_CHIP: o_base_addr = CEN_PHY_BASE_0x02010400; + break; default: fapi2::IO_GCR_TARGET_TYPE_NOT_FOUND().set_TARGET( i_target ).execute(); |
