p9_block_wakeup_intr Level 2

- Fixed problems with Cronus to ungate testing
- Ran on Awan and SUET
- Wrapper has ability to just to -set and -clear but also
  tests all supported options
- Added a "no special wakeup" option (parm) has there may
  be use cases with it as P8 did NOT perform Special Wake-up
  to set the bit while P9 Hcode is stating this requirement.
- Has a placeholder for special wakeup inclusion later.
- Address Gerrit comments (round 2)
- Rebased (4)

Change-Id: I0722065ce59a2c6ebfdc6c8cf77cb5746c3db7aa
RTC: 136783
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23347
Tested-by: Jenkins Server
Tested-by: Auto Mirror
Tested-by: Hostboot CI
Tested-by: PPE CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24224
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 111 insertions, 50 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
index 83faa0547..1c825bccd 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C
@@ -17,14 +17,14 @@
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 ///
-/// @file p8_block_wakeup_intr.C
+/// @file p9_block_wakeup_intr.C
 /// @brief Set/reset the BLOCK_REG_WKUP_SOURCES bit in the PCBS-PM associated
 ///          with an EX chiplet
 ///
 //  *HWP HWP Owner: Amit Kumar <akumar3@us.ibm.com>
 //  *HWP FW Owner: Bilicon Patil <bilpatil@in.ibm.com>
 //  *HWP Team: PM
-//  *HWP Level: 1
+//  *HWP Level: 2
 //  *HWP Consumed by: FSP:HS
 ///
 /// @verbatim
@@ -43,7 +43,7 @@
 // Includes
 // ----------------------------------------------------------------------
 
-#include "p9_block_wakeup_intr.H"
+#include <p9_block_wakeup_intr.H>
 
 
 
@@ -61,57 +61,107 @@ const char* OP_TYPE_STRING[] =
 
 /// @brief @brief Set/reset the BLOCK_INTR_INPUTS bit in the Core PPM
 ///         associated with an EX chiplet
-fapi2::ReturnCode p9_block_wakeup_intr(
-    const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_core_target,
-    const p9pmblockwkup::OP_TYPE i_operation )
 
+fapi2::ReturnCode
+p9_block_wakeup_intr(
+    const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_core_target,
+    const p9pmblockwkup::OP_TYPE i_operation)
 {
-    FAPI_IMP("p9_block_wakeup_intr start");
-
-#if 0
-    ecmdDataBufferBase  data(64);
+    FAPI_INF("> p9_block_wakeup_intr...");
 
-    uint8_t             attr_chip_unit_pos = 0;
+    fapi2::buffer<uint64_t> l_data64 = 0;
 
-    // CPMMR Bit definitions
-    const uint32_t      BLOCK_INTR_INPUTS = 11;
+    // Get the core number
+    uint8_t l_attr_chip_unit_pos = 0;
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
+                           i_core_target,
+                           l_attr_chip_unit_pos),
+             "fapiGetAttribute of ATTR_CHIP_UNIT_POS failed");
 
-    FAPI_DBG("Executing with operation %s to Core %s...",
-             p9pmblockwkup::P9_BLKWKUP_OP_STRING[i_operation],
-             i_core_target.toEcmdString());
+    // Read for trace
+    {
+        fapi2::buffer<uint64_t> l_cpmmr = 0;
+        fapi2::buffer<uint64_t> l_gpmmr = 0;
+
+        // Read the CPMMR and GPMMR as a trace
+        FAPI_TRY(fapi2::getScom(i_core_target,
+                                C_CPPM_CPMMR,
+                                l_cpmmr),
+                 "getScom of CPMMR failed");
+
+        FAPI_TRY(fapi2::getScom(i_core_target,
+                                C_PPM_GPMMR,
+                                l_gpmmr),
+                 "getScom of GPMMR failed");
+
+        FAPI_DBG("Debug: before setting PPM_WRITE_OVERRIDE on Core %d - CPPMR: 0x%016llX GPMMR: 0x%016llX",
+                 l_attr_chip_unit_pos, l_cpmmr, l_gpmmr);
+    }
 
+    // Ensure access to the GPMMR is in place using CPMMR Write Access
+    // Override.  This will not affect the CME functionality as only the
+    // Block Wake-up bit is being manipulated -- a bit that the CME does
+    // not control but does react upon.
 
-    // Get the core number
-    FAPI_TRY(FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS,
-                            &i_core_target,
-                            attr_chip_unit_pos),
-             "fapiGetAttribute of ATTR_CHIP_UNIT_POS failed");
+    FAPI_INF("Set the CPPM PPM Write Override");
+    l_data64.flush<0>().setBit<C_CPPM_CPMMR_PPM_WRITE_OVERRIDE>();
+    FAPI_TRY(fapi2::putScom(i_core_target,
+                            C_CPPM_CPMMR_OR,
+                            l_data64),
+             "putScom of CPMMR to set PMM Write Override failed");
 
-    FAPI_DBG("Core number = %d", attr_chip_unit_pos);
+    l_data64.flush<0>().setBit<BLOCK_REG_WKUP_EVENTS>();
 
-    if (i_operation == p9pmblockwkup::SET)
+    switch (i_operation)
     {
-        FAPI_INF("Setting Block Interrupt Sources...");
+        case p9pmblockwkup::SET:
 
+            // @todo RTC 144905 Add Special Wakeup setting here when available
 
-    }
-    else if (i_operation == p9pmblockwkup::CLEAR)
-    {
+            FAPI_INF("Setting GPMMR[Block Interrupt Sources] on Core %d",
+                     l_attr_chip_unit_pos);
 
-        FAPI_INF("Clearing Block Interrupt Sources...");
+            FAPI_TRY(fapi2::putScom(i_core_target,
+                                    C_PPM_GPMMR_OR,
+                                    l_data64),
+                     "Setting GPMMR failed");
 
+            // @todo RTC 144905 Add Special Wakeup clearing here when available
 
-    }
-    else
-    {
-        FAPI_ASSERT(false,
-                    BLOCK_WAKEUP_INTR_OP()
-                    .set_OPERATION(i_operation),
-                    "Invalid operation specified.");
+            break;
+
+        case p9pmblockwkup::SET_NOSPWUP:
+            FAPI_INF("Setting GPMMR[Block Interrupt Sources] without Special Wake-up on Core %d",
+                     l_attr_chip_unit_pos);
+
+            FAPI_TRY(fapi2::putScom(i_core_target,
+                                    C_PPM_GPMMR_OR,
+                                    l_data64),
+                     "Setting GPMMR failed");
+            break;
+
+        case p9pmblockwkup::CLEAR:
+            FAPI_INF("Clearing GPMMR[Block Interrupt Sources] on Core %d",
+                     l_attr_chip_unit_pos);
+
+            FAPI_TRY(fapi2::putScom(i_core_target,
+                                    C_PPM_GPMMR_CLEAR,
+                                    l_data64),
+                     "Clearing GPMMR failed");
+            break;
+
+        default:
+            ;
     }
 
+    FAPI_INF("Clear the CPPM PPM Write Override");
+    l_data64.flush<0>().setBit<C_CPPM_CPMMR_PPM_WRITE_OVERRIDE>();
+    FAPI_TRY(fapi2::putScom(i_core_target,
+                            C_CPPM_CPMMR_CLEAR,
+                            l_data64),
+             "putScom of CPMMR to clear PMM Write Override failed");
 
-#endif
-    FAPI_INF("p9_block_wakeup_intr end");
+fapi_try_exit:
+    FAPI_INF("< p9_block_wakeup_intr...");
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
index 5f080ec68..a9ae0053a 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.H
@@ -37,10 +37,9 @@
 // Includes
 //------------------------------------------------------------------------------
 
-#include <p9_pm.H>
 #include <fapi2.H>
-#include <p9_misc_scom_addresses.H>
-
+#include <p9_quad_scom_addresses.H>
+#include <p9_quad_scom_addresses_fld.H>
 
 //------------------------------------------------------------------------------
 // Constant definitions
@@ -49,22 +48,35 @@
 namespace p9pmblockwkup
 {
 
-static const uint8_t NUM_OPS = 2;
-
 enum OP_TYPE
 {
-    SET,
-    CLEAR
+    SET = 0,
+    SET_NOSPWUP = 1,
+    CLEAR = 2
 };
 
+// Used by checking infrasture checking code
+static const uint32_t END_OP = CLEAR;
+
 } // namespace p9pmblockwkup
 
+
+//
+// CPMMR Bit definitions
+const uint32_t      BLOCK_REG_WKUP_EVENTS = 6;
+
+// GPMMR Address mappings (for clarity)
+static const uint64_t C_PPM_GPMMR       = C_PPM_GPMMR_SCOM;
+static const uint64_t C_PPM_GPMMR_CLEAR = C_PPM_GPMMR_SCOM1;
+static const uint64_t C_PPM_GPMMR_OR    = C_PPM_GPMMR_SCOM2;
+
 // function pointer typedef definition for HWP call support
 typedef fapi2::ReturnCode (*p9_block_wakeup_intr_FP_t) (
     const fapi2::Target<fapi2::TARGET_TYPE_CORE>&,
     const p9pmblockwkup::OP_TYPE);
 
-extern "C" {
+extern "C"
+{
 
 //------------------------------------------------------------------------------
 // Function prototype
@@ -76,13 +88,12 @@ extern "C" {
 /// @param[in] i_core_target    Core target
 /// @param[in] i_operation      SET, CLEAR
 ///
-/// @retval ECMD_SUCCESS
-/// @retval ERROR only those from called functions or MACROs
+/// @return FAPI2_RC_SUCCESS if success, else error code.
 
     fapi2::ReturnCode
-    p9_block_wakeup_intr(  const fapi2::Target<fapi2::TARGET_TYPE_CORE>&
-                           i_core_target,
-                           p9pmblockwkup::OP_TYPE i_operation);
+    p9_block_wakeup_intr(
+        const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_core_target,
+        const p9pmblockwkup::OP_TYPE i_operation);
 
 } // extern "C"