Adding ECC syndrome register access functions

Change-Id: Ifcdf9b097de882e6ea7f80ed2687822bd814d443
Original-Change-Id: I890d17aff1004e37327b5f7f1ee2dc5a27cef9f0
RTC: 156340
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26081
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36304
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 1225 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_aue_trap.H b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_aue_trap.H
new file mode 100644
index 000000000..2fff32c56
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_aue_trap.H
@@ -0,0 +1,130 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_aue_trap.H $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_aue_trap.H
+/// @brief Subroutines for the MC mainline aue address trap registers (MBAUER*Q)
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_AUE_TRAP_H_
+#define _MSS_MAINLINE_AUE_TRAP_H_
+
+#include <fapi2.H>
+#include <lib/mcbist/address.H>
+#include <lib/utils/scom.H>
+#include <lib/utils/find.H>
+#include <lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_aue_trap
+{
+
+///
+/// @brief Read MBS Mainline AUE Address Trap (MBAUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+    const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_AUE_REGS[l_port]), o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline AUE Address Trap (MBAUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+    const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_AUE_REGS[l_port]), i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::AUE_ADDR_TRAP, TT::AUE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::AUE_ADDR_TRAP, TT::AUE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+} // close namespace mainline_aue_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_rce_trap.H b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_rce_trap.H
new file mode 100644
index 000000000..7122dfe28
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_rce_trap.H
@@ -0,0 +1,130 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_rce_trap.H $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_rce_trap.H
+/// @brief Subroutines for the MC mainline rce address trap registers (MBRCER*Q)
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_RCE_TRAP_H_
+#define _MSS_MAINLINE_RCE_TRAP_H_
+
+#include <fapi2.H>
+#include <lib/mcbist/address.H>
+#include <lib/utils/scom.H>
+#include <lib/utils/find.H>
+#include <lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_rce_trap
+{
+
+///
+/// @brief Read MBS Mainline RCE Address Trap (MBRCER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+    const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_RCE_REGS[l_port]), o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline RCE Address Trap (MBRCER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+    const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_RCE_REGS[l_port]), i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::RCE_ADDR_TRAP, TT::RCE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::RCE_ADDR_TRAP, TT::RCE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+} // close namespace mainline_rce_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_ue_trap.H b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_ue_trap.H
new file mode 100644
index 000000000..21833b63f
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_ue_trap.H
@@ -0,0 +1,130 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/ecc/mainline_ue_trap.H $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_ue_trap.H
+/// @brief Subroutines for the MC mainline ue address trap registers (MBUER*Q)
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINLINE_UE_TRAP_H_
+#define _MSS_MAINLINE_UE_TRAP_H_
+
+#include <fapi2.H>
+#include <lib/mcbist/address.H>
+#include <lib/utils/scom.H>
+#include <lib/utils/find.H>
+#include <lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace mainline_ue_trap
+{
+
+///
+/// @brief Read MBS Mainline UE Address Trap (MBUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+    const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, (TT::MAINLINE_UE_REGS[l_port]), o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline UE Address Trap (MBUER*Q) register
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mc
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+    const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, (TT::MAINLINE_UE_REGS[l_port]), i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::UE_ADDR_TRAP, TT::UE_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::UE_ADDR_TRAP, TT::UE_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+} // close namespace mainline_ue_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/maint_current_trap.H b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/maint_current_trap.H
new file mode 100644
index 000000000..67d692921
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/maint_current_trap.H
@@ -0,0 +1,187 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/ecc/maint_current_trap.H $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file maint_current_trap.H
+/// @brief Subroutines for the MC maint current address trap register (MCBMCATQ)
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_MAINT_CURRENT_TRAP_H_
+#define _MSS_MAINT_CURRENT_TRAP_H_
+
+#include <fapi2.H>
+#include <lib/mcbist/address.H>
+#include <lib/utils/scom.H>
+#include <lib/utils/find.H>
+#include <lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace maint_current_trap
+{
+
+///
+/// @brief Read MBS Mainline MPE Address Trap (MCBMCATQ) register
+/// @param[in] i_target the fapi2 target of the MCA
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+inline fapi2::ReturnCode read( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::getScom(l_mcbist_target, MCBIST_MCBMCATQ, o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mainline MPE Address Trap (MCBMCATQ) register
+/// @param[in] i_target the fapi2 target of the MCA
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+inline fapi2::ReturnCode write( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+                                const fapi2::buffer<uint64_t>& i_data )
+{
+    const auto& l_mcbist_target = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target);
+
+    FAPI_TRY( mss::putScom(l_mcbist_target, MCBIST_MCBMCATQ, i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void set_address( fapi2::buffer<uint64_t>& io_data, const mcbist::address& i_address)
+{
+    io_data.insertFromRight<TT::CURRENT_ADDR_TRAP, TT::CURRENT_ADDR_TRAP_LEN>(uint64_t(i_address));
+    FAPI_INF("set_address: 0x%016lx", uint64_t(i_address));
+}
+
+///
+/// @brief get_address
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_address mcbist::address form of address field
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void get_address( const fapi2::buffer<uint64_t>& i_data, mcbist::address& o_address )
+{
+    uint64_t l_addr = 0;
+    i_data.extractToRight<TT::CURRENT_ADDR_TRAP, TT::CURRENT_ADDR_TRAP_LEN>(l_addr);
+    o_address = mcbist::address(l_addr);
+    FAPI_INF("get_address: 0x%016lx", uint64_t(l_addr));
+}
+
+///
+/// @brief set_port
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value - desired value
+/// @note MCBMCATQ_CFG_CURRENT_PORT_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store port. This field is ONLY valid in maint_addr_mode. Garabage otherwise.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void set_port( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::CURRENT_PORT, TT::CURRENT_PORT_LEN>(i_value);
+    FAPI_INF("set_port: 0x%01lx", i_value);
+}
+
+///
+/// @brief get_port
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value - representing the field value
+/// @note MCBMCATQ_CFG_CURRENT_PORT_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store port. This field is ONLY valid in maint_addr_mode. Garabage otherwise.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void get_port( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::CURRENT_PORT, TT::CURRENT_PORT_LEN>(o_value);
+    FAPI_INF("get_port: 0x%01lx", o_value);
+}
+
+///
+/// @brief set_dimm
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value - desired value
+/// @note MCBMCATQ_CFG_CURRENT_DIMM_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store dimm select.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void set_dimm( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.writeBit<TT::CURRENT_DIMM>(i_value);
+    FAPI_INF("set_dimm: 0x%01lx", i_value);
+}
+
+///
+/// @brief get_dimm
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCA
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value - representing the field value
+/// @note MCBMCATQ_CFG_CURRENT_DIMM_TRAP: If MCBCFGQ_cfg_current_addr_trap_update_dis = 0, then this
+/// @note field will store dimm select.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = eccTraits<T> >
+inline void get_dimm( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    o_value = i_data.getBit<TT::CURRENT_DIMM>();
+    FAPI_INF("get_dimm: 0x%01lx", o_value);
+}
+
+} // close namespace maint_current_trap
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/read_error_count_regs.H b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/read_error_count_regs.H
new file mode 100644
index 000000000..d36d09e57
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/read_error_count_regs.H
@@ -0,0 +1,648 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/ecc/read_error_count_regs.H $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file mainline_ue_trap.H
+/// @brief Subroutines for the MBS Memory Scrub/Read Error Count registers (MBSEC*Q)
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_READ_ERROR_COUNT_REGS_H_
+#define _MSS_READ_ERROR_COUNT_REGS_H_
+
+#include <fapi2.H>
+#include <lib/mcbist/address.H>
+#include <lib/utils/scom.H>
+#include <lib/utils/find.H>
+#include <lib/ecc/ecc_traits.H>
+
+namespace mss
+{
+
+namespace ecc
+{
+
+namespace read_error_count_reg0
+{
+
+///
+/// @brief Read MBS Memory Scrub/Read Error Count Register 0 (MBSEC0Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::READ_ERROR_COUNT_REG0, o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Memory Scrub/Read Error Count Register 0 (MBSEC0Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::READ_ERROR_COUNT_REG0, i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_intermittent_ce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_CE_COUNT: Intermittent CE Count This is a 12-bit count of
+/// @note intermittent CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_intermittent_ce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::INTERMITTENT_CE_COUNT, TT::INTERMITTENT_CE_COUNT_LEN>(i_value);
+    FAPI_INF("set_intermittent_ce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_intermittent_ce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_CE_COUNT: Intermittent CE Count This is a 12-bit count of
+/// @note intermittent CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_intermittent_ce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::INTERMITTENT_CE_COUNT, TT::INTERMITTENT_CE_COUNT_LEN>(o_value);
+    FAPI_INF("get_intermittent_ce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_soft_ce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_SOFT_CE_COUNT: Soft CE Count This is a 12-bit count of
+/// @note soft CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_soft_ce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SOFT_CE_COUNT, TT::SOFT_CE_COUNT_LEN>(i_value);
+    FAPI_INF("set_soft_ce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_soft_ce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_SOFT_CE_COUNT: Soft CE Count This is a 12-bit count of
+/// @note soft CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_soft_ce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SOFT_CE_COUNT, TT::SOFT_CE_COUNT_LEN>(o_value);
+    FAPI_INF("get_soft_ce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_hard_ce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_HARD_CE_COUNT: Hard CE Count This is a 12-bit count of
+/// @note hard CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_hard_ce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::HARD_CE_COUNT, TT::HARD_CE_COUNT_LEN>(i_value);
+    FAPI_INF("set_hard_ce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_hard_ce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_HARD_CE_COUNT: Hard CE Count This is a 12-bit count of
+/// @note hard CE events. Will freeze its value upon incrementing to the max
+/// @note value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_hard_ce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::HARD_CE_COUNT, TT::HARD_CE_COUNT_LEN>(o_value);
+    FAPI_INF("get_hard_ce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_intermittent_mce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_MCE_COUNT: Intermittent MCE Count This is a 12-bit count of
+/// @note intermittent Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_intermittent_mce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::INTERMITTENT_MCE_COUNT, TT::INTERMITTENT_MCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_intermittent_mce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_intermittent_mce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_INTERMITTENT_MCE_COUNT: Intermittent MCE Count This is a 12-bit count of
+/// @note intermittent Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_intermittent_mce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::INTERMITTENT_MCE_COUNT, TT::INTERMITTENT_MCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_intermittent_mce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_soft_mce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_SOFT_MCE_COUNT: Soft MCE Count This is a 12-bit count of
+/// @note soft Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_soft_mce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SOFT_MCE_COUNT, TT::SOFT_MCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_soft_mce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_soft_mce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_SOFT_MCE_COUNT: Soft MCE Count This is a 12-bit count of
+/// @note soft Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_soft_mce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SOFT_MCE_COUNT, TT::SOFT_MCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_soft_mce_count: 0x%03lx", o_value);
+}
+
+} // close namespace read_error_count_reg0
+
+namespace read_error_count_reg1
+{
+
+///
+/// @brief Read MBS Memory Scrub/Read Error Count Register 1 (MBSEC1Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::READ_ERROR_COUNT_REG1, o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Memory Scrub/Read Error Count Register 1 (MBSEC1Q)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::READ_ERROR_COUNT_REG1, i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_hard_mce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_HARD_MCE_COUNT: Hard MCE Count This is a 12-bit count of
+/// @note hard Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_hard_mce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::HARD_MCE_COUNT, TT::HARD_MCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_hard_mce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_hard_mce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_HARD_MCE_COUNT: Hard MCE Count This is a 12-bit count of
+/// @note hard Marked Chip Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_hard_mce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::HARD_MCE_COUNT, TT::HARD_MCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_hard_mce_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_ice_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_ICE_COUNT: ICE (IMPE) Count This is a 12-bit count of
+/// @note Intermittent Marked-Placed Chip Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_ice_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::ICE_COUNT, TT::ICE_COUNT_LEN>(i_value);
+    FAPI_INF("set_ice_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_ice_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_ICE_COUNT: ICE (IMPE) Count This is a 12-bit count of
+/// @note Intermittent Marked-Placed Chip Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_ice_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::ICE_COUNT, TT::ICE_COUNT_LEN>(o_value);
+    FAPI_INF("get_ice_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_ue_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_UE_COUNT: UE Count This is a 12-bit count of
+/// @note Uncorrectable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_ue_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::UE_COUNT, TT::UE_COUNT_LEN>(i_value);
+    FAPI_INF("set_ue_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_ue_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_UE_COUNT: UE Count This is a 12-bit count of
+/// @note Uncorrectable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_ue_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::UE_COUNT, TT::UE_COUNT_LEN>(o_value);
+    FAPI_INF("get_ue_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_aue_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_AUE_COUNT: AUE Count This is a 12-bit count of
+/// @note AUE Parity Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_aue_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::AUE_COUNT, TT::AUE_COUNT_LEN>(i_value);
+    FAPI_INF("set_aue_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_aue_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_AUE_COUNT: AUE Count This is a 12-bit count of
+/// @note AUE Parity Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_aue_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::AUE_COUNT, TT::AUE_COUNT_LEN>(o_value);
+    FAPI_INF("get_aue_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_rce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSEC0Q_RCE_COUNT: RCE Count This is a 12-bit count of
+/// @note Retried Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_rce_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::RCE_COUNT, TT::RCE_COUNT_LEN>(i_value);
+    FAPI_INF("set_rce_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_rce_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSEC0Q_RCE_COUNT: RCE Count This is a 12-bit count of
+/// @note Retried Correctable Error events. Will freeze its value upon
+/// @note incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_rce_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::RCE_COUNT, TT::RCE_COUNT_LEN>(o_value);
+    FAPI_INF("get_rce_count: 0x%03lx", o_value);
+}
+
+} // close namespace read_error_count_reg1
+
+namespace mark_symbol_count_reg
+{
+
+///
+/// @brief Read MBS Mark Symbol Error Count Register (MBSMSECQ)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode read( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::MARK_SYMBOL_COUNT_REG, o_data) );
+    FAPI_INF("read: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Write MBS Mark Symbol Error Count Register (MBSMSECQ)
+/// @tparam T fapi2 Target Type - derived from i_target's type
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_target the fapi2 target of the mcbist
+/// @param[in] i_data the value to write to the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T, typename TT = eccTraits<T> >
+inline fapi2::ReturnCode write( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_TRY( mss::putScom(i_target, TT::MARK_SYMBOL_COUNT_REG, i_data) );
+    FAPI_INF("write: 0x%016lx", i_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief set_symbol0_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL0_COUNT: MCE Symbol 0 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 0 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_symbol0_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL0_COUNT, TT::SYMBOL0_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol0_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol0_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL0_COUNT: MCE Symbol 0 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 0 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_symbol0_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL0_COUNT, TT::SYMBOL0_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol0_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_symbol1_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL1_COUNT: MCE Symbol 1 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 1 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_symbol1_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL1_COUNT, TT::SYMBOL1_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol1_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol1_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL1_COUNT: MCE Symbol 1 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 1 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_symbol1_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL1_COUNT, TT::SYMBOL1_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol1_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_symbol2_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL2_COUNT: MCE Symbol 2 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 2 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_symbol2_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL2_COUNT, TT::SYMBOL2_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol2_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol2_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL2_COUNT: MCE Symbol 2 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 2 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_symbol2_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL2_COUNT, TT::SYMBOL2_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol2_count: 0x%03lx", o_value);
+}
+
+///
+/// @brief set_symbol3_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in, out] io_data the register value
+/// @param[in] i_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL3_COUNT: MCE Symbol 3 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 3 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void set_symbol3_count( fapi2::buffer<uint64_t>& io_data, const uint64_t i_value )
+{
+    io_data.insertFromRight<TT::SYMBOL3_COUNT, TT::SYMBOL3_COUNT_LEN>(i_value);
+    FAPI_INF("set_symbol3_count: 0x%03lx", i_value);
+}
+
+///
+/// @brief get_symbol3_count
+/// @tparam T fapi2 Target Type defaults to TARGET_TYPE_MCBIST
+/// @tparam TT traits type defaults to eccTraits<T>
+/// @param[in] i_data the register value
+/// @param[out] o_value the value of the field
+/// @note MBSMSECQ_MCE_SYMBOL3_COUNT: MCE Symbol 3 Error Count This is a 8-bit count
+/// @note that increments on MCE when Symbol 3 under chip mark takes error. Will freeze
+/// @note its value upon incrementing to the max value until reset.
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCBIST, typename TT = eccTraits<T> >
+inline void get_symbol3_count( const fapi2::buffer<uint64_t>& i_data, uint64_t& o_value )
+{
+    i_data.extractToRight<TT::SYMBOL3_COUNT, TT::SYMBOL3_COUNT_LEN>(o_value);
+    FAPI_INF("get_symbol3_count: 0x%03lx", o_value);
+}
+
+} // close namespace mark_symbol_count_reg
+
+} // close namespace ecc
+
+} // close namespace mss
+
+#endif