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authorLouis Stermole <stermole@us.ibm.com>2017-08-04 06:23:29 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-08-18 10:48:45 -0400
commita0d6c00c82cf471816e2481fd2e7cd6a3a782d71 (patch)
tree3211d577c4b01b8a7505b94755fa6b5db6f0fdf8 /src/import/chips
parent1f3c9fdcb8758d6c43693feab4364c698f09bb50 (diff)
downloadtalos-hostboot-a0d6c00c82cf471816e2481fd2e7cd6a3a782d71.tar.gz
talos-hostboot-a0d6c00c82cf471816e2481fd2e7cd6a3a782d71.zip
Improve description of ATTR_EFF_RANK_GROUP_OVERRIDE
Change-Id: I785e36646c6563037e0305e392c42a9541eb71eb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44211 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44213 Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H51
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml18
2 files changed, 52 insertions, 17 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 1a4af3bd4..22d8f6d24 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -16996,10 +16996,19 @@ fapi_try_exit:
/// @param[out] ref to the value uint16_t
/// @note Generated by gen_accessors.pl generateParameters (F)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Override PHY RANK_PAIR settings. First uint16 value is for RANK_PAIR0 register
-/// value, and second is for RANK_PAIR1. Note that DIMM1 ranks in a dual-drop config
-/// will be converted from Centaur canonical number (4,5) to correct PHY settings
-/// (2,3). Set this attribute to zero to use default
+/// @note Override PHY rank group settings. The two uint16 values map to rank
+/// group0/1(Pri/Sec ranks) for unt16[X][0] and rank group2/3(Pri/Sec ranks) for
+/// uint16[X][1]. Bits map as follows: uint16[X][0]: (0:2)=RP0_primary,
+/// (3)=RP0_primary_valid, (4:6)=RP0_secondary, (7)=RP0_secondary_valid,
+/// (8:10)=RP1_primary, (11)=RP1_primary_valid, (12:14)=RP1_secondary,
+/// (15)=RP1_secondary_valid, uint16[X][1]: (0:2)=RP2_primary,
+/// (3)=RP2_primary_valid, (4:6)=RP2_secondary, (7)=RP2_secondary_valid,
+/// (8:10)=RP3_primary, (11)=RP3_primary_valid, (12:14)=RP3_secondary,
+/// (15)=RP3_secondary_valid. Note: that the DIMM1 ranks in a dual-drop config are
+/// stored in the attribute as the centaur canonical number (4,5). The code will
+/// automatically do the conversion from the Centaur canonical to the correct PHY
+/// nomenclature (2,3 for 4,5 respectively). Set this attribute to zero to use
+/// default
/// settings.
///
inline fapi2::ReturnCode eff_rank_group_override(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
@@ -17025,10 +17034,19 @@ fapi_try_exit:
/// @param[out] uint16_t* memory to store the value
/// @note Generated by gen_accessors.pl generateParameters (G)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Override PHY RANK_PAIR settings. First uint16 value is for RANK_PAIR0 register
-/// value, and second is for RANK_PAIR1. Note that DIMM1 ranks in a dual-drop config
-/// will be converted from Centaur canonical number (4,5) to correct PHY settings
-/// (2,3). Set this attribute to zero to use default
+/// @note Override PHY rank group settings. The two uint16 values map to rank
+/// group0/1(Pri/Sec ranks) for unt16[X][0] and rank group2/3(Pri/Sec ranks) for
+/// uint16[X][1]. Bits map as follows: uint16[X][0]: (0:2)=RP0_primary,
+/// (3)=RP0_primary_valid, (4:6)=RP0_secondary, (7)=RP0_secondary_valid,
+/// (8:10)=RP1_primary, (11)=RP1_primary_valid, (12:14)=RP1_secondary,
+/// (15)=RP1_secondary_valid, uint16[X][1]: (0:2)=RP2_primary,
+/// (3)=RP2_primary_valid, (4:6)=RP2_secondary, (7)=RP2_secondary_valid,
+/// (8:10)=RP3_primary, (11)=RP3_primary_valid, (12:14)=RP3_secondary,
+/// (15)=RP3_secondary_valid. Note: that the DIMM1 ranks in a dual-drop config are
+/// stored in the attribute as the centaur canonical number (4,5). The code will
+/// automatically do the conversion from the Centaur canonical to the correct PHY
+/// nomenclature (2,3 for 4,5 respectively). Set this attribute to zero to use
+/// default
/// settings.
///
inline fapi2::ReturnCode eff_rank_group_override(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
@@ -17059,10 +17077,19 @@ fapi_try_exit:
/// @param[out] uint16_t* memory to store the value
/// @note Generated by gen_accessors.pl generateParameters (H)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Override PHY RANK_PAIR settings. First uint16 value is for RANK_PAIR0 register
-/// value, and second is for RANK_PAIR1. Note that DIMM1 ranks in a dual-drop config
-/// will be converted from Centaur canonical number (4,5) to correct PHY settings
-/// (2,3). Set this attribute to zero to use default
+/// @note Override PHY rank group settings. The two uint16 values map to rank
+/// group0/1(Pri/Sec ranks) for unt16[X][0] and rank group2/3(Pri/Sec ranks) for
+/// uint16[X][1]. Bits map as follows: uint16[X][0]: (0:2)=RP0_primary,
+/// (3)=RP0_primary_valid, (4:6)=RP0_secondary, (7)=RP0_secondary_valid,
+/// (8:10)=RP1_primary, (11)=RP1_primary_valid, (12:14)=RP1_secondary,
+/// (15)=RP1_secondary_valid, uint16[X][1]: (0:2)=RP2_primary,
+/// (3)=RP2_primary_valid, (4:6)=RP2_secondary, (7)=RP2_secondary_valid,
+/// (8:10)=RP3_primary, (11)=RP3_primary_valid, (12:14)=RP3_secondary,
+/// (15)=RP3_secondary_valid. Note: that the DIMM1 ranks in a dual-drop config are
+/// stored in the attribute as the centaur canonical number (4,5). The code will
+/// automatically do the conversion from the Centaur canonical to the correct PHY
+/// nomenclature (2,3 for 4,5 respectively). Set this attribute to zero to use
+/// default
/// settings.
///
inline fapi2::ReturnCode eff_rank_group_override(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index 400cf8516..95790c137 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -3162,11 +3162,19 @@
<id>ATTR_EFF_RANK_GROUP_OVERRIDE</id>
<targetType>TARGET_TYPE_MCS</targetType>
<description>
- Override PHY RANK_PAIR settings. First uint16 value is for RANK_PAIR0
- register value, and second is for RANK_PAIR1. Note that DIMM1 ranks in
- a dual-drop config will be converted from Centaur canonical number
- (4,5) to correct PHY settings (2,3). Set this attribute to zero
- to use default settings.
+ Override PHY rank group settings. The two uint16 values map to rank
+ group0/1(Pri/Sec ranks) for unt16[X][0] and rank group2/3(Pri/Sec ranks)
+ for uint16[X][1]. Bits map as follows: uint16[X][0]: (0:2)=RP0_primary,
+ (3)=RP0_primary_valid, (4:6)=RP0_secondary, (7)=RP0_secondary_valid,
+ (8:10)=RP1_primary, (11)=RP1_primary_valid, (12:14)=RP1_secondary,
+ (15)=RP1_secondary_valid, uint16[X][1]: (0:2)=RP2_primary,
+ (3)=RP2_primary_valid, (4:6)=RP2_secondary, (7)=RP2_secondary_valid,
+ (8:10)=RP3_primary, (11)=RP3_primary_valid, (12:14)=RP3_secondary,
+ (15)=RP3_secondary_valid. Note: that the DIMM1 ranks in a dual-drop
+ config are stored in the attribute as the centaur canonical number (4,5).
+ The code will automatically do the conversion from the Centaur canonical
+ to the correct PHY nomenclature (2,3 for 4,5 respectively). Set this
+ attribute to zero to use default settings.
</description>
<initToZero></initToZero>
<valueType>uint16</valueType>
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