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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-10-31 11:17:26 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-12-14 13:51:40 -0500 |
| commit | 993eec11fc9f67eb6b75ca1ed876eea03d031d61 (patch) | |
| tree | 52aa06e3979bb9bce9c2f193786b2b7eb0a916e6 /src/import/chips | |
| parent | 8299008e6196e12e1c3d5adaab9edd535e1410e5 (diff) | |
| download | talos-hostboot-993eec11fc9f67eb6b75ca1ed876eea03d031d61.tar.gz talos-hostboot-993eec11fc9f67eb6b75ca1ed876eea03d031d61.zip | |
SCOM Restore: Increased the EQ SCOM restore limit.
Commit increases the SCOM restore limit from 16 to 31.
HW-Image-Prereq: I781b0862dc983001574ba5f09a84ea0a2f7f781f
HW-ImageBuild-Prereq: I43e7e067b59513db1c99ce913009a9a3ef5de90b
CQ:HW423686
Change-Id: Ied6c919ff88870cd71319854a2b6aebbcc591af1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49055
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49059
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H index 4f5ab5dee..23d9e691b 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H @@ -267,7 +267,22 @@ HCD_CONST(QUAD_SCOM_RESTORE_HOMER_OFFSET, HCD_CONST(MAX_L2_SCOM_ENTRIES, 16) HCD_CONST(MAX_L3_SCOM_ENTRIES, 16) -HCD_CONST(MAX_EQ_SCOM_ENTRIES, 15) + +//HW423686 +//Inorder to continue IMA after STOP11 on all four cores of a quad, 2 +//EQ SCOM registers need to restored per core. STOP API desgin allowed +//only 15 SCOM restore entries per EQ. Out of total budget, 12 are +//consumed during IPL. Hence it was not possible to manage IMA within +//this limit. As a resolution, limit for EQ SCOM restore entries has +//been changed to 31. Below is the break down for EQ SCOM Restore +//Entries + +// Power Management 12 +// Core IMA 08 +// PRD FIR Mask 05 +// Reserve 06 + +HCD_CONST(MAX_EQ_SCOM_ENTRIES, 31) HCD_CONST(QUAD_SCOM_RESTORE_REGS_PER_QUAD, (MAX_EQ_SCOM_ENTRIES + MAX_L2_SCOM_ENTRIES + MAX_L3_SCOM_ENTRIES + 1)) |
