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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-06-01 18:36:08 +0200 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-08-20 10:08:58 -0400 |
| commit | 928018cc8769d2672a57b26de7f73f40a51fc80f (patch) | |
| tree | cbe2dec1fb03a67e0a52fc3cac5dfd3c6ea4e9f5 /src/import/chips | |
| parent | a22761c15dad50a1e3e9531dc210ba58dce563b0 (diff) | |
| download | talos-hostboot-928018cc8769d2672a57b26de7f73f40a51fc80f.tar.gz talos-hostboot-928018cc8769d2672a57b26de7f73f40a51fc80f.zip | |
p9_sbe_npll_setup: Level 3
Change-Id: I5b59ba870ead60a14148ef8cea6ade310835a03c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41254
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44878
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml index e099b6a51..2eb13e789 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml @@ -44,6 +44,20 @@ <targetType>TARGET_TYPE_PROC_CHIP</targetType> </collectRegisterFfdc> <ffdc>SS_PLL_READ</ffdc> + <callout> + <target>MASTER_CHIP</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>MASTER_CHIP</target> + </deconfigure> + <gard> + <target>MASTER_CHIP</target> + </gard> </hwpError> <!-- ******************************************************************** --> <hwpError> @@ -61,6 +75,20 @@ <targetType>TARGET_TYPE_PROC_CHIP</targetType> </collectRegisterFfdc> <ffdc>CP_FILTER_PLL_READ</ffdc> + <callout> + <target>MASTER_CHIP</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>MASTER_CHIP</target> + </deconfigure> + <gard> + <target>MASTER_CHIP</target> + </gard> </hwpError> <!-- ******************************************************************** --> <hwpError> @@ -81,6 +109,20 @@ <ffdc>SS_FILTER_BYPASS_STATUS</ffdc> <ffdc>CP_FILTER_BYPASS_STATUS</ffdc> <ffdc>IO_FILTER_BYPASS_STATUS</ffdc> + <callout> + <target>MASTER_CHIP</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>MASTER_CHIP</target> + </deconfigure> + <gard> + <target>MASTER_CHIP</target> + </gard> </hwpError> <!-- ******************************************************************** --> <hwpError> @@ -98,6 +140,20 @@ <targetType>TARGET_TYPE_PROC_CHIP</targetType> </collectRegisterFfdc> <ffdc>IO_FILTER_PLL_READ</ffdc> + <callout> + <target>MASTER_CHIP</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>MASTER_CHIP</target> + </deconfigure> + <gard> + <target>MASTER_CHIP</target> + </gard> </hwpError> <!-- ******************************************************************** --> </hwpErrors> |
