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author | Ashish <ashish.more@in.ibm.com> | 2016-08-24 07:23:04 -0400 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-22 22:42:03 -0400 |
commit | 9209c26d4c4aae2655b24f298acdcfc2a5d09d0c (patch) | |
tree | 85a66a3e613a46b4b7ab909cfa9211afca7a39f0 /src/import/chips | |
parent | 8edc404a1808e4bb72ed12dcdae54653351be2f5 (diff) | |
download | talos-hostboot-9209c26d4c4aae2655b24f298acdcfc2a5d09d0c.tar.gz talos-hostboot-9209c26d4c4aae2655b24f298acdcfc2a5d09d0c.zip |
PPE command line control
Change-Id: I467470a2a8832dc1ada7568cd3773ee53d61cbe9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28719
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42285
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H | 150 |
1 files changed, 150 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H new file mode 100644 index 000000000..c11b3bb1d --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H @@ -0,0 +1,150 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file p9_ppe_utils.H +/// @brief PPE commonly used functions +/// +/// *HWP HW Owner : Ashish More <ashish.more.@in.ibm.com> +/// *HWP HW Backup Owner : Brian Vanderpool <vanderp@us.ibm.com> +/// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com> +/// *HWP Team : PM +/// *HWP Level : 2 +/// *HWP Consumed by : CMEs, GPEs, SBE, Cronus + +#ifndef __P9_PPE_UTILS_H__ +#define __P9_PPE_UTILS_H__ +typedef struct +{ + uint16_t number; + std::string name; +} PPEReg_t; + +typedef struct +{ + PPEReg_t reg; + uint32_t value; +} PPERegValue_t; + +typedef struct +{ + PPEReg_t reg; + uint64_t value; +} SCOMRegValue_t; + +/** + * @brief Offsets from base address for XIRs. + */ +const static uint64_t PPE_XIXCR = 0x0; +const static uint64_t PPE_XIRAMRA = 0x1; +const static uint64_t PPE_XIRAMGA = 0x2; +const static uint64_t PPE_XIRAMDBG = 0x3; +const static uint64_t PPE_XIRAMEDR = 0x4; +const static uint64_t PPE_XIDBGPRO = 0x5; + +enum PPE_DUMP_MODE +{ + XIRS = 0x0, + SNAPSHOT = 0x1, + HALT = 0x2, + FORCE_HALT = 0x3 +}; +enum VERBOSE_MODE +{ + NOVERBOSE = 0x0, + VERBOSE = 0x1, + VERBOSEP = 0x2, +}; + +enum INT_VEC_OFFSET +{ + MCHK_VEC = 0x000 , // 0, + SRST_VEC = 0x040 , // 64, + DSI_VEC = 0x060 , // 96, + ISI_VEC = 0x080 , // 128, + EXT_VEC = 0x0A0 , // 160, + ALIG_VEC = 0x0C0 , // 192, + PRG_VEC = 0x0E0 , // 224, + DEC_VEC = 0x100 , // 256, + FIT_VEC = 0x120 , // 288, + WDT_VEC = 0x140 , // 320, +} ; +enum PPE_XIRS +{ + XIR_XSR, + XIR_IAR, + XIR_IR, + XIR_EDR, + XIR_SPRG0, +}; + +enum PPE_SPECIAL_ACCESS +{ + MSR, + CR, +}; +enum PPE_SPRS +{ + CTR = 9, + DACR = 316, + DBCR = 308, + DEC = 22, + IVPR = 63, + ISR = 62, + LR = 8, + PIR = 286, + PVR = 287, + SPRG0 = 272, + SRR0 = 26, + SRR1 = 27, + TCR = 340, + TSR = 336, + XER = 1, //336, +}; + + +// Note: EDR is available via XIR +enum PPE_GPRS +{ + R0 = 0, + R1 = 1, + R2 = 2, + R3 = 3, + R4 = 4, + R5 = 5, + R6 = 6, + R7 = 7, + R8 = 8, + R9 = 9, + R10 = 10, + R13 = 13, + R28 = 28, + R29 = 29, + R30 = 30, + R31 = 31, +}; + + +#endif // __P9_PPE_UTILS_H__ |