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| author | David Kauer <dmkauer@us.ibm.com> | 2017-08-02 12:37:03 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-04 10:48:03 -0400 |
| commit | 82038243dba1ea3fbabeb802404862ea4a01fcf2 (patch) | |
| tree | 7fa93c24e10368f8ea2b8adbff3c1a7f42a29e6d /src/import/chips | |
| parent | 5ae6ec0928bbd5d5a8cb8e3949f4b0809cc911e9 (diff) | |
| download | talos-hostboot-82038243dba1ea3fbabeb802404862ea4a01fcf2.tar.gz talos-hostboot-82038243dba1ea3fbabeb802404862ea4a01fcf2.zip | |
Configuration added to use offset 0x880 (HW queue) for EQ trigger from IPI
Change-Id: I744cfd0abc7f9db6ec5b3c2ed3f4026ecdb624a0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44112
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: DAVID M. KAUER <dmkauer@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44177
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C index 16f64e199..b2f1f44a6 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_int_scom.C @@ -45,6 +45,7 @@ constexpr uint64_t literal_0x0008002000002002 = 0x0008002000002002; constexpr uint64_t literal_0xEF6417D2DE7DD3FD = 0xEF6417D2DE7DD3FD; constexpr uint64_t literal_0x0002000410000000 = 0x0002000410000000; constexpr uint64_t literal_0x7710CCC3E0000701 = 0x7710CCC3E0000701; +constexpr uint64_t literal_0x5BBF = 0x5BBF; constexpr uint64_t literal_0x00001003000002 = 0x00001003000002; constexpr uint64_t literal_0xFFFFEFFCFFFFFC = 0xFFFFEFFCFFFFFC; constexpr uint64_t literal_0x0003C018006 = 0x0003C018006; @@ -216,6 +217,12 @@ fapi2::ReturnCode p9_int_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& } } { + FAPI_TRY(fapi2::getScom( TGT0, 0x5013214ull, l_scom_buffer )); + + l_scom_buffer.insert<16, 16, 48, uint64_t>(literal_0x5BBF ); + FAPI_TRY(fapi2::putScom(TGT0, 0x5013214ull, l_scom_buffer)); + } + { if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) { FAPI_TRY(fapi2::getScom( TGT0, 0x501322dull, l_scom_buffer )); |
