Clean up RC0E in mss::eff_dimm

Change-Id: Ib014db49f0228c82d9c27f53101f055c672c61aa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37270
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37274
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 35 insertions, 26 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
index 8aae26872..26d9733cb 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
@@ -56,7 +56,6 @@ using fapi2::TARGET_TYPE_DIMM;
 using fapi2::TARGET_TYPE_MCS;
 using fapi2::TARGET_TYPE_MCA;
 using fapi2::TARGET_TYPE_MCBIST;
-
 ///
 /// @brief bit encodings for Frequencies RC08
 /// @note valid frequency values for Nimbus systems
@@ -113,6 +112,22 @@ enum rc0d_encode : uint8_t
 };
 
 ///
+/// @brief bit encodings for RC0E
+/// From DDR4 Register v1.0
+///
+enum rc0e_encode : uint64_t
+{
+    RC0E_PARITY_ENABLE_BIT = 7,
+    RC0E_PARITY_ENABLE = 1,
+
+    RC0E_ALERT_N_ASSERT_BIT = 5,
+    RC0E_ALERT_N_ASERT_PULSE = 1,
+
+    RC0E_ALERT_N_REENABLE_BIT = 4,
+    RC0E_ALERT_N_REENABLE_TRUE = 1,
+};
+
+///
 /// @brief bit encodings for RC3x - Fine Granularity RDIMM Operating Speed
 /// @note Only limited encodings here, more available
 /// From DDR4 Register v1.0
@@ -1393,11 +1408,22 @@ fapi2::ReturnCode eff_dimm::dimm_rc0e()
 {
     // Retrieve MCS attribute data
     uint8_t l_attrs_dimm_rc0e[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+    uint8_t l_sim = 0;
+    fapi2::buffer<uint8_t> l_rc0e;
+
+    FAPI_TRY( mss::is_simulation (l_sim) );
     FAPI_TRY( eff_dimm_ddr4_rc0e(iv_mcs, &l_attrs_dimm_rc0e[0][0]) );
 
-    // Update MCS attribute
-    l_attrs_dimm_rc0e[iv_port_index][iv_dimm_index] = iv_pDecoder->iv_raw_card.iv_rc0e;
+    // Values are the same for all DIMMs
+    // Moved to eff_config instead of raw card data because it's cleaner here
+    if (!l_sim)
+    {
+        l_rc0e.writeBit<RC0E_PARITY_ENABLE_BIT>(RC0E_PARITY_ENABLE);
+        l_rc0e.writeBit<RC0E_ALERT_N_ASSERT_BIT>(RC0E_ALERT_N_ASERT_PULSE);
+        l_rc0e.writeBit<RC0E_ALERT_N_REENABLE_BIT>(RC0E_ALERT_N_REENABLE_TRUE);
+    }
 
+    l_attrs_dimm_rc0e[iv_port_index][iv_dimm_index] = l_rc0e;
     FAPI_INF( "%s: RC0E setting: 0x%0x", mss::c_str(iv_dimm), l_attrs_dimm_rc0e[iv_port_index][iv_dimm_index] );
     FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC0E, iv_mcs, l_attrs_dimm_rc0e) );
 
@@ -2100,7 +2126,6 @@ fapi_try_exit:
 ///
 fapi2::ReturnCode eff_dimm::ca_parity_latency()
 {
-    // TODO: RTC 159554 Update RAS related attributes
     std::vector<uint8_t> l_attrs_ca_parity_latency(PORTS_PER_MCS, 0);
 
     FAPI_TRY( eff_ca_parity_latency(iv_mcs, l_attrs_ca_parity_latency.data()) );
@@ -2119,7 +2144,6 @@ fapi_try_exit:
 ///
 fapi2::ReturnCode eff_dimm::crc_error_clear()
 {
-    // TODO: RTC 159554 Update RAS related attributes
     std::vector<uint8_t> l_attrs_crc_error_clear(PORTS_PER_MCS, 0);
 
     FAPI_TRY( eff_crc_error_clear(iv_mcs, l_attrs_crc_error_clear.data()) );
@@ -2140,7 +2164,6 @@ fapi_try_exit:
 ///
 fapi2::ReturnCode eff_dimm::ca_parity_error_status()
 {
-    // TODO: RTC 159554 Update RAS related attributes
     std::vector<uint8_t> l_attrs_ca_parity_error_status(PORTS_PER_MCS, 0);
 
     FAPI_TRY( eff_ca_parity_error_status(iv_mcs, l_attrs_ca_parity_error_status.data()) );
@@ -2161,7 +2184,6 @@ fapi_try_exit:
 ///
 fapi2::ReturnCode eff_dimm::ca_parity()
 {
-    // TODO: RTC 159554 Update RAS related attributes
     std::vector<uint8_t> l_attrs_ca_parity(PORTS_PER_MCS, 0);
 
     FAPI_TRY( eff_ca_parity(iv_mcs, l_attrs_ca_parity.data()) );
@@ -2189,14 +2211,14 @@ fapi2::ReturnCode eff_dimm::odt_input_buffer()
     // Targets
 
     // keep simulation to values we know work
-    uint8_t is_sim = 0;
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), is_sim) );
+    uint8_t l_sim = 0;
+    FAPI_TRY( mss::is_simulation(l_sim) );
 
 
     FAPI_TRY( eff_odt_input_buff(iv_mcs, l_attrs_odt_input_buffer.data()) );
 
     // sim vs actual hardware value
-    l_attrs_odt_input_buffer[iv_port_index] = is_sim ? SIM_VALUE : fapi2::ENUM_ATTR_EFF_ODT_INPUT_BUFF_ACTIVATED;
+    l_attrs_odt_input_buffer[iv_port_index] = l_sim ? SIM_VALUE : fapi2::ENUM_ATTR_EFF_ODT_INPUT_BUFF_ACTIVATED;
 
     FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_ODT_INPUT_BUFF,
                             iv_mcs,
@@ -2498,13 +2520,13 @@ fapi2::ReturnCode eff_dimm::crc_wr_latency()
     std::vector<uint8_t> l_attrs_crc_wr_latency(PORTS_PER_MCS, 0);
 
     // keep simulation to values we know work
-    uint8_t is_sim = 0;
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), is_sim) );
+    uint8_t l_sim = 0;
+    FAPI_TRY( mss::is_simulation(l_sim) );
 
     FAPI_TRY( eff_crc_wr_latency(iv_mcs, l_attrs_crc_wr_latency.data()) );
 
     // keep simulation to values we know work
-    if(is_sim)
+    if(l_sim)
     {
         l_attrs_crc_wr_latency[iv_port_index] = 0x05;
     }
@@ -2650,7 +2672,6 @@ fapi_try_exit:
 ///
 fapi2::ReturnCode eff_dimm::write_crc()
 {
-    // TODO: RTC 159554 Update RAS related attributes
     std::vector<uint8_t> l_attrs_write_crc(PORTS_PER_MCS, 0);
 
     uint8_t l_mrw = 0;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/rcw_settings.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/rcw_settings.H
index 3eec7a4c7..a95e485d0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/rcw_settings.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/rcw_settings.H
@@ -57,7 +57,6 @@ struct rcw_settings
     uint64_t iv_rc09;
     uint64_t iv_rc0b;
     uint64_t iv_rc0c;
-    uint64_t iv_rc0e;
     uint64_t iv_rc0f;
     uint64_t iv_rc1x;
     uint64_t iv_rc2x;
@@ -105,7 +104,6 @@ struct rcw_settings
     /// @param[in] i_rc09 setting for register control word (RC09)
     /// @param[in] i_rc0b setting for register control word (RC0B)
     /// @param[in] i_rc0c setting for register control word (RC0C)
-    /// @param[in] i_rc0e setting for register control word (RC0E)
     /// @param[in] i_rc0f setting for register control word (RC0F)
     /// @param[in] i_rc1x setting for register control word (RC1X)
     /// @param[in] i_rc2x setting for register control word (RC2X)
@@ -124,7 +122,6 @@ struct rcw_settings
                             const uint64_t i_rc09,
                             const uint64_t i_rc0b,
                             const uint64_t i_rc0c,
-                            const uint64_t i_rc0e,
                             const uint64_t i_rc0f,
                             const uint64_t i_rc1x,
                             const uint64_t i_rc2x,
@@ -142,7 +139,6 @@ struct rcw_settings
           iv_rc09(i_rc09),
           iv_rc0b(i_rc0b),
           iv_rc0c(i_rc0c),
-          iv_rc0e(i_rc0e),
           iv_rc0f(i_rc0f),
           iv_rc1x(i_rc1x),
           iv_rc2x(i_rc2x),
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_raw_cards.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_raw_cards.C
index ecbd64b64..9794bb4d6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_raw_cards.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_raw_cards.C
@@ -57,7 +57,6 @@ rcw_settings lrdimm_rc_b0( 0x00, // RC00
                            0x00, // RC09
                            0x0E, // RC0B
                            0x00, // RC0C
-                           0x00, // RC0E
                            0x00, // RC0F
                            0x00, // RC1X
                            0x00, // RC2X
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_raw_cards.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_raw_cards.C
index 30c05e4c7..bc49cab7e 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_raw_cards.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_raw_cards.C
@@ -56,7 +56,6 @@ rcw_settings rdimm_rc_c1( 0x00, // RC00
                           0x00, // RC09
                           0x0E, // RC0B
                           0x00, // RC0C
-                          0x0D, // RC0E
                           0x00, // RC0F
                           0x00, // RC1X
                           0x00, // RC2X
@@ -79,7 +78,6 @@ rcw_settings rdimm_rc_c2( 0x00, // RC00
                           0x00, // RC09
                           0x0E, // RC0B
                           0x00, // RC0C
-                          0x0D, // RC0E
                           0x00, // RC0F
                           0x00, // RC1X
                           0x00, // RC2X
@@ -101,7 +99,6 @@ rcw_settings  rdimm_rc_a1( 0x00, // RC00
                            0x00, // RC09
                            0x0E, // RC0B
                            0x00, // RC0C
-                           0x0D, // RC0E
                            0x00, // RC0F
                            0x00, // RC1X
                            0x00, // RC2X
@@ -124,7 +121,6 @@ rcw_settings rdimm_rc_b1( 0x00, // RC00
                           0x00, // RC09 //Should be set in eff_config for CKE power DOWN modep:q
                           0x0E, // RC0B
                           0x00, // RC0C
-                          0x0D, // RC0E
                           0x00, // RC0F
                           0x00, // RC1X
                           0x00, // RC2X
@@ -146,7 +142,6 @@ rcw_settings rdimm_rc_b2( 0x00, // RC00
                           0x00, // RC09
                           0x0E, // RC0B
                           0x00, // RC0C
-                          0x0D, // RC0E
                           0x00, // RC0F
                           0x00, // RC1X
                           0x00, // RC2X
@@ -168,7 +163,6 @@ rcw_settings rdimm_rc_custom ( 0x00, // RC00
                                0x00, // RC09
                                0x0E, // RC0B
                                0x00, // RC0C
-                               0x0D, // RC0E
                                0x00, // RC0F
                                0x00, // RC1X
                                0x00, // RC2X
@@ -190,7 +184,6 @@ rcw_settings rdimm_rc_vbu( 0x00, // RC00
                            0x00, // RC09
                            0x0E, // RC0B
                            0x00, // RC0C
-                           0x00, // RC0E
                            0x00, // RC0F
                            0x00, // RC1X
                            0x00, // RC2X