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author | Greg Still <stillgs@us.ibm.com> | 2015-11-11 09:24:59 -0600 |
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committer | Stephen Cprek <smcprek@us.ibm.com> | 2016-02-19 17:06:36 -0600 |
commit | 7d0fb3482217669c7bb7571c45a42105de3daf74 (patch) | |
tree | 3e46a8994e0e4225df8af23152cd90f3bda7b3dd /src/import/chips | |
parent | 3aea75fafe8b53705f7889f746601732be3a1e72 (diff) | |
download | talos-hostboot-7d0fb3482217669c7bb7571c45a42105de3daf74.tar.gz talos-hostboot-7d0fb3482217669c7bb7571c45a42105de3daf74.zip |
Power Management Platform and Frequency Attributes
- Focus on AVSBus and I2C VRM location attributes
- Reference clock attributes
- Initial frequency and voltage biasing attributes that will be used
by the Pstate Parameter Block code in time.
- Consolodate voltage attributes in on place
- Added PBAX topology attributes per OCC interlock
- Rebase
Change-Id: I3c6817b5240587aaa84d57a78443453ff140aaf7
RTC: 141323
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21953
Tested-by: Jenkins Server
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23906
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml new file mode 100644 index 000000000..ca8384837 --- /dev/null +++ b/src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml @@ -0,0 +1,47 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: chips/p9/procedures/xml/attribute_info/freq_attributes.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- EKB Project --> +<!-- --> +<!-- COPYRIGHT 2015 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- freq_attributes.xml --> +<attributes> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_PROC_REFCLOCK_KHZ</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of the processor refclock in kHz. + Provided by the Machine Readable Workbook. + This can be overridden to adjust the refclock frequency. + </description> + <valueType>uint32</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_FREQ_MEM_REFCLOCK</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + The frequency of the memory refclock in MHz. + Provided by the Machine Readable Workbook. + This is read by the set_ref_clock HWP to find out the desired frequency. + This can be overridden to adjust the refclock frequency. + </description> + <valueType>uint32</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> +</attributes> |