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| author | Amit Tendolkar <amit.tendolkar@in.ibm.com> | 2017-05-25 11:13:48 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-08-20 10:07:36 -0400 |
| commit | 59c0129d7fcbd4f1a48fd42ea892dbce59427471 (patch) | |
| tree | 3d24d203da201bf6185d92e900a5867750dfa403 /src/import/chips | |
| parent | adc65f80e81cfc22fdd21447cc397a92cb2d19bf (diff) | |
| download | talos-hostboot-59c0129d7fcbd4f1a48fd42ea892dbce59427471.tar.gz talos-hostboot-59c0129d7fcbd4f1a48fd42ea892dbce59427471.zip | |
Optimized PPE FFDC collection framework
Allows SBE to collect CME / SGPE FFDC for errors from p9_sbe_check_master_stop15
in istep16
Change-Id: I5d2b0775a3636800134e24a07edb5317d1f1c9c3
Original-Change-Id: Ie31336fae9d29e14dbb7995cd438b87ef615d4b6
RTC: 174610
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41375
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44875
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml index a2fb61971..db0847967 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml @@ -59,4 +59,29 @@ <ffdc>STOP_HISTORY</ffdc> </hwpError> <!-- ******************************************************************** --> + <hwpError> + <sbeError/> + <rc>RC_CHECK_MASTER_STOP15_FAILED</rc> + <description> + Indicates the targeted core(s) are no longer pending entering a STOP state + but the achieved level is not appropriate, or the deadman loop timed out. + </description> + <ffdc>SBE_CHK_MASTER_STOP15_RC</ffdc> + <ffdc>PU_OCB_OCI_OCCFLG__PU_OCB_OCI_CCSR</ffdc> + <ffdc>PU_OCB_OCI_QCSR__PU_OCB_OCI_QSSR</ffdc> + <ffdc>EQ_PPM_SSHSRC__EX_CME_SCOM_LFIR</ffdc> + <ffdc>EX_CME_SCOM_SICR_SCOM</ffdc> + <ffdc>EX_CME_LCL_SISR_SCOM</ffdc> + <ffdc>EQ_ATOMIC_LOCK_REG</ffdc> + <ffdc>C0_PPM_SSHSRC__C1_PPM_SSHSRC</ffdc> + <ffdc>SGPE_XSR__IAR</ffdc> + <ffdc>SGPE_IR__EDR</ffdc> + <ffdc>SGPE_LR__SPRG0</ffdc> + <ffdc>SGPE_SRR0__SRR1</ffdc> + <ffdc>CME_XSR__IAR</ffdc> + <ffdc>CME_IR__EDR</ffdc> + <ffdc>CME_LR__SPRG0</ffdc> + <ffdc>CME_SRR0__SRR1</ffdc> + </hwpError> + <!-- ******************************************************************** --> </hwpErrors> |
