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| author | Mark Pizzutillo <Mark.Pizzutillo@ibm.com> | 2019-04-05 17:29:38 -0400 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-05-07 15:49:43 -0500 |
| commit | 32bc3c06a9ba4b9b5037f09febff20b67ada278a (patch) | |
| tree | dfbba2a8de9fdf58bd12a0c98d6bff2081f0e454 /src/import/chips | |
| parent | 3498e76492e9b23271ed0a446d8ddedd32e70d0a (diff) | |
| download | talos-hostboot-32bc3c06a9ba4b9b5037f09febff20b67ada278a.tar.gz talos-hostboot-32bc3c06a9ba4b9b5037f09febff20b67ada278a.zip | |
Add API for axone p10 dimm rank
Change-Id: I92ceb8303371368064e0a958fa09846a689c7bd1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72725
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75501
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
3 files changed, 22 insertions, 24 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/dimm/exp_rank.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/dimm/exp_rank.H index 01f6c0fd1..8ffe98097 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/dimm/exp_rank.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/dimm/exp_rank.H @@ -23,17 +23,29 @@ /* */ /* IBM_PROLOG_END_TAG */ - #ifndef _MSS_EXP_RANK_H_ #define _MSS_EXP_RANK_H_ #include <fapi2.H> +#include <generic/memory/lib/utils/mss_rank.H> namespace mss { - namespace rank { + +/// +/// @brief Rank traits for explorer +/// +template <> +class rankTraits<mss::mc_type::EXPLORER> +{ + public: + static constexpr uint8_t MAX_DIMMS_PER_PORT = 2; + static constexpr uint8_t MAX_RANKS_PER_DIMM = 4; + static constexpr uint8_t RANK_INDEX_STEP = 4; +}; + /// /// @brief Return a vector of rank numbers which represent the primary rank pairs for this port or dimm /// @tparam T the target type @@ -51,13 +63,12 @@ inline fapi2::ReturnCode primary_ranks( const fapi2::Target<T>& i_target, std::v /// @brief Return the *port relative position* of the DIMM which posesses this rank /// @param[in] i_rank the rank number. /// @return the relative position of the DIMM which contains this rank. -///TODO: Need to implement this inline size_t get_dimm_from_rank(const uint64_t i_rank) { - return 0; + using TT = rankTraits<mss::mc_type::EXPLORER>; + return i_rank / TT::MAX_RANKS_PER_DIMM; } - } // namespace rank } // namespace mss #endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_defaults.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_defaults.H index 999e93425..42648c785 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_defaults.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_defaults.H @@ -25,7 +25,7 @@ /// /// @file exp_defaults.H -/// @brief default types associated with Nimbus system +/// @brief default types associated with Explorer system /// // *HWP HWP Owner: Andre A. Marin <aamarin@us.ibm.com> // *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com> @@ -33,14 +33,17 @@ // *HWP Level: 2 // *HWP Consumed by: CI -#ifndef _MSS_NIMBUS_DEFAULTS_H_ -#define _MSS_NIMBUS_DEFAULTS_H_ +#ifndef _MSS_EXPLORER_DEFAULTS_H_ +#define _MSS_EXPLORER_DEFAULTS_H_ +#include <fapi2.H> #include <generic/memory/lib/utils/shared/mss_generic_consts.H> namespace mss { +constexpr fapi2::TargetType DEFAULT_MEM_PORT_TARGET = fapi2::TARGET_TYPE_MEM_PORT; + constexpr mss::mc_type DEFAULT_MC_TYPE = mss::mc_type::EXPLORER; } // ns mss diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml index 4a1b6f51f..4f964f8ac 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml @@ -303,22 +303,6 @@ </hwpError> <hwpError> - <rc>RC_MSS_TOO_MANY_PRIMARY_RANKS_ON_DIMM</rc> - <description>There seem to be too many primary ranks seen on the dimm</description> - <ffdc>RANK_COUNT</ffdc> - <callout> - <target>DIMM_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>DIMM_TARGET</target> - </deconfigure> - <gard> - <target>DIMM_TARGET</target> - </gard> - </hwpError> - - <hwpError> <rc>RC_MSS_FREQ_INDEX_TOO_LARGE</rc> <description>Error calculating the index into max_freq array</description> <ffdc>INDEX</ffdc> |
