summaryrefslogtreecommitdiffstats
path: root/src/import/chips
diff options
context:
space:
mode:
authorJoe McGill <jmcgill@us.ibm.com>2019-06-28 18:36:12 -0400
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-07-09 15:53:42 -0500
commit00826314dde63acf698861a677cf981d2b027653 (patch)
treecdb6ebd29d8c1a8af5ceba453b42d301477cf6af /src/import/chips
parentd667cbdad00d1bd27654c6eb1a3326fbe242e7b9 (diff)
downloadtalos-hostboot-00826314dde63acf698861a677cf981d2b027653.tar.gz
talos-hostboot-00826314dde63acf698861a677cf981d2b027653.zip
p9_fircheck -- updates for Axone
ignore NPU chip unit translation requests in fircheck code, xlate code does not support arbitrary instance as input which is specified by XML fix SCOM xlate code to match on PPE instance 2,5 Change-Id: Iaf0a3352386515e2b1cac83d9853d01780be28d4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79769 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79772 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r--src/import/chips/p9/common/scominfo/p9_scominfo.C2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/common/scominfo/p9_scominfo.C b/src/import/chips/p9/common/scominfo/p9_scominfo.C
index 0426537d4..025b11fd7 100644
--- a/src/import/chips/p9/common/scominfo/p9_scominfo.C
+++ b/src/import/chips/p9/common/scominfo/p9_scominfo.C
@@ -1234,7 +1234,7 @@ extern "C"
}
}
- if (P9A_MC_OMIC0_PPE_RING_ID <= l_ring && l_ring < P9A_MC_OMIC2_PPE_RING_ID && l_port == UNIT_PORT_ID)
+ if (P9A_MC_OMIC0_PPE_RING_ID <= l_ring && l_ring <= P9A_MC_OMIC2_PPE_RING_ID && l_port == UNIT_PORT_ID)
{
o_chipUnitRelated = true;
o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_OMIC_CHIPUNIT,
OpenPOWER on IntegriCloud