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authorAndre Marin <aamarin@us.ibm.com>2018-11-27 11:05:15 -0600
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-02-19 09:20:25 -0600
commitdc56cd6fe5ff5a28e06d1c39207af0fad2b3906d (patch)
tree37bc158b2f8cd2fd49bb5b6bf3d6358763d327c6 /src/import/chips/p9a
parent5c187fcbf2bc91d5870b49153a4fdf53c91ce1d7 (diff)
downloadtalos-hostboot-dc56cd6fe5ff5a28e06d1c39207af0fad2b3906d.tar.gz
talos-hostboot-dc56cd6fe5ff5a28e06d1c39207af0fad2b3906d.zip
Add empty HWPs, UTs, and makefiles needed for Axone
Change-Id: I0442c28cd6bf8d9e1677a38a5fbc804773b1f512 Original-Change-Id: Iba9ffe506bd84667240f6cb00accbb362e93813d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69142 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72087 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9a')
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/lib/eff_config/axone_mss_voltage.C24
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C24
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H24
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk24
4 files changed, 96 insertions, 0 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/eff_config/axone_mss_voltage.C b/src/import/chips/p9a/procedures/hwp/memory/lib/eff_config/axone_mss_voltage.C
new file mode 100644
index 000000000..2fc10aad8
--- /dev/null
+++ b/src/import/chips/p9a/procedures/hwp/memory/lib/eff_config/axone_mss_voltage.C
@@ -0,0 +1,24 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9a/procedures/hwp/memory/lib/eff_config/axone_mss_voltage.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
new file mode 100644
index 000000000..2628cbd7e
--- /dev/null
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
@@ -0,0 +1,24 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
new file mode 100644
index 000000000..6d2083406
--- /dev/null
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
@@ -0,0 +1,24 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2018 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk
new file mode 100644
index 000000000..2e2e42310
--- /dev/null
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk
@@ -0,0 +1,24 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/import/chips/p9a/procedures/hwp/memory/p9a_mss_volt.mk $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2018
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
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