diff options
author | Jenny Huynh <jhuynh@us.ibm.com> | 2019-06-11 14:28:00 -0400 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-06-14 12:33:54 -0500 |
commit | cb318fbc38a9924e1e1fc9a7e76e4801f32c0872 (patch) | |
tree | fcbc4a3e15ba304ea0211ce1bfea095859db4768 /src/import/chips/p9 | |
parent | c4faf5ce57f27323e713f604cda34b5fd493dfdb (diff) | |
download | talos-hostboot-cb318fbc38a9924e1e1fc9a7e76e4801f32c0872.tar.gz talos-hostboot-cb318fbc38a9924e1e1fc9a7e76e4801f32c0872.zip |
Add missing targetType arg to ATTR_CHIP_EC_FEATURE_CORE_SMF_SETUP
Change-Id: I01f3c04c8f1534d6557290f8852a88bbb87f3ea2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78757
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78774
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index b994443f8..9d1b22e69 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -5373,7 +5373,7 @@ <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_CORE_SMF_SETUP</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> Core inits for enabling secure memory facility </description> |