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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-06-26 21:35:37 -0500 |
|---|---|---|
| committer | Dean Sanner <dsanner@us.ibm.com> | 2017-07-11 06:19:07 -0400 |
| commit | b34b1b6c9fc4e276cf3d346dcf9520753348f5cf (patch) | |
| tree | d0953e5eab904c4682e0b8f544a7756a4400b758 /src/import/chips/p9 | |
| parent | fd07cc97080a2eed41b89793e3cac9f3b392e8f1 (diff) | |
| download | talos-hostboot-b34b1b6c9fc4e276cf3d346dcf9520753348f5cf.tar.gz talos-hostboot-b34b1b6c9fc4e276cf3d346dcf9520753348f5cf.zip | |
p9_setup_bars -- fix NPU BAR addressing for Nimbus DD2
Change-Id: Ib71d881d2b6582b5c3a82611d6584e0e98f8ba0d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42463
Reviewed-by: Camille R. Mann <camille@us.ibm.com>
Dev-Ready: Camille R. Mann <camille@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RYAN BLACK <rblack@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42482
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_setup_bars_defs.H | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars_defs.H b/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars_defs.H index d2d137375..36c71fb23 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars_defs.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars_defs.H @@ -350,10 +350,10 @@ const uint64_t NPU_PHY0_BAR_REGS_NDD1[NPU_NUM_BAR_SHADOWS] = const uint64_t NPU_PHY0_BAR_REGS[NPU_NUM_BAR_SHADOWS] = { - 0x05011006, - 0x05011036, - 0x05011066, - 0x05011096 + 0x05011406, + 0x05011436, + 0x05011466, + 0x05011496 }; const uint64_t NPU_PHY1_BAR_REGS_NDD1[NPU_NUM_BAR_SHADOWS] = @@ -382,10 +382,10 @@ const uint64_t NPU_MMIO_BAR_REGS_NDD1[NPU_NUM_BAR_SHADOWS] = const uint64_t NPU_MMIO_BAR_REGS[NPU_NUM_BAR_SHADOWS] = { - 0x05011406, - 0x05011436, - 0x05011466, - 0x05011496 + 0x05011006, + 0x05011036, + 0x05011066, + 0x05011096 }; #endif //_P9_SETUP_BARS_DEFS_H_ |
