P9: NVDIMM SBE Support to Trigger Catastrophic Save

- Adds attribute to indicate which ports contain NVDIMM
- Subroutine to trigger CSAVE on ports with NVDIMM

Change-Id: I5fc9ead249dda0062ca3ac5237113688a22eb50c
CQ:SW452306
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69314
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69320
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

7 files changed, 381 insertions, 5 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
index 7305f2e67..4ad111a87 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -321,11 +321,13 @@ fapi2::ReturnCode check_nvdimm(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_ta
                                const std::vector<dimm::kind>& i_kinds)
 {
     fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
+    bool l_nvdimm_in_port = false;
 
     // Note: NVDIMM + non-NVDIMM mixing is checked in check hybrid
     for(const auto& l_kind : i_kinds)
     {
         bool l_nvdimm_supported = true;
+        l_nvdimm_in_port |= l_kind.iv_hybrid_memory_type;
         FAPI_TRY(dimm_slot_is_nv_capable(l_kind.iv_target, l_nvdimm_supported));
 
         // We're always good if NVDIMM is supported OR we're not an NVDIMM, otherwise, throw an error
@@ -338,6 +340,22 @@ fapi2::ReturnCode check_nvdimm(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_ta
                      mss::c_str(l_kind.iv_target) );
     }
 
+    // Update ATTR_SBE_NVDIMM_IN_PORT if the port contains nvdimm for future use
+    if (l_nvdimm_in_port == fapi2::ENUM_ATTR_SBE_NVDIMM_IN_PORT_YES)
+    {
+        FAPI_DBG("NVDIMM found in port %s", mss::c_str(i_target));
+        fapi2::buffer<uint8_t> l_nvdimm_port_bitmap = 0;
+
+        // Get the mca position relative to the proc
+        const auto l_mca_pos = mss::pos<fapi2::TARGET_TYPE_MCA>(i_target);
+        const auto l_chip_target = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target);
+        FAPI_TRY( mss::sbe_nvdimm_in_port(l_chip_target, l_nvdimm_port_bitmap) );
+
+        // Set the bitmap. 0...7
+        FAPI_TRY( l_nvdimm_port_bitmap.setBit(l_mca_pos) );
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_SBE_NVDIMM_IN_PORT, l_chip_target, l_nvdimm_port_bitmap) );
+    }
+
 fapi_try_exit:
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 31dfa4592..9918c43ee 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -11228,6 +11228,31 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+///
+/// @brief ATTR_SBE_NVDIMM_IN_PORT getter
+/// @param[in] const ref to the TARGET_TYPE_PROC_CHIP
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (PROC_CHIP)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  A bitmap to indicate which ports under the processor have NVDIMM plugged. This
+/// is needed to support SBE to trigger CSAVE during controlled shutdown, warm
+/// reboot, and MPIPL. For example, 0b11000000 indicates port 0 and 1 contain
+/// NVDIMMs. creator: eff_confg consumer:
+/// SBE
+///
+inline fapi2::ReturnCode sbe_nvdimm_in_port(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+        uint8_t& o_value)
+{
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SBE_NVDIMM_IN_PORT, i_target, o_value) );
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_SBE_NVDIMM_IN_PORT: 0x%lx (proc chip target)",
+             uint64_t(fapi2::current_err));
+    return fapi2::current_err;
+}
+
 
 ///
 /// @brief ATTR_EFF_DRAM_GEN getter
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
index 7a207e97f..ca2655f88 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -52,6 +52,7 @@ enum sizes
     MCBIST_PER_MC = 1,
     MAX_DIMM_PER_PORT = 2,
     MAX_RANK_PER_DIMM = 4,
+    PORTS_PER_MODULE = MC_PER_MODULE * MCS_PER_MC * PORTS_PER_MCS,
     BITS_PER_DP = 16,
     NIBBLES_PER_DP = BITS_PER_DP / BITS_PER_NIBBLE,
     BYTES_PER_DP = BITS_PER_DP /  BITS_PER_BYTE,
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C
new file mode 100644
index 000000000..a544a193a
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C
@@ -0,0 +1,206 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2018                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file nvdimm_workarounds.C
+/// @brief Workarounds for NVDIMM
+/// Workarounds are very device specific, so there is no attempt to generalize
+/// this code in any way.
+///
+// *HWP HWP Owner: Tsung Yeung <tyeung@us.ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#include <fapi2.H>
+#include <vector>
+#include <p9_mc_scom_addresses.H>
+#include <p9_mc_scom_addresses_fld.H>
+
+namespace mss
+{
+
+namespace workarounds
+{
+
+namespace nvdimm
+{
+
+// MBASTR0Q for each MCA
+// Note: Since the scoms are executed at the chip, it needs the dedicated
+// address for each MCA
+const uint64_t MBASTR0Q_REG[] =
+{
+    MCA_0_MBASTR0Q,
+    MCA_1_MBASTR0Q,
+    MCA_2_MBASTR0Q,
+    MCA_3_MBASTR0Q,
+    MCA_4_MBASTR0Q,
+    MCA_5_MBASTR0Q,
+    MCA_6_MBASTR0Q,
+    MCA_7_MBASTR0Q,
+};
+
+// MBARPC0Q for each MCA
+const uint64_t MBARPC0Q_REG[] =
+{
+    MCA_0_MBARPC0Q,
+    MCA_1_MBARPC0Q,
+    MCA_2_MBARPC0Q,
+    MCA_3_MBARPC0Q,
+    MCA_4_MBARPC0Q,
+    MCA_5_MBARPC0Q,
+    MCA_6_MBARPC0Q,
+    MCA_7_MBARPC0Q,
+};
+
+// FARB5Q for each MCA
+const uint64_t FARB5Q_REG[] =
+{
+    MCA_0_MBA_FARB5Q,
+    MCA_1_MBA_FARB5Q,
+    MCA_2_MBA_FARB5Q,
+    MCA_3_MBA_FARB5Q,
+    MCA_4_MBA_FARB5Q,
+    MCA_5_MBA_FARB5Q,
+    MCA_6_MBA_FARB5Q,
+    MCA_7_MBA_FARB5Q,
+};
+
+constexpr uint8_t PORTS_PER_MODULE = 8;
+
+///
+/// @brief Helper for trigger_csave. This subroutine puts the MCA into STR
+/// This is the same thing as mss::nvdimm::self_refresh_entry() but rewritten
+/// to support SBE
+/// @param[in] i_target - PROC_CHIP target
+/// @param[in] l_mca_pos - The MCA position relative to the PROC
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+fapi2::ReturnCode self_refresh_entry( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+                                      const uint8_t l_mca_pos)
+{
+    FAPI_ASSERT((l_mca_pos < PORTS_PER_MODULE),
+                fapi2::MSS_SRE_MCA_OUT_OF_RANGE().
+                set_PROC_TARGET(i_target).
+                set_MCA_POS(l_mca_pos),
+                "Invalid port number %u provided", l_mca_pos);
+
+    FAPI_DBG("Entering STR on port %u.", l_mca_pos);
+
+    {
+        fapi2::buffer<uint64_t> l_mbarpc0_data, l_mbastr0_data;
+        constexpr uint64_t ENABLE = 1;
+        constexpr uint64_t DISABLE = 0;
+        constexpr uint64_t MINALL_MAXALL = 0b000;
+
+        // Step 1 - In MBARPC0Q, disable power domain control, set domain to MAXALL_MINALL,
+        //          and enable minimum domain reduction
+        FAPI_TRY(fapi2::getScom(i_target, MBARPC0Q_REG[l_mca_pos], l_mbarpc0_data));
+        l_mbarpc0_data.writeBit<MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE>(DISABLE);
+        l_mbarpc0_data.insertFromRight<MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS, MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_LEN>(MINALL_MAXALL);
+        l_mbarpc0_data.writeBit<MCA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_ENABLE>(ENABLE);
+        FAPI_TRY(fapi2::putScom(i_target, MBARPC0Q_REG[l_mca_pos], l_mbarpc0_data));
+
+        // Step 2 - In MBASTR0Q, enable STR entry
+        FAPI_TRY(fapi2::getScom(i_target, MBASTR0Q_REG[l_mca_pos], l_mbastr0_data));
+        l_mbastr0_data.writeBit<MCA_MBASTR0Q_CFG_STR_ENABLE>(ENABLE);
+        FAPI_TRY(fapi2::putScom(i_target, MBASTR0Q_REG[l_mca_pos], l_mbastr0_data));
+
+        // Step 3 - In MBARPC0Q, enable power domain control.
+        l_mbarpc0_data.writeBit<MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE>(ENABLE);
+        FAPI_TRY(fapi2::putScom(i_target, MBARPC0Q_REG[l_mca_pos], l_mbarpc0_data));
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Helper for trigger_csave. This subroutine assert RESET_n to trigger
+/// the backup on nvdimm
+/// @param[in] i_target - PROC_CHIP targetdefine
+/// @param[in] l_mca_pos - The MCA position relative to the PROC
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+fapi2::ReturnCode assert_resetn( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, const uint8_t l_mca_pos)
+{
+    FAPI_ASSERT((l_mca_pos < PORTS_PER_MODULE),
+                fapi2::MSS_RESETN_MCA_OUT_OF_RANGE().
+                set_PROC_TARGET(i_target).
+                set_MCA_POS(l_mca_pos),
+                "Invalid port number %u provided", l_mca_pos);
+
+    FAPI_DBG("Asserting RESETn on port %d.", l_mca_pos);
+
+    {
+        fapi2::buffer<uint64_t> l_farb5q_data;
+        constexpr uint64_t LOW = 0;
+
+        FAPI_TRY(fapi2::getScom(i_target, FARB5Q_REG[l_mca_pos], l_farb5q_data));
+        l_farb5q_data.writeBit<MCA_MBA_FARB5Q_CFG_DDR_RESETN>(LOW);
+        FAPI_TRY(fapi2::putScom(i_target, FARB5Q_REG[l_mca_pos], l_farb5q_data));
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Triggers csave on NVDIMM. This subroutine reads ATTR_SBE_NVDIMM_IN_PORT
+/// and fires the trigger to all the ports with NVDIMM plugged. This is written
+/// specifically for SBE.
+/// @param[in] i_target - PROC_CHIP target
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+fapi2::ReturnCode trigger_csave( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target )
+{
+    fapi2::buffer<uint8_t> l_nvdimm_port_bitmap = 0;
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SBE_NVDIMM_IN_PORT, i_target, l_nvdimm_port_bitmap) );
+
+    for (uint8_t l_mca_pos = 0; l_mca_pos < PORTS_PER_MODULE; l_mca_pos++)
+    {
+        if (l_nvdimm_port_bitmap.getBit(l_mca_pos) == fapi2::ENUM_ATTR_SBE_NVDIMM_IN_PORT_YES)
+        {
+            FAPI_DBG("NVDIMM found in port %d ", l_mca_pos);
+
+            // Enter STR
+            FAPI_TRY(self_refresh_entry(i_target, l_mca_pos));
+
+            // Assert ddr_resetn
+            FAPI_TRY(assert_resetn(i_target, l_mca_pos));
+        }
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+}//ns nvdimm
+
+}//ns workarounds
+
+}//ns mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.H
new file mode 100644
index 000000000..a5d1b4a07
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.H
@@ -0,0 +1,87 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.H $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2018                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file nvdimm_workarounds.H
+/// @brief Workarounds for NVDIMM
+/// Workarounds are very device specific, so there is no attempt to generalize
+/// this code in any way.
+///
+// *HWP HWP Owner: Tsung Yeung <tyeung@us.ibm.com>
+// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#ifndef _MSS_WORKAROUNDS_NVDIMM_H_
+#define _MSS_WORKAROUNDS_NVDIMM_H_
+
+#include <fapi2.H>
+
+namespace mss
+{
+
+namespace workarounds
+{
+
+namespace nvdimm
+{
+
+// Function pointer for HWP support in PPE
+typedef fapi2::ReturnCode (*p9_flush_nvdimm_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+///
+/// @brief Triggers csave on NVDIMM. This subroutine reads ATTR_SBE_NVDIMM_IN_PORT
+/// and fires the trigger to all the ports with NVDIMM plugged. This is written
+/// specifically for SBE.
+/// @param[in] i_target - PROC_CHIP target
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+
+fapi2::ReturnCode trigger_csave( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target );
+
+///
+/// @brief Helper for trigger_csave. This subroutine assert RESET_n to trigger
+/// the backup on nvdimm
+/// @param[in] i_target - PROC_CHIP target
+/// @param[in] l_mca_pos - The MCA position relative to the PROC
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+
+fapi2::ReturnCode assert_resetn( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, uint8_t l_mca_pos);
+
+///
+/// @brief Helper for trigger_csave. This subroutine puts the MCA into STR
+/// @param[in] i_target - PROC_CHIP target
+/// @param[in] l_mca_pos - The MCA position relative to the PROC
+/// @return FAPI2_RC_SUCCESS iff setup was successful
+///
+
+fapi2::ReturnCode self_refresh_entry( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, uint8_t l_mca_pos);
+
+}//ns nvdimm
+}//ns workarounds
+}//ns mss
+
+#endif
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index 2ff3e3793..7d3d719f0 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2018                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2019                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -3314,4 +3314,22 @@
       <mssAccessorName>wr_vref_offset</mssAccessorName>
     </attribute>
 
+    <attribute>
+        <id>ATTR_SBE_NVDIMM_IN_PORT</id>
+        <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+        <description>
+          A bitmap to indicate which ports under the processor have NVDIMM
+          plugged. This is needed to support SBE to trigger CSAVE during
+          controlled shutdown, warm reboot, and MPIPL.
+          For example, 0b11000000 indicates port 0 and 1 contain NVDIMMs.
+          creator: eff_confg
+          consumer: SBE
+        </description>
+        <initToZero></initToZero>
+        <valueType>uint8</valueType>
+        <writeable/>
+        <enum> NO = 0, YES = 1 </enum>
+        <mssAccessorName>sbe_nvdimm_in_port</mssAccessorName>
+    </attribute>
+
 </attributes>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
index 2ac4628c8..0d7d6c791 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2018                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2019                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -565,4 +565,25 @@
     </callout>
   </hwpError>
 
+  <hwpError>
+    <rc>RC_MSS_SRE_MCA_OUT_OF_RANGE</rc>
+    <description>Indicates a MCA passed to the NVDIMM sre code is out of range</description>
+    <ffdc>PROC_TARGET</ffdc>
+    <ffdc>MCA_POS</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_MSS_RESETN_MCA_OUT_OF_RANGE</rc>
+    <description>Indicates a MCA passed to the NVDIMM resetn code is out of range</description>
+    <ffdc>PROC_TARGET</ffdc>
+    <ffdc>MCA_POS</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
 </hwpErrors>