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authorJoe McGill <jmcgill@us.ibm.com>2018-06-11 17:02:08 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-06-17 20:42:36 -0400
commit67ae5190164c9b7644a9db9a3ed5d71a4b563cad (patch)
tree992e29735a7bfbd3852e798b1c9ef69f6c1b35ac /src/import/chips/p9
parent78055ea9215ef077ee17fe0655ee3ff38568f5fa (diff)
downloadtalos-hostboot-67ae5190164c9b7644a9db9a3ed5d71a4b563cad.tar.gz
talos-hostboot-67ae5190164c9b7644a9db9a3ed5d71a4b563cad.zip
shift OBUS FIR programming inits for secure boot
p9_sbe_scominit: unmask all OBUS EXTFIR bits, use PB CENT FIR 14 to mark update for downstream code (qualify XBUS/OBUS EXTFIR updates to apply to PPE platform only) p9_fab_iovalid: conditionally unmask OBUS EXTFIR based on state of PB CENT FIR 14 (will handle unmasking here when insecure -- Cronus or old SBE images) p9_obus_extfir_setup: new HWP for HB to call, mask OBUS EXTFIR bits for unused busses Change-Id: I07e7da4a7c61c041451ff4ddfeec3c266385d404 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60358 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60363 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C
index 811c551f6..9ebf3a581 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C
@@ -890,7 +890,8 @@ p9_fab_iovalid_update_link(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_
"Error from getScom (PU_PB_CENT_SM0_PB_CENT_FIR_REG)");
// clear RAS FIR mask for optical link, or electrical link if not already setup by SBE
- if ((i_ctl.endp_type == OPTICAL) ||
+ if (((i_ctl.endp_type == OPTICAL) &&
+ (!l_fbc_cent_fir_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_14>())) ||
((i_ctl.endp_type == ELECTRICAL) &&
(!l_fbc_cent_fir_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_13>())))
{
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