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authorMartin Peschke <mpeschke@de.ibm.com>2016-08-01 11:58:35 +0200
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-08-12 09:56:30 -0400
commitb3eacbc8f430856670fe9a6dd204ad24fa7177d3 (patch)
tree5b2ee58d36e1a2b7debfd00db0b04cad613f9f83 /src/import/chips/p9/utils
parentc8f727501e2c392c04dd1c4cd8cdbf441ea7b37f (diff)
downloadtalos-hostboot-b3eacbc8f430856670fe9a6dd204ad24fa7177d3.tar.gz
talos-hostboot-b3eacbc8f430856670fe9a6dd204ad24fa7177d3.zip
p9_ring_id.h: move ring IDs to plain C header file
The enum RingID is moved from p9_ringId.H to p9_ring_id.h. Now the latter has minimum content to support manufacturing. Its plain C content is compatible with wafer test Sun SC4.0 18 Oct 1995 C++ 4.1 . Besides HWP usually content themselves with p9_ring_id.h. Change-Id: I2d6cffb33a8c16a1083a02c6c04d4be7078480d2 RTC: 158310 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27682 Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Joseph E. Dery <dery@us.ibm.com> Dev-Ready: Joseph E. Dery <dery@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27684 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/utils')
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.H304
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ring_id.h331
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_tor.C1
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_tor.H2
4 files changed, 334 insertions, 304 deletions
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index a9a1c3323..be8216765 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -27,6 +27,7 @@
#define _P9_RINGID_H_
#include <stdint.h>
+#include <p9_ring_id.h>
namespace RING_TYPES
{
@@ -57,309 +58,6 @@ enum CHIPLET_TYPE
EC_TYPE,
};
-///
-/// @enum RingID
-/// @brief Enumeration of Ring ID values. These values are used to traverse
-/// an image having Ring Containers.
-// NOTE: Do not change the numbering, the sequence or add new constants to
-// the below enum, unless you know the effect it has on the traversing
-// of the image for Ring Containers.
-enum RingID
-{
- //*****************************
- // Rings needed for SBE - Start
- //*****************************
- // Perv Chiplet Rings
- perv_fure = 0,
- perv_gptr = 1,
- perv_time = 2,
- occ_fure = 3,
- occ_gptr = 4,
- occ_time = 5,
- perv_ana_func = 6,
- perv_ana_gptr = 7,
- perv_pll_gptr = 8,
- perv_pll_bndy = 9,
- perv_pll_bndy_bucket_1 = 10,
- perv_pll_bndy_bucket_2 = 11,
- perv_pll_bndy_bucket_3 = 12,
- perv_pll_bndy_bucket_4 = 13,
- perv_pll_bndy_bucket_5 = 14,
- perv_pll_func = 15,
- perv_pibnet_gptr = 16,
- perv_pibnet_time = 17,
- perv_repr = 18,
- occ_repr = 19,
- perv_pibnet_repr = 20,
-
- // Nest Chiplet Rings - N0
- n0_fure = 21,
- n0_gptr = 22,
- n0_time = 23,
- n0_nx_fure = 24,
- n0_nx_gptr = 25,
- n0_nx_time = 26,
- n0_cxa0_fure = 27,
- n0_cxa0_gptr = 28,
- n0_cxa0_time = 29,
- n0_repr = 30,
- n0_nx_repr = 31,
- n0_cxa0_repr = 32,
-
- // Nest Chiplet Rings - N1
- n1_fure = 33,
- n1_gptr = 34,
- n1_time = 35,
- n1_ioo0_fure = 36,
- n1_ioo0_gptr = 37,
- n1_ioo0_time = 38,
- n1_ioo1_fure = 39,
- n1_ioo1_gptr = 40,
- n1_ioo1_time = 41,
- n1_mcs23_fure = 42,
- n1_mcs23_gptr = 43,
- n1_mcs23_time = 44,
- n1_repr = 45,
- n1_ioo0_repr = 46,
- n1_ioo1_repr = 47,
- n1_mcs23_repr = 48,
-
- // Nest Chiplet Rings - N2
- n2_fure = 49,
- n2_gptr = 50,
- n2_time = 51,
- n2_cxa1_fure = 52,
- n2_cxa1_gptr = 53,
- n2_cxa1_time = 54,
- n2_psi_fure = 55,
- n2_psi_gptr = 56,
- n2_psi_time = 57,
- n2_repr = 58,
- n2_cxa1_repr = 59,
- n2_psi_repr = 60,
- // values 61 unused
-
- // Nest Chiplet Rings - N3
- n3_fure = 62,
- n3_gptr = 63,
- n3_time = 64,
- n3_mcs01_fure = 65,
- n3_mcs01_gptr = 66,
- n3_mcs01_time = 67,
- n3_np_fure = 68,
- n3_np_gptr = 69,
- n3_np_time = 70,
- n3_repr = 71,
- n3_mcs01_repr = 72,
- n3_np_repr = 73,
- // values 74 unused
-
- // X-Bus Chiplet Rings
- // Common - apply to all instances of X-Bus
- xb_fure = 75,
- xb_gptr = 76,
- xb_time = 77,
- xb_io0_fure = 78,
- xb_io0_gptr = 79,
- xb_io0_time = 80,
- xb_io1_fure = 81,
- xb_io1_gptr = 82,
- xb_io1_time = 83,
- xb_io2_fure = 84,
- xb_io2_gptr = 85,
- xb_io2_time = 86,
- xb_pll_gptr = 87,
- xb_pll_bndy = 88,
- xb_pll_func = 89,
-
- // X-Bus Chiplet Rings
- // X0, X1 and X2 instance specific Rings
- xb_repr = 90,
- xb_io0_repr = 91,
- xb_io1_repr = 92,
- xb_io2_repr = 93,
- // values 94-95 unused
-
- // MC Chiplet Rings
- // Common - apply to all instances of MC
- mc_fure = 96,
- mc_gptr = 97,
- mc_time = 98,
- mc_iom01_fure = 99,
- mc_iom01_gptr = 100,
- mc_iom01_time = 101,
- mc_iom23_fure = 102,
- mc_iom23_gptr = 103,
- mc_iom23_time = 104,
- mc_pll_gptr = 105,
- mc_pll_bndy = 106,
- mc_pll_bndy_bucket_1 = 107,
- mc_pll_bndy_bucket_2 = 108,
- mc_pll_bndy_bucket_3 = 109,
- mc_pll_bndy_bucket_4 = 110,
- mc_pll_bndy_bucket_5 = 111,
- mc_pll_func = 112,
-
- // MC Chiplet Rings
- // MC01 and MC23 instance specific Rings
- mc_repr = 113,
- mc_iom01_repr = 114,
- mc_iom23_repr = 115,
- // values 116-117 unused
-
- // OB Chiplet Rings
- // Common - apply to all instances of O-Bus
- ob0_fure = 118,
- ob0_gptr = 119,
- ob0_time = 120,
- ob0_pll_gptr = 121,
- ob0_pll_bndy = 122,
- ob0_pll_func = 123,
-
- // OB Chiplet Rings
- // OB0, OB1, OB2 and OB3 instance specific Ring
- ob0_repr = 124,
- // values 125-126 unused
-
- ob1_fure = 127,
- ob1_gptr = 128,
- ob1_time = 129,
- ob1_pll_gptr = 130,
- ob1_pll_bndy = 131,
- ob1_pll_func = 132,
-
- // OB Chiplet Rings
- // OB0, OB1, OB2 and OB3 instance specific Ring
- ob1_repr = 133,
- // values 134-135 unused
-
- ob2_fure = 136,
- ob2_gptr = 137,
- ob2_time = 138,
- ob2_pll_gptr = 139,
- ob2_pll_bndy = 140,
- ob2_pll_func = 141,
-
- // OB Chiplet Rings
- // OB0, OB1, OB2 and OB3 instance specific Ring
- ob2_repr = 142,
- // values 143-144 unused
-
- ob3_fure = 145,
- ob3_gptr = 146,
- ob3_time = 147,
- ob3_pll_gptr = 148,
- ob3_pll_bndy = 149,
- ob3_pll_func = 150,
-
- // OB Chiplet Rings
- // OB0, OB1, OB2 and OB3 instance specific Ring
- ob3_repr = 151,
- // values 152-153 unused
-
- // PCI Chiplet Rings
- // PCI0 Common Rings
- pci0_fure = 154,
- pci0_gptr = 155,
- pci0_time = 156,
- pci0_pll_bndy = 157,
- pci0_pll_gptr = 158,
- // Instance specific Rings
- pci0_repr = 159,
-
- // PCI1 Common Rings
- pci1_fure = 160,
- pci1_gptr = 161,
- pci1_time = 162,
- pci1_pll_bndy = 163,
- pci1_pll_gptr = 164,
- // Instance specific Rings
- pci1_repr = 165,
-
- // PCI2 Common Rings
- pci2_fure = 166,
- pci2_gptr = 167,
- pci2_time = 168,
- pci2_pll_bndy = 169,
- pci2_pll_gptr = 170,
- // Instance specific Rings
- pci2_repr = 171,
-
- // Quad Chiplet Rings
- // Common - apply to all Quad instances
- eq_fure = 172,
- eq_gptr = 173,
- eq_time = 174,
- eq_mode = 175,
- ex_l3_fure = 176,
- ex_l3_gptr = 177,
- ex_l3_time = 178,
- ex_l2_mode = 179,
- ex_l2_fure = 180,
- ex_l2_gptr = 181,
- ex_l2_time = 182,
- ex_l3_refr_fure = 183,
- ex_l3_refr_gptr = 184,
- ex_l3_refr_time = 185,
- eq_ana_func = 186,
- eq_ana_gptr = 187,
- eq_dpll_func = 188,
- eq_dpll_gptr = 189,
- eq_dpll_mode = 190,
- eq_ana_bndy = 191,
- eq_ana_bndy_bucket_0 = 192,
- eq_ana_bndy_bucket_1 = 193,
- eq_ana_bndy_bucket_2 = 194,
- eq_ana_bndy_bucket_3 = 195,
- eq_ana_bndy_bucket_4 = 196,
- eq_ana_bndy_bucket_5 = 197,
- eq_ana_bndy_bucket_6 = 198,
- eq_ana_bndy_bucket_7 = 199,
- eq_ana_bndy_bucket_8 = 200,
- eq_ana_bndy_bucket_9 = 201,
- eq_ana_bndy_bucket_10 = 202,
- eq_ana_bndy_bucket_11 = 203,
- eq_ana_bndy_bucket_12 = 204,
- eq_ana_bndy_bucket_13 = 205,
- eq_ana_bndy_bucket_14 = 206,
- eq_ana_bndy_bucket_15 = 207,
- eq_ana_bndy_bucket_16 = 208,
- eq_ana_bndy_bucket_17 = 209,
- eq_ana_bndy_bucket_18 = 210,
- eq_ana_bndy_bucket_19 = 211,
- eq_ana_bndy_bucket_20 = 212,
- eq_ana_bndy_bucket_21 = 213,
- eq_ana_bndy_bucket_22 = 214,
- eq_ana_bndy_bucket_23 = 215,
- eq_ana_bndy_bucket_24 = 216,
- eq_ana_bndy_bucket_25 = 217,
- eq_ana_bndy_l3dcc_bucket_26 = 218,
- eq_ana_mode = 219,
-
- // Quad Chiplet Rings
- // EQ0 - EQ5 instance specific Rings
- eq_repr = 220,
- ex_l3_repr = 221,
- ex_l2_repr = 222,
- ex_l3_refr_repr = 223,
-
- // Core Chiplet Rings
- // Common - apply to all Core instances
- ec_func = 224,
- ec_gptr = 225,
- ec_time = 226,
- ec_mode = 227,
-
- // Core Chiplet Rings
- // EC0 - EC23 instance specific Ring
- ec_repr = 228,
- //***************************
- // Rings needed for SBE - End
- //***************************
-
- P9_NUM_RINGS // This shoud always be the last constant
-}; // end of enum RingID
-
struct CHIPLET_DATA
{
// This is the chiplet-ID of the first instance of the Chiplet
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
new file mode 100644
index 000000000..d041f6013
--- /dev/null
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
@@ -0,0 +1,331 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/utils/imageProcs/p9_ring_id.h $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef _P9_RINGID_ENUM_H_
+#define _P9_RINGID_ENUM_H_
+
+///
+/// @enum RingID
+/// @brief Enumeration of Ring ID values. These values are used to traverse
+/// an image having Ring Containers.
+// NOTE: Do not change the numbering, the sequence or add new constants to
+// the below enum, unless you know the effect it has on the traversing
+// of the image for Ring Containers.
+enum RingID
+{
+ //*****************************
+ // Rings needed for SBE - Start
+ //*****************************
+ // Perv Chiplet Rings
+ perv_fure = 0,
+ perv_gptr = 1,
+ perv_time = 2,
+ occ_fure = 3,
+ occ_gptr = 4,
+ occ_time = 5,
+ perv_ana_func = 6,
+ perv_ana_gptr = 7,
+ perv_pll_gptr = 8,
+ perv_pll_bndy = 9,
+ perv_pll_bndy_bucket_1 = 10,
+ perv_pll_bndy_bucket_2 = 11,
+ perv_pll_bndy_bucket_3 = 12,
+ perv_pll_bndy_bucket_4 = 13,
+ perv_pll_bndy_bucket_5 = 14,
+ perv_pll_func = 15,
+ perv_pibnet_gptr = 16,
+ perv_pibnet_time = 17,
+ perv_repr = 18,
+ occ_repr = 19,
+ perv_pibnet_repr = 20,
+
+ // Nest Chiplet Rings - N0
+ n0_fure = 21,
+ n0_gptr = 22,
+ n0_time = 23,
+ n0_nx_fure = 24,
+ n0_nx_gptr = 25,
+ n0_nx_time = 26,
+ n0_cxa0_fure = 27,
+ n0_cxa0_gptr = 28,
+ n0_cxa0_time = 29,
+ n0_repr = 30,
+ n0_nx_repr = 31,
+ n0_cxa0_repr = 32,
+
+ // Nest Chiplet Rings - N1
+ n1_fure = 33,
+ n1_gptr = 34,
+ n1_time = 35,
+ n1_ioo0_fure = 36,
+ n1_ioo0_gptr = 37,
+ n1_ioo0_time = 38,
+ n1_ioo1_fure = 39,
+ n1_ioo1_gptr = 40,
+ n1_ioo1_time = 41,
+ n1_mcs23_fure = 42,
+ n1_mcs23_gptr = 43,
+ n1_mcs23_time = 44,
+ n1_repr = 45,
+ n1_ioo0_repr = 46,
+ n1_ioo1_repr = 47,
+ n1_mcs23_repr = 48,
+
+ // Nest Chiplet Rings - N2
+ n2_fure = 49,
+ n2_gptr = 50,
+ n2_time = 51,
+ n2_cxa1_fure = 52,
+ n2_cxa1_gptr = 53,
+ n2_cxa1_time = 54,
+ n2_psi_fure = 55,
+ n2_psi_gptr = 56,
+ n2_psi_time = 57,
+ n2_repr = 58,
+ n2_cxa1_repr = 59,
+ n2_psi_repr = 60,
+ // values 61 unused
+
+ // Nest Chiplet Rings - N3
+ n3_fure = 62,
+ n3_gptr = 63,
+ n3_time = 64,
+ n3_mcs01_fure = 65,
+ n3_mcs01_gptr = 66,
+ n3_mcs01_time = 67,
+ n3_np_fure = 68,
+ n3_np_gptr = 69,
+ n3_np_time = 70,
+ n3_repr = 71,
+ n3_mcs01_repr = 72,
+ n3_np_repr = 73,
+ // values 74 unused
+
+ // X-Bus Chiplet Rings
+ // Common - apply to all instances of X-Bus
+ xb_fure = 75,
+ xb_gptr = 76,
+ xb_time = 77,
+ xb_io0_fure = 78,
+ xb_io0_gptr = 79,
+ xb_io0_time = 80,
+ xb_io1_fure = 81,
+ xb_io1_gptr = 82,
+ xb_io1_time = 83,
+ xb_io2_fure = 84,
+ xb_io2_gptr = 85,
+ xb_io2_time = 86,
+ xb_pll_gptr = 87,
+ xb_pll_bndy = 88,
+ xb_pll_func = 89,
+
+ // X-Bus Chiplet Rings
+ // X0, X1 and X2 instance specific Rings
+ xb_repr = 90,
+ xb_io0_repr = 91,
+ xb_io1_repr = 92,
+ xb_io2_repr = 93,
+ // values 94-95 unused
+
+ // MC Chiplet Rings
+ // Common - apply to all instances of MC
+ mc_fure = 96,
+ mc_gptr = 97,
+ mc_time = 98,
+ mc_iom01_fure = 99,
+ mc_iom01_gptr = 100,
+ mc_iom01_time = 101,
+ mc_iom23_fure = 102,
+ mc_iom23_gptr = 103,
+ mc_iom23_time = 104,
+ mc_pll_gptr = 105,
+ mc_pll_bndy = 106,
+ mc_pll_bndy_bucket_1 = 107,
+ mc_pll_bndy_bucket_2 = 108,
+ mc_pll_bndy_bucket_3 = 109,
+ mc_pll_bndy_bucket_4 = 110,
+ mc_pll_bndy_bucket_5 = 111,
+ mc_pll_func = 112,
+
+ // MC Chiplet Rings
+ // MC01 and MC23 instance specific Rings
+ mc_repr = 113,
+ mc_iom01_repr = 114,
+ mc_iom23_repr = 115,
+ // values 116-117 unused
+
+ // OB Chiplet Rings
+ // Common - apply to all instances of O-Bus
+ ob0_fure = 118,
+ ob0_gptr = 119,
+ ob0_time = 120,
+ ob0_pll_gptr = 121,
+ ob0_pll_bndy = 122,
+ ob0_pll_func = 123,
+
+ // OB Chiplet Rings
+ // OB0, OB1, OB2 and OB3 instance specific Ring
+ ob0_repr = 124,
+ // values 125-126 unused
+
+ ob1_fure = 127,
+ ob1_gptr = 128,
+ ob1_time = 129,
+ ob1_pll_gptr = 130,
+ ob1_pll_bndy = 131,
+ ob1_pll_func = 132,
+
+ // OB Chiplet Rings
+ // OB0, OB1, OB2 and OB3 instance specific Ring
+ ob1_repr = 133,
+ // values 134-135 unused
+
+ ob2_fure = 136,
+ ob2_gptr = 137,
+ ob2_time = 138,
+ ob2_pll_gptr = 139,
+ ob2_pll_bndy = 140,
+ ob2_pll_func = 141,
+
+ // OB Chiplet Rings
+ // OB0, OB1, OB2 and OB3 instance specific Ring
+ ob2_repr = 142,
+ // values 143-144 unused
+
+ ob3_fure = 145,
+ ob3_gptr = 146,
+ ob3_time = 147,
+ ob3_pll_gptr = 148,
+ ob3_pll_bndy = 149,
+ ob3_pll_func = 150,
+
+ // OB Chiplet Rings
+ // OB0, OB1, OB2 and OB3 instance specific Ring
+ ob3_repr = 151,
+ // values 152-153 unused
+
+ // PCI Chiplet Rings
+ // PCI0 Common Rings
+ pci0_fure = 154,
+ pci0_gptr = 155,
+ pci0_time = 156,
+ pci0_pll_bndy = 157,
+ pci0_pll_gptr = 158,
+ // Instance specific Rings
+ pci0_repr = 159,
+
+ // PCI1 Common Rings
+ pci1_fure = 160,
+ pci1_gptr = 161,
+ pci1_time = 162,
+ pci1_pll_bndy = 163,
+ pci1_pll_gptr = 164,
+ // Instance specific Rings
+ pci1_repr = 165,
+
+ // PCI2 Common Rings
+ pci2_fure = 166,
+ pci2_gptr = 167,
+ pci2_time = 168,
+ pci2_pll_bndy = 169,
+ pci2_pll_gptr = 170,
+ // Instance specific Rings
+ pci2_repr = 171,
+
+ // Quad Chiplet Rings
+ // Common - apply to all Quad instances
+ eq_fure = 172,
+ eq_gptr = 173,
+ eq_time = 174,
+ eq_mode = 175,
+ ex_l3_fure = 176,
+ ex_l3_gptr = 177,
+ ex_l3_time = 178,
+ ex_l2_mode = 179,
+ ex_l2_fure = 180,
+ ex_l2_gptr = 181,
+ ex_l2_time = 182,
+ ex_l3_refr_fure = 183,
+ ex_l3_refr_gptr = 184,
+ ex_l3_refr_time = 185,
+ eq_ana_func = 186,
+ eq_ana_gptr = 187,
+ eq_dpll_func = 188,
+ eq_dpll_gptr = 189,
+ eq_dpll_mode = 190,
+ eq_ana_bndy = 191,
+ eq_ana_bndy_bucket_0 = 192,
+ eq_ana_bndy_bucket_1 = 193,
+ eq_ana_bndy_bucket_2 = 194,
+ eq_ana_bndy_bucket_3 = 195,
+ eq_ana_bndy_bucket_4 = 196,
+ eq_ana_bndy_bucket_5 = 197,
+ eq_ana_bndy_bucket_6 = 198,
+ eq_ana_bndy_bucket_7 = 199,
+ eq_ana_bndy_bucket_8 = 200,
+ eq_ana_bndy_bucket_9 = 201,
+ eq_ana_bndy_bucket_10 = 202,
+ eq_ana_bndy_bucket_11 = 203,
+ eq_ana_bndy_bucket_12 = 204,
+ eq_ana_bndy_bucket_13 = 205,
+ eq_ana_bndy_bucket_14 = 206,
+ eq_ana_bndy_bucket_15 = 207,
+ eq_ana_bndy_bucket_16 = 208,
+ eq_ana_bndy_bucket_17 = 209,
+ eq_ana_bndy_bucket_18 = 210,
+ eq_ana_bndy_bucket_19 = 211,
+ eq_ana_bndy_bucket_20 = 212,
+ eq_ana_bndy_bucket_21 = 213,
+ eq_ana_bndy_bucket_22 = 214,
+ eq_ana_bndy_bucket_23 = 215,
+ eq_ana_bndy_bucket_24 = 216,
+ eq_ana_bndy_bucket_25 = 217,
+ eq_ana_bndy_l3dcc_bucket_26 = 218,
+ eq_ana_mode = 219,
+
+ // Quad Chiplet Rings
+ // EQ0 - EQ5 instance specific Rings
+ eq_repr = 220,
+ ex_l3_repr = 221,
+ ex_l2_repr = 222,
+ ex_l3_refr_repr = 223,
+
+ // Core Chiplet Rings
+ // Common - apply to all Core instances
+ ec_func = 224,
+ ec_gptr = 225,
+ ec_time = 226,
+ ec_mode = 227,
+
+ // Core Chiplet Rings
+ // EC0 - EC23 instance specific Ring
+ ec_repr = 228,
+ //***************************
+ // Rings needed for SBE - End
+ //***************************
+
+ P9_NUM_RINGS // This shoud always be the last constant
+}; // end of enum RingID
+
+#endif // _P9_RINGID_ENUM_H_
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index 1c9e93b6b..a23b47a8c 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -37,6 +37,7 @@
// While using tor_tor_get_block_of_rings and tor_get_single_ring API,
// it is used pass by value
//
+#include "p9_ringId.H"
#include "p9_tor.H"
#include "p9_xip_image.h"
#include "p9_infrastruct_help.H"
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.H b/src/import/chips/p9/utils/imageProcs/p9_tor.H
index ac2f3c53e..2ac13f499 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.H
@@ -26,7 +26,7 @@
#define _P9_TOR_H_
#include "p9_ring_identification.H"
-#include "p9_ringId.H"
+#include "p9_ring_id.h"
namespace P9_TOR
{
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