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authorClaus Michael Olsen <cmolsen@us.ibm.com>2018-06-21 11:51:23 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-07-17 10:33:55 -0400
commit55b7b8fc27121e3475979f2c120145b730af3565 (patch)
tree9a0defe1dcb89b7434be6ceec7c05c4ba9e96ef1 /src/import/chips/p9/utils/imageProcs
parent2fe693504fb6e803664a1005ad9a1b06dfdaad80 (diff)
downloadtalos-hostboot-55b7b8fc27121e3475979f2c120145b730af3565.tar.gz
talos-hostboot-55b7b8fc27121e3475979f2c120145b730af3565.zip
Cleanup: Updated Mvpd access function and removal of unused rings
- Removed the function that converts the outdated RS4v2 header format to the current RS4v3 header format in the Mvpd accessor functions, mvpdRingFundFind(). This can be done since all Mvpd in existance on any of our supported P9 systems (i.e., >=P9N DD20) use RS4v3. - Removed two #R rings which are no longer supported since P9n DD10. Because these rings happen to be located at the end of the TOR instance ring sections, it will alter the image, but will not interfere with the traversing of the ringSection image due to the way chiplet and common/instance sub-sections are partitioned. Key_Cronus_Test=XIP_REGRESS Change-Id: I39740a099b224bfade8a97a057453b85498e5880 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61100 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Michael C. Sgro <mcs793@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61289 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/utils/imageProcs')
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.C4
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ringId.H20
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ring_id.h7
-rw-r--r--src/import/chips/p9/utils/imageProcs/p9_ring_identification.C3
4 files changed, 15 insertions, 19 deletions
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
index 0cf933891..f5a83e335 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
@@ -135,7 +135,6 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"n2_repr" , 0x09, 0x04, 0x04, VPD_RING , 0x04035C06},
{"n2_cxa1_repr" , 0x0a, 0x04, 0x04, VPD_RING , 0x04032006},
- {"n2_psi_repr" , 0x0b, 0x04, 0x04, VPD_RING , 0x04030206},
};
const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
@@ -221,8 +220,7 @@ const GenRingIdList RING_ID_LIST_COMMON[] =
const GenRingIdList RING_ID_LIST_INSTANCE[] =
{
{"mc_repr" , 0x10, 0x07, 0x08, VPD_RING , 0x07036006},
- {"mc_iom01_repr" , 0x11, 0x07, 0x08, VPD_RING , 0x07031006},
- {"mc_iom23_repr" , 0x12, 0x07, 0x08, VPD_RING , 0x07030806},
+ {"mc_iom23_repr" , 0x11, 0x07, 0x08, VPD_RING , 0x07030806},
};
const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
};
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index a67c89fdd..275ffc287 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -299,15 +299,14 @@ enum RingOffset
// Instance Rings
n2_repr = (0 | INSTANCE_RING_MARK),
n2_cxa1_repr = (1 | INSTANCE_RING_MARK),
- n2_psi_repr = (2 | INSTANCE_RING_MARK)
};
static const ChipletData_t g_chipletData =
{
4, // N2 Chiplet ID is 4.
9, // 9 common rings for N2 Chiplet
- 3, // 3 instance specific rings for N2 chiplet
- 3,
+ 2, // 2 instance specific rings for N2 chiplet
+ 2,
2, // 2 common ring variants: BASE, RL
};
};
@@ -404,16 +403,15 @@ enum RingOffset
mc_pll_func = 15,
// Instance Rings
mc_repr = (0 | INSTANCE_RING_MARK),
- mc_iom01_repr = (1 | INSTANCE_RING_MARK),
- mc_iom23_repr = (2 | INSTANCE_RING_MARK)
+ mc_iom23_repr = (1 | INSTANCE_RING_MARK),
};
static const ChipletData_t g_chipletData =
{
7, // MC Chiplet ID range is 7 - 8. The base ID is 7.
16, // 16 common rings for MC Chiplet
- 3, // 3 instance specific rings for each MC instance
- 3,
+ 2, // 1 instance specific rings for each MC instance
+ 2,
2, // 2 common ring variants: BASE, RL
};
}; // end of namespace MC
@@ -780,7 +778,7 @@ static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{ N2::n2_psi_time , "n2_psi_time" , N2_TYPE }, // 57
{ N2::n2_repr , "n2_repr" , N2_TYPE }, // 58
{ N2::n2_cxa1_repr , "n2_cxa1_repr" , N2_TYPE }, // 59
- { N2::n2_psi_repr , "n2_psi_repr" , N2_TYPE }, // 60
+ { INVALID_RING_OFFSET , "invalid" , N2_TYPE }, // 60
{ INVALID_RING_OFFSET , "invalid" , N2_TYPE }, // 61
{ N3::n3_fure , "n3_fure" , N3_TYPE }, // 62
{ N3::n3_gptr , "n3_gptr" , N3_TYPE }, // 63
@@ -834,7 +832,7 @@ static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{ MC::mc_pll_bndy_bucket_5 , "mc_pll_bndy_bucket_5" , MC_TYPE }, // 111
{ MC::mc_pll_func , "mc_pll_func" , MC_TYPE }, // 112
{ MC::mc_repr , "mc_repr" , MC_TYPE }, // 113
- { MC::mc_iom01_repr , "mc_iom01_repr" , MC_TYPE }, // 114
+ { INVALID_RING_OFFSET , "invalid" , MC_TYPE }, // 114
{ MC::mc_iom23_repr , "mc_iom23_repr" , MC_TYPE }, // 115
{ OB0::ob0_pll_bndy , "ob0_pll_bndy" , OB0_TYPE }, // 116
{ OB0::ob0_pll_bndy_bucket_1 , "ob0_pll_bndy_bucket_1" , OB0_TYPE }, // 117
@@ -1043,7 +1041,7 @@ static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{ N2::n2_psi_time , N2_TYPE }, // 57
{ N2::n2_repr , N2_TYPE }, // 58
{ N2::n2_cxa1_repr , N2_TYPE }, // 59
- { N2::n2_psi_repr , N2_TYPE }, // 60
+ { INVALID_RING_OFFSET , N2_TYPE }, // 60
{ INVALID_RING_OFFSET , N2_TYPE }, // 61
{ N3::n3_fure , N3_TYPE }, // 62
{ N3::n3_gptr , N3_TYPE }, // 63
@@ -1097,7 +1095,7 @@ static const RingProperties_t RING_PROPERTIES[NUM_RING_IDS] =
{ MC::mc_pll_bndy_bucket_5 , MC_TYPE }, // 111
{ MC::mc_pll_func , MC_TYPE }, // 112
{ MC::mc_repr , MC_TYPE }, // 113
- { MC::mc_iom01_repr , MC_TYPE }, // 114
+ { INVALID_RING_OFFSET , MC_TYPE }, // 114
{ MC::mc_iom23_repr , MC_TYPE }, // 115
{ OB0::ob0_pll_bndy , OB0_TYPE }, // 116
{ OB0::ob0_pll_bndy_bucket_1 , OB0_TYPE }, // 117
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
index 5bef6a919..607f19822 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_id.h
@@ -110,8 +110,7 @@ enum RingID
n2_psi_time = 57, //0x39
n2_repr = 58, //0x3A
n2_cxa1_repr = 59, //0x3B
- n2_psi_repr = 60, //0x3C
- // values 61 unused
+ // values 60-61 unused
// Nest Chiplet Rings - N3
n3_fure = 62, //0x3E
@@ -177,8 +176,8 @@ enum RingID
// MC Chiplet Rings
// MC01 and MC23 instance specific Rings
mc_repr = 113, //0x71
- mc_iom01_repr = 114, //0x72
- mc_iom23_repr = 115, //0x73
+ // value 114 unused
+ mc_iom23_repr = 115, //0c73
// OB0 Chiplet Rings
ob0_pll_bndy = 116, //0x74
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
index b5400a282..e47f565b8 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -143,6 +143,7 @@ const RingIdList RING_ID_LIST_PDR[] =
{"xb_io1_repr", xb_io1_repr, 0x06, 0x06, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
{"xb_io2_repr", xb_io2_repr, 0x06, 0x06, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
{"mc_repr", mc_repr, 0x07, 0x08, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
+ {"mc_iom23_repr", mc_iom23_repr, 0x07, 0x08, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
{"ob0_repr", ob0_repr, 0x09, 0x09, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
{"ob1_repr", ob1_repr, 0x0A, 0x0A, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
{"ob2_repr", ob2_repr, 0x0B, 0x0B, VPD_KEYWORD_PDR, VPD_RING_CLASS_NEST},
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