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author | Brian Silver <bsilver@us.ibm.com> | 2016-04-05 14:43:41 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-06 14:58:20 -0400 |
commit | f0e376bdc61947f830fc03c47cf85a28adc3c6f6 (patch) | |
tree | 86431807be216dc40b9430a1c3926488a01ad39a /src/import/chips/p9/procedures | |
parent | a10a644a43132f4435c25039fa669e949b8a91dd (diff) | |
download | talos-hostboot-f0e376bdc61947f830fc03c47cf85a28adc3c6f6.tar.gz talos-hostboot-f0e376bdc61947f830fc03c47cf85a28adc3c6f6.zip |
Add L2 p9_mss_scrub
Change inversion so in sim we run with inversion off
Change address counting mode to be disabled by default
Remove ATTR_MCBIST attributes
Change-Id: Ica45fc68f33d8203bd43d69c31f1671a041103b3
Original-Change-Id: I233851de5186e053df0b5a4b25eee42763b35755
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22914
Tested-by: Jenkins Server
Tested-by: Hostboot CI
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23972
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | 348 |
1 files changed, 0 insertions, 348 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 5bcffcb8e..82f9b6d41 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -19,225 +19,6 @@ <attributes> <attribute> - <id>ATTR_MCBIST_ADDR_MODES</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Can choose mcbist address mode for full,half or quarter addressing mode.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_modes</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_RANK</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description></description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_rank</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_START_ADDR</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Defines the start address for the Mcbist address range</description> - <valueType>uint64</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_start_addr</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_END_ADDR</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Defines the end address for the Mcbist address range</description> - <valueType>uint64</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_end_addr</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ERROR_CAPTURE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Enables error capture; basically a flag.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_error_capture</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_MAX_TIMEOUT</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Define mcbist Max timeout</description> - <valueType>uint64</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_max_timeout</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_PRINT_PORT</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Enable which port prints are required.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_print_port</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_STOP_ON_ERROR</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Flag to stop Mcbist on Error.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_stop_on_error</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_DATA_SEED</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Define data seed for the random data pattern or test</description> - <valueType>uint32</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_data_seed</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_INTER</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - The address interleave map with user cases or deafult cases of - BANK_RANK,RANK_BANK,BANK_ONLY,RANK_ONLYRANKS_DIMM0,RANKS_DIMM1,USER_PATTERN. - </description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_inter</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_NUM_ROWS</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>User defined constraint for limiting number of rows for addressing.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_num_rows</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_NUM_COLS</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>User defined constraint for limiting number of columns for addressing.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_num_cols</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_RANK</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>User defined constraint for limiting number of ranks for addressing.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_rank</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_BANK</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>User defined constraint for limiting number of banks for addressing.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_bank</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_BANK_GROUP</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description>User defined constraint for limiting number of bank groups for addressing.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssUnits>count of groups</mssUnits> - <mssAccessorName>mcbist_addr_bank_group</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_SLAVE_RANK_ON</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>If slave ranks exists;Restrict usage or enable addressing on them as well.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_slave_rank_on</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_STR_MAP</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>To Define custom addressing map ; Input by user.</description> - <valueType>uint64</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_str_map</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_ADDR_RAND</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Flag for Addressing to go sequential manner or random.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <array>2</array> - <mssAccessorName>mcbist_addr_rand</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_MEMB_TP_BNDY_PLL_DATA</id> <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> <description> @@ -4038,95 +3819,6 @@ </attribute> <attribute> - <id>ATTR_MCBIST_PATTERN</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Enables mcbist data pattern selection.</description> - <valueType>uint32</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_pattern</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_WRITE_DATA</id> - <targetType>TARGET_TYPE_MCBIST</targetType> - <description>Define mcbist data for writing</description> - <valueType>uint64</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <mssAccessorName>mcbist_write_data</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_TEST_TYPE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Enables mcbist test type selection.</description> - <valueType>uint32</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_test_type</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_PRINTING_DISABLE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>MCBIST support for printing</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_printing_disable</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_DATA_ENABLE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>MCBIST support for enabling data</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_data_enable</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_USER_RANK</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>MCBIST support for rank selection</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_user_rank</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_USER_BANK</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>MCBIST support for bank selection</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_user_bank</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_SCHMOO_MULTIPLE_SETUP_CALL</id> <!-- P8 MBA level information --> <targetType>TARGET_TYPE_MCS</targetType> @@ -4248,46 +3940,6 @@ </attribute> <attribute> - <id>ATTR_MCBIST_RANDOM_SEED_VALUE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Controls the MCBIST engine in the centaur chip. The value will be set in mss_eff_config_shmoo.</description> - <valueType>uint32</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_random_seed_value</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MCBIST_RANDOM_SEED_TYPE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Controls the MCBIST engine in the centaur chip. The value will be set in mss_eff_config_shmoo.</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - <mssAccessorName>mcbist_random_seed_type</mssAccessorName> - </attribute> - - <attribute> - <id> ATTR_MCBIST_DDR4_PDA_ENABLE</id> - <!-- P8 MBA level information --> - <targetType>TARGET_TYPE_MCS</targetType> - <description>Controls PDA train enable or PBA. 00 - Disable; 01 - PDA; 02 - PBA(Lrdimm)</description> - <valueType>uint8</valueType> - <writeable/> - <odmVisable/> - <odmChangeable/> - <array>2</array> - - <mssAccessorName> mcbist_ddr4_pda_enable</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_MSS_INIT_STATE</id> <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> <description>How far into the ipl istep the centaur has been brought up</description> |