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author | Stephen Glancy <sglancy@us.ibm.com> | 2019-12-10 15:23:01 -0500 |
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committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2020-01-03 13:51:17 -0600 |
commit | 9431cc09d57da8735bbab21e4f534bb867873a4f (patch) | |
tree | 8ba255239c784ef40984fbceb26107493e9a5529 /src/import/chips/p9/procedures | |
parent | e22bb40fb9c10482e7ea659cc46dd35cad8bb149 (diff) | |
download | talos-hostboot-9431cc09d57da8735bbab21e4f534bb867873a4f.tar.gz talos-hostboot-9431cc09d57da8735bbab21e4f534bb867873a4f.zip |
Fixes MCBIST lab random addressing bug
Change-Id: I580e8485bc5980139cf2052bbde748d99d7cb541
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88387
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88406
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C | 43 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H | 5 |
2 files changed, 48 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C index 1b38ed539..f002b31e9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C @@ -82,6 +82,49 @@ const std::vector< mss::mcbist::op_type > mcbistTraits<>::FIFO_MODE_REQUIRED_OP_ mss::mcbist::op_type::READ_READ_WRITE , }; +// These valus are pulled out of the MCBIST specification +// The index is the fixed width - the value is the LFSR_MASK value to be used +const std::vector< uint64_t > mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST>::LFSR_MASK_VALUES = +{ + 0x000000031, + 0x00000001F, + 0x001000000, + 0x100000000, + 0x004000003, + 0x000080000, + 0x040000018, + 0x008000000, + 0x010006000, + 0x004000000, + 0x001000000, + 0x003200000, + 0x001880000, + 0x000200000, + 0x000610000, + 0x000100000, + 0x000040000, + 0x000010000, + 0x000023000, + 0x000002000, + 0x000000400, + 0x000002000, + 0x000005008, + 0x000002000, + 0x000001088, + 0x000000B00, + 0x0000004A0, + 0x000000100, + 0x000000040, + 0x000000010, + 0x000000038, + 0x000000008, + 0x000000010, + 0x000000004, + 0x000000004, + 0x000000002, + 0x000000001, +}; + namespace mcbist { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H index 2a576acc8..51d721ecb 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H @@ -243,6 +243,8 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> static constexpr uint64_t MCBAMR1A0Q_REG = MCBIST_MCBAMR1A0Q; static constexpr uint64_t MCBAMR2A0Q_REG = MCBIST_MCBAMR2A0Q; static constexpr uint64_t MCBAMR3A0Q_REG = MCBIST_MCBAMR3A0Q; + static constexpr uint64_t LFSR_REG = MCBIST_MCBLFSRA0Q; + static const std::vector<uint64_t> LFSR_MASK_VALUES; // MCBIST FIR registers static constexpr uint64_t MCBFIRMASK_REG = MCBIST_MCBISTFIRMASK; @@ -468,6 +470,9 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> CFG_AMAP_COL2 = MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2, CFG_AMAP_COL2_LEN = MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2_LEN, + LFSR_MASK = MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0, + LFSR_MASK_LEN = MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN, + CFG_DATA_ROT_SEED1 = MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED, CFG_DATA_ROT_SEED1_LEN = MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN, CFG_DATA_ROT = MCBIST_MCBDRCRQ_CFG_DATA_ROT, |