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author | Richard J. Knight <rjknight@us.ibm.com> | 2016-07-26 14:28:54 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-06 22:11:17 -0400 |
commit | 911388b05fc3b577ef82eea689f76d63e6aecabe (patch) | |
tree | aa808a85e1b0e75271299e342dae49923e16fb5f /src/import/chips/p9/procedures | |
parent | f5d53757fabb36a84abb75c2f97b66a7429f134b (diff) | |
download | talos-hostboot-911388b05fc3b577ef82eea689f76d63e6aecabe.tar.gz talos-hostboot-911388b05fc3b577ef82eea689f76d63e6aecabe.zip |
Add sbeError tag to all SBE related error xml files
Change-Id: I990940cad75b04131a25ddd1a0aac9dfc10ecf65
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27463
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27569
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
8 files changed, 36 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml index 8c2799505..d9109fca3 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_adu_errors.xml @@ -25,6 +25,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_ADU_COHERENT_UTILS_INVALID_ARGS</rc> <description> Procedure: p9_adu_coherent_utils @@ -35,6 +36,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_ADU_COHERENT_UTILS_RESET_ERR</rc> <description> Procedure: p9_adu_coherent_utils @@ -44,6 +46,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_ADU_FBC_NOT_INITIALIZED_ERR</rc> <description> Procedure: p9_adu_coherent_utils @@ -55,6 +58,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc> RC_P9_ADU_STATUS_REG_ERR</rc> <description> Procedure: p9_adu_coherent_utils diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml index 75755d472..590f782ee 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_indir_access_errors.xml @@ -26,6 +26,7 @@ <hwpErrors> <!-- ******************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PM_OCB_PUT_NO_DATA_ERROR</rc> <description> No data passed for Put operation. @@ -33,6 +34,7 @@ </hwpError> <!-- ******************************************************************* --> <hwpError> + <sbeError/> <rc>RC_PM_OCB_PUT_DATA_POLL_NOT_FULL_ERROR</rc> <description> Indicates that a timeout occured waiting for a push queue to be non-full diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml index faf226a00..4c42b41be 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_ocb_init_errors.xml @@ -26,6 +26,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_PM_OCBINIT_BAD_MODE</rc> <description>Unknown mode passed to p9_pm_ocb_init. </description> @@ -33,6 +34,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_PM_OCBINIT_BAD_Q_LENGTH_PARM</rc> <description>Bad Queue Length Passed to p9_pm_ocb_init. </description> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml index e08b9acce..6acca8447 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_ram_errors.xml @@ -26,6 +26,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SPR_NAME_MAP_INIT_ERR</rc> <description> SPR name map is not empty while try to initialize @@ -37,6 +38,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SPR_NAME_MAP_ACCESS_ERR</rc> <description> Illegal SPR name or read/write mode access @@ -49,6 +51,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_NOT_SETUP_ERR</rc> <description> RAM is not setup as active before doing ram or cleanup @@ -60,6 +63,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_THREAD_NOT_STOP_ERR</rc> <description> The thread to perform ramming is not stopped @@ -72,6 +76,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_THREAD_INACTIVE_ERR</rc> <description> The thread to perform ramming is not active @@ -84,6 +89,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_STATUS_IN_RECOVERY_ERR</rc> <description> Attempt to perform ramming during recovery @@ -95,6 +101,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_STATUS_EXCEPTION_ERR</rc> <description> Exception or interrupt happened during ramming @@ -106,6 +113,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_STATUS_POLL_THRESHOLD_ERR</rc> <description> Polling for ram done reached threshold @@ -117,6 +125,7 @@ </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_RAM_INVALID_REG_TYPE_ACCESS_ERR</rc> <description> Illegal reg type access diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml index 0a641ffa4..09d8141b7 100755 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml @@ -26,6 +26,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_CHIPLET_PLL_INITF_INVALID_CHIPLET</rc> <description>Unsupported/unexpected pervasive chiplet instance</description> <ffdc>TARGET</ffdc> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml index 12844f4fe..419976835 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_common_errors.xml @@ -29,52 +29,61 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_ARY_ERR</rc> <description>ary_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_ARY</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NSL_ERR</rc> <description>nsl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_NSL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_SL_ERR</rc> <description>sl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_SL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CPLT_NOT_ALIGNED_ERR</rc> <description>Chiplet not aligned</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_CPLT_OPCG_DONE_NOT_SET_ERR</rc> <description>Chiplet OPCG_DONE not set after clock start/stop command</description> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_ARY_ERR</rc> <description>ary_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_ARY</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_NSL_ERR</rc> <description>nsl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_NSL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_NEST_SL_ERR</rc> <description>sl_thold status not matching the expected value in clock start stop sequence</description> <ffdc>READ_CLK_SL</ffdc> </hwpError> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_READ_ALL_CHECKSTOP_ERR</rc> <description>Read and or all Checkstop error</description> <ffdc>READ_ALL_CHECKSTOP</ffdc> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml index a93c9c992..60adc8dac 100755 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_initf_errors.xml @@ -26,6 +26,7 @@ <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <sbeError/> <rc>RC_P9_SBE_NPLL_INITF_UNSUPPORTED_BUCKET</rc> <description>Unsupported Nest PLL bucket value</description> <ffdc>TARGET</ffdc> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml index f5d62b536..eae637806 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml @@ -27,6 +27,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_SRESET_PRE_FAIL</rc> <description>SReset command precondition not met: Not all threads are running.</description> <ffdc>CORE_TARGET</ffdc> @@ -39,6 +40,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_SRESET_FAIL</rc> <ffdc>CORE_TARGET</ffdc> <ffdc>THREAD</ffdc> @@ -61,6 +63,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_START_PRE_NOMAINT</rc> <description>Start command precondition not met: RAS STAT Maintenance bit is not set.</description> <ffdc>CORE_TARGET</ffdc> @@ -73,6 +76,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_START_FAIL</rc> <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description> <ffdc>CORE_TARGET</ffdc> @@ -85,6 +89,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING</rc> <description>Stop command precondition not met: Not all threads are running.</description> <ffdc>CORE_TARGET</ffdc> @@ -97,6 +102,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STOP_FAIL</rc> <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description> <ffdc>CORE_TARGET</ffdc> @@ -109,6 +115,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STEP_PRE_NOTSTOPPING</rc> <description>Step command precondition not met: Not all threads are stopped.</description> <ffdc>CORE_TARGET</ffdc> @@ -121,6 +128,7 @@ <!-- ********************************************************************* --> <hwpError> + <sbeError/> <rc>RC_P9_THREAD_CONTROL_STEP_FAIL</rc> <description>Step command issued to core PC, but RAS STAT run bit is still set.</description> <ffdc>CORE_TARGET</ffdc> |