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author | Joe McGill <jmcgill@us.ibm.com> | 2017-03-15 13:13:54 -0500 |
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committer | Dean Sanner <dsanner@us.ibm.com> | 2017-03-16 07:34:31 -0400 |
commit | 7270032beb560076eba4d4c8e1982dd04354f8a3 (patch) | |
tree | 8d97fc424a216da34ccfabb1205ac100b43fc573 /src/import/chips/p9/procedures | |
parent | 66da3c579552d7a2268bd3a8280e6bd595863aeb (diff) | |
download | talos-hostboot-7270032beb560076eba4d4c8e1982dd04354f8a3.tar.gz talos-hostboot-7270032beb560076eba4d4c8e1982dd04354f8a3.zip |
p9_rng_init_phase2 -- skip self test fail status based on HW403701
Change-Id: I10de04e3824c3b9d1928bc75b5823c872314046f
CQ: SW383613
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37986
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37987
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_rng_init_phase2.C | 30 |
1 files changed, 21 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_rng_init_phase2.C b/src/import/chips/p9/procedures/hwp/nest/p9_rng_init_phase2.C index 5503a685b..056edadc9 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_rng_init_phase2.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_rng_init_phase2.C @@ -72,22 +72,34 @@ p9_rng_init_phase2(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) uint64_t l_base_addr_nm1; uint64_t l_base_addr_m; uint64_t l_base_addr_mmio; + uint8_t l_HW403701; // 5. RNG is allowed to run for M cycles (M = enough time to complete init; recommend 1 second of time). // NOTE: accomplished by delay in execution time between phase1/phase2 HWPs - // 6. Host boot checks RNG fail bits again and if a fail is detected then RNG is declared broken - // get the self test hard fail status in RNG CFG register + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW403701, i_target, l_HW403701), + "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_HW403701)"); + FAPI_TRY(fapi2::getScom(i_target, PU_NX_RNG_CFG, l_rng_cfg_data), "Error from getScom (NX RNG Status and Control Register)"); - // exit if failure is reported in self test hard fail status field - l_rng_cfg_data.extractToRight<PU_NX_RNG_CFG_FAIL_REG, PU_NX_RNG_CFG_FAIL_REG_LEN>(l_rng_cfg_self_test_hard_fail_status); - FAPI_ASSERT(!l_rng_cfg_self_test_hard_fail_status, - fapi2::P9_RNG_INIT_SELF_TEST_FAILED_ERR(). - set_TARGET(i_target). - set_SELF_TEST_HARD_FAIL_STATUS(l_rng_cfg_self_test_hard_fail_status), - "Self test hard fail status indicates failure"); + if (!l_HW403701) + { + // 6. Host boot checks RNG fail bits again and if a fail is detected then RNG is declared broken + + FAPI_DBG("Checking RNG fail status..."); + // exit if failure is reported in self test hard fail status field + l_rng_cfg_data.extractToRight<PU_NX_RNG_CFG_FAIL_REG, PU_NX_RNG_CFG_FAIL_REG_LEN>(l_rng_cfg_self_test_hard_fail_status); + FAPI_ASSERT(!l_rng_cfg_self_test_hard_fail_status, + fapi2::P9_RNG_INIT_SELF_TEST_FAILED_ERR(). + set_TARGET(i_target). + set_SELF_TEST_HARD_FAIL_STATUS(l_rng_cfg_self_test_hard_fail_status), + "Self test hard fail status indicates failure"); + } + else + { + FAPI_DBG("Skipping check of RNG fail status..."); + } // 7. Host boot maps RNG BARs (see Section 5.31 RNG BAR on page 185). // • NX RNG BAR (not mapped/enabled if RNG is broken) |