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| author | Dean Sanner <dsanner@us.ibm.com> | 2016-10-20 19:28:49 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-11-01 23:29:16 -0400 |
| commit | 6ae28349bf7658efece45325f27e802a19ec308b (patch) | |
| tree | eb466b5f76f4ba89e864f5cebfeb8cf3b67ed08c /src/import/chips/p9/procedures | |
| parent | a24db5026788dc78cd608885815cbc70268844ae (diff) | |
| download | talos-hostboot-6ae28349bf7658efece45325f27e802a19ec308b.tar.gz talos-hostboot-6ae28349bf7658efece45325f27e802a19ec308b.zip | |
Change HCODE image build to use ATTR instead of scom
Remove HW dependancy in p9_hcode_image_build and use
ATTR instead
Change-Id: I97e9641af2e2f73e5691a975ed885496f89b941e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31593
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31594
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C | 6 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_hcode_image_build_attributes.xml | 12 |
2 files changed, 14 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C index 097d87a61..99bbaf5d7 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C @@ -1540,10 +1540,8 @@ extern "C" // copy sections pertaining to CME FAPI_INF("CPMR / CME building"); uint64_t cpmrPhyAdd = 0; - fapi2::buffer<uint64_t> regData; - regData.flush<0>(); - FAPI_TRY(getScom(i_procTgt, PU_PBABAR0, regData )); - regData.extract<0, 64>(cpmrPhyAdd); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_HOMER_PHYS_ADDR, i_procTgt, cpmrPhyAdd ), + "Error from FAPI_ATTR_GET for ATTR_HOMER_PHYS_ADDR"); FAPI_DBG("HOMER base address 0x%016lX", cpmrPhyAdd ); ppeImgRc = buildCmeImage( i_pImageIn, pChipHomer, i_imgType, cpmrPhyAdd ); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_hcode_image_build_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_hcode_image_build_attributes.xml index 5925861f6..0e2f43903 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_hcode_image_build_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_hcode_image_build_attributes.xml @@ -37,4 +37,16 @@ <enum> CORE_UNFUSED = 0x0, CORE_FUSED = 0x1 </enum> <platInit/> </attribute> + +<attribute> + <id>ATTR_HOMER_PHYS_ADDR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Physical real address of the HOMER image for this chip. Used to + tell the CME where this HOMER image will be placed. Must be + aligned to a 4MB boundary + </description> + <valueType>uint64</valueType> + <platInit/> +</attribute> </attributes> |
