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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2016-03-03 13:46:33 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-09-04 13:05:13 -0400
commit684b661e19515e901382455d3d9051b4c60b04d7 (patch)
tree49d20cf3829fe1ffccdb0f0f453a9bb6c645fe43 /src/import/chips/p9/procedures
parentc4adc0d7fa0cf5c105dfcac3785ec29e574c9df6 (diff)
downloadtalos-hostboot-684b661e19515e901382455d3d9051b4c60b04d7.tar.gz
talos-hostboot-684b661e19515e901382455d3d9051b4c60b04d7.zip
Tod init and tod setup L2 procedures
Change-Id: Ia5497a819a11d500436d5bced1609881642288e3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21670 Tested-by: Hostboot CI Tested-by: PPE CI Tested-by: Jenkins Server Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22758 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_tod_init.C170
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_tod_init.H37
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.C245
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.H84
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.mk28
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_tod_errors.xml110
6 files changed, 649 insertions, 25 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.C b/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.C
index 553367ef0..34cb1c384 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.C
@@ -31,34 +31,174 @@
// *HWP HWP Owner Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 1
+// *HWP Level: 2
// *HWP Consumed by: SBE
//
//--------------------------------------------------------------------------
-
-//--------------------------------------------------------------------------
+//------------------------------------------------------------------------------
// Includes
-//--------------------------------------------------------------------------
+//------------------------------------------------------------------------------
#include <p9_tod_init.H>
-extern "C" {
+extern "C"
+{
-//--------------------------------------------------------------------------
-// HWP entry point
-//--------------------------------------------------------------------------
- fapi2::ReturnCode p9_tod_init(
- const tod_topology_node* i_tod_node,
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_target)
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+ //---------------------------------------------------------------------------------
+ // NOTE: description in header
+ //---------------------------------------------------------------------------------
+ fapi2::ReturnCode p9_tod_init(const tod_topology_node* i_tod_node,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_failingTodProc )
{
- // mark HWP entry
- FAPI_DBG("Entering ...\n");
+ FAPI_DBG("Start");
+ FAPI_TRY(p9_tod_clear_error_reg(i_tod_node), "Failure clearing TOD error registers!");
- /*fapi_try_exit:*/
+ //Start configuring each node; (init_tod_node will recurse on each child)
+ FAPI_TRY(init_tod_node(i_tod_node, i_failingTodProc), "Failure initializing TOD!");
+
+ fapi_try_exit:
FAPI_DBG("Exiting...");
return fapi2::current_err;
}
-} // extern "C"
+ //------------------------------------------------------------------------------
+ /// @brief p9_tod_clear_error_reg
+ /// @param[in] i_tod_node => Reference to TOD topology (FAPI targets included within)
+ /// @return FAPI_RC_SUCCESS if every TOD node is cleared of errors
+ /// else FAPI or ECMD error is sent through
+ //------------------------------------------------------------------------------
+ fapi2::ReturnCode p9_tod_clear_error_reg(const tod_topology_node* i_tod_node)
+ {
+ fapi2::buffer<uint64_t> data;
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* target = i_tod_node->i_target;
+
+ FAPI_DBG("Start");
+
+ FAPI_DBG("Clear any previous errors from PERV_TOD_ERROR_REG");
+ data.flush<1>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_ERROR_REG, data), "Could not write PERV_TOD_ERROR_REG.");
+
+ for (std::list<tod_topology_node*>::const_iterator child = (i_tod_node->i_children).begin();
+ child != (i_tod_node->i_children).end();
+ ++child)
+ {
+ tod_topology_node* tod_node = *child;
+ FAPI_TRY(p9_tod_clear_error_reg(tod_node), "Failure clearing errors from downstream node!");
+ }
+
+ fapi_try_exit:
+ FAPI_DBG("Exiting...");
+ return fapi2::current_err;
+ }
+
+ //---------------------------------------------------------------------------------
+ // NOTE: description in header
+ //---------------------------------------------------------------------------------
+ fapi2::ReturnCode init_tod_node(const tod_topology_node* i_tod_node,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_failingTodProc)
+ {
+ fapi2::ReturnCode rc;
+ fapi2::buffer<uint64_t> data;
+ uint32_t tod_init_pending_count = 0; // Timeout counter for bits that are cleared by hardware
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* target = i_tod_node->i_target;
+
+ FAPI_DBG("Start");
+
+ const bool is_mdmt = (i_tod_node->i_tod_master && i_tod_node->i_drawer_master);
+
+ if (is_mdmt)
+ {
+ FAPI_DBG("Master: Chip TOD step checkers enable");
+ data.flush<0>().setBit<0>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_TX_TTYPE_2_REG, data), "Could not write PERV_TOD_TX_TTYPE_2_REG.");
+ FAPI_DBG("Master: switch local Chip TOD to 'Not Set' state");
+ data.flush<0>().setBit<PERV_TOD_LOAD_TOD_MOD_REG_FSM_TRIGGER>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_LOAD_TOD_MOD_REG, data), "Master: Could not write PERV_TOD_LOAD_TOD_MOD_REG");
+
+ FAPI_DBG("Master: switch all Chip TOD in the system to 'Not Set' state");
+ data.flush<0>().setBit<0>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_TX_TTYPE_5_REG, data), "Master: Could not write PERV_TOD_TX_TTYPE_5_REG");
+
+ FAPI_DBG("Master: Chip TOD load value (move TB to TOD)");
+ data.flush<0>();
+ data.insertFromRight(0x00000000, 0, 32);
+ data.insertFromRight(0x3FFE, 50, 13); // bits 50:62 must be 1s
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_LOAD_TOD_REG, data), "Master: Could not write PERV_TOD_LOAD_TOD_REG");
+
+ FAPI_DBG("Master: Chip TOD start_tod (switch local Chip TOD to 'Running' state)");
+ data.flush<0>().setBit<PERV_TOD_START_TOD_REG_FSM_TRIGGER>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_START_TOD_REG, data), "Master: Could not write PERV_TOD_START_TOD_REG");
+
+ FAPI_DBG("Master: Send local Chip TOD value to all Chip TODs");
+ data.flush<0>().setBit<0>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_TX_TTYPE_4_REG, data), "Master: Could not write PERV_TOD_TX_TTYPE_4_REG");
+ }
+
+ FAPI_DBG("Check TOD is Running");
+ tod_init_pending_count = 0;
+
+ while (tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_DBG("Waiting for TOD to assert TOD_FSM_REG_TOD_IS_RUNNING...");
+
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(fapi2::getScom(*target, PERV_TOD_FSM_REG, data), "Could not retrieve PERV_TOD_FSM_REG");
+
+ if (data.getBit<PERV_TOD_FSM_REG_IS_RUNNING>())
+ {
+ FAPI_DBG("TOD is running!");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT((tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT),
+ fapi2::P9_TOD_INIT_NOT_RUNNING().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TOD is not running! (It should be)");
+
+ FAPI_DBG("clear TTYPE#2, TTYPE#4, and TTYPE#5 status");
+ data.flush<0>();
+ data.setBit<PERV_TOD_ERROR_REG_RX_TTYPE_2>();
+ data.setBit<PERV_TOD_ERROR_REG_RX_TTYPE_4>();
+ data.setBit<PERV_TOD_ERROR_REG_RX_TTYPE_5>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_ERROR_REG, data), "Could not write PERV_TOD_ERROR_REG.");
+
+ FAPI_DBG("checking for TOD errors");
+ FAPI_TRY(fapi2::getScom(*target, PERV_TOD_ERROR_REG, data), "Could not read PERV_TOD_ERROR_REG.");
+
+ FAPI_ASSERT((!data.getBit<PERV_TOD_ERROR_REG_M_PATH_0_STEP_CHECK>()),
+ fapi2::P9_TOD_INIT_M_PATH_0_STEP_CHECK_ERROR().set_TARGET(target).set_DATA(data),
+ "M_PATH_0_STEP_CHECK_ERROR!");
+ FAPI_ASSERT((!data.getBit<PERV_TOD_ERROR_REG_M_PATH_1_STEP_CHECK>()),
+ fapi2::P9_TOD_INIT_M_PATH_1_STEP_CHECK_ERROR().set_TARGET(target).set_DATA(data),
+ "M_PATH_1_STEP_CHECK_ERROR!");
+ FAPI_ASSERT((data == 0), fapi2::P9_TOD_INIT_ERROR().set_TARGET(target).set_DATA(data),
+ "FIR bit active!");
+
+ FAPI_DBG("set error mask to runtime configuration");
+ data.flush<0>();
+ data.insertFromRight(0x3F, 38, 6); // Mask TTYPE received informational bits 38:43
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_ERROR_MASK_REG, data), "Could not write PERV_TOD_ERROR_MASK_REG");
+
+ // Finish configuring downstream nodes
+ for (std::list<tod_topology_node*>::const_iterator child = (i_tod_node->i_children).begin();
+ child != (i_tod_node->i_children).end();
+ ++child)
+ {
+ tod_topology_node* tod_node = *child;
+ FAPI_TRY(init_tod_node(tod_node, i_failingTodProc), "Failure configuring downstream node!");
+ }
+
+ fapi_try_exit:
+ FAPI_DBG("Exiting...");
+ return fapi2::current_err;
+ }
+
+} // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.H b/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.H
index 72ef0c8e3..b38e5ef47 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_init.H
@@ -30,8 +30,8 @@
// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 1
-// *HWP Consumed by:
+// *HWP Level: 2
+// *HWP Consumed by: SBE
// ----------------------------------------------------------------------------------
//
// *! ADDITIONAL COMMENTS :
@@ -48,7 +48,7 @@
//-----------------------------------------------------------------------------------
#include <fapi2.H>
-#include "p9_tod_utils.H"
+#include <p9_tod_utils.H>
//-----------------------------------------------------------------------------------
// Structure definitions
@@ -69,13 +69,30 @@ extern "C" {
// Function prototype
//-----------------------------------------------------------------------------------
-/// @brief Initialized the TOD to 'running' state
-/// @param[in] i_tod_node => Reference to TOD topology (FAPI targets are included in this)
-/// @param[in] i_failingTodProc => Pointer to the fapi target, the memory location addressed by this parameter will be populated with processor target which is not able ot receive proper signals from OSC. Caller needs to look at this parameter only when p9_tod_init fail and reason code indicated OSC failure. Defaulted to NULL.
-/// @return FAPI_RC_SUCCESS if TOD topology is successfully initialized else FAPI or ECMD error is sent through
- fapi2::ReturnCode p9_tod_init(
- const tod_topology_node* i_tod_node,
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_target = NULL);
+ /// @brief Initialized the TOD to 'running' state
+ /// @param[in] i_tod_node => Pointer to TOD topology (FAPI targets are included in this)
+ /// @param[in] i_failingTodProc => Pointer to the fapi target, the memory location addressed by this parameter will be populated with processor target which is not able ot receive proper signals from OSC. Caller needs to look at this parameter only when p9_tod_init fail and reason code indicated OSC failure. Defaulted to NULL.
+ /// @return FAPI_RC_SUCCESS if TOD topology is successfully initialized else FAPI or ECMD error is sent through
+ fapi2::ReturnCode p9_tod_init(const tod_topology_node* i_tod_node,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_failingTodProc = NULL);
+
+ /// @brief Clears TOD error register
+ /// @param[in] i_tod_node => Pointer to TOD topology (FAPI targets included within)
+ /// @return FAPI_RC_SUCCESS if TOD topology is cleared of previous errors
+ /// else FAPI or ECMD error is sent through
+ fapi2::ReturnCode p9_tod_clear_error_reg(const tod_topology_node* i_tod_node);
+
+ /// @brief Helper function for p9_tod_init
+ /// @param[in] i_tod_node => Pointer to TOD topology (FAPI targets included within)
+ /// @param[in] i_failingTodProc => Pointer to the fapi target, the memory location
+ /// addressed by this parameter will be populated with processor target
+ /// which is not able to recieve proper singals from OSC.
+ /// Caller needs to look at this parameter only when proc_tod_init fails
+ /// and reason code indicates OSC failure. It is defaulted to NULL.
+ /// @return FAPI_RC_SUCCESS if TOD topology is successfully initialized
+ /// else FAPI or ECMD error is sent through
+ fapi2::ReturnCode init_tod_node(const tod_topology_node* i_tod_node,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_failingTodProc = NULL);
} //extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.C b/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.C
new file mode 100644
index 000000000..a994cdf12
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.C
@@ -0,0 +1,245 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//--------------------------------------------------------------------------
+//
+//
+/// @file p9_tod_move_tod_to_tb.C
+/// @brief Procedures to check if move_tod_to_tb works
+///
+// *HWP HWP Owner Christina Graves clgraves@us.ibm.com
+// *HWP FW Owner: Thi Tran thi@us.ibm.com
+// *HWP Team: Nest
+// *HWP Level: 2
+// *HWP Consumed by: None - this is a test for VBU
+//
+//--------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <p9_tod_move_tod_to_tb.H>
+
+extern "C"
+{
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+ //---------------------------------------------------------------------------------
+ // NOTE: description in header
+ //---------------------------------------------------------------------------------
+ fapi2::ReturnCode p9_tod_move_tod_to_tb(const tod_topology_node* i_tod_node, const uint8_t i_thread_num,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_failingTodProc )
+ {
+ fapi2::ReturnCode rc;
+ fapi2::buffer<uint64_t> data;
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* target = i_tod_node->i_target;
+ uint32_t tod_init_pending_count = 0; // Timeout counter for bits that are cleared by hardware
+ uint64_t tfmr_state = 0;
+ //bool is_mdmt = true;
+
+ FAPI_DBG("Start");
+ std::vector<fapi2::Target<fapi2::TARGET_TYPE_CORE>> l_cores = target->getChildren<fapi2::TARGET_TYPE_CORE>();
+ fapi2::Target<fapi2::TARGET_TYPE_CORE> coreTarget = l_cores[0];
+
+ //-------Timebase Setup--------------
+ //Read TFMR
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register");
+
+ //Update TFMR bit (00:15) Timebase settings according to processor frequency
+ data.insertFromRight((uint32_t)0xFF, TFMR_MAX_CYC_BET_STEPS, TFMR_MAX_CYC_BET_STEPS_LEN);
+ data.insertFromRight(TFMR_N_CLKS_PER_STEP_4CLK, TFMR_N_CLKS_PER_STEP, TFMR_N_CLKS_PER_STEP_LEN);
+ data.insertFromRight(TFMR_SYNC_BIT_SEL_16US, TFMR_SYNC_BIT_SEL, TFMR_SYNC_BIT_SEL_LEN);
+ data.setBit<TFMR_TB_ECLIPZ>();
+
+ FAPI_TRY(p9_tod_utils_set_tfmr_reg(coreTarget, i_thread_num, data),
+ "Could not write timebase settings according to processor frequency");
+
+ tod_init_pending_count = 0;
+
+ while(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register for polling");
+ data.extract(tfmr_state, TFMR_STATE_START_BIT, TFMR_STATE_NUM_BITS, 60);
+
+ if (tfmr_state == TFMR_STATE_TB_RESET)
+ {
+ FAPI_DBG("TFMR in TB_RESET state");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT,
+ fapi2::P9_TOD_INIT_TIMEOUT().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TFMR state machine did not go to reset in time!");
+
+
+ //-------Timebase load_tod_mode_tb(switch Timebase to "Not Set" state)
+ //Update TFMR bit (16) = b'1' load_tod_mod_tb. This prepares the time facility logic to accept a new value for the 64-bit Timebase
+ data.setBit<TFMR_LOAD_TOD_MOD_TB>();
+ FAPI_TRY(p9_tod_utils_set_tfmr_reg(coreTarget, i_thread_num, data), "Could not load_tod_mod_tb");
+
+ //Poll for TFMR bit (16) = b'0'. Hardware clears the bit when the operation is complete. A timeout is indicated by TFMR bit(54) = b'1'
+ tod_init_pending_count = 0;
+
+ while(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register for polling");
+ data.extract(tfmr_state, TFMR_STATE_START_BIT, TFMR_STATE_NUM_BITS, 60);
+
+ if (!data.getBit<TFMR_LOAD_TOD_MOD_TB>() && (tfmr_state == TFMR_STATE_TB_NOT_SET))
+ {
+ FAPI_DBG("TFMR_LOAD_TOD_MOD cleared.");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT,
+ fapi2::P9_TOD_INIT_TIMEOUT().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TFMR_LOAD_TOD_MOD did not clear in time!");
+
+ //-------TOD interrupt check----------------------
+ //Read TFMR and check for TFMR(51) = b'0'. This indicates no interrupt pending from the TOD which means no STEP errors were detected, and the external TOD oscillator is operating properly.
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register to check bit 51");
+ FAPI_ASSERT(!data.getBit<51>(), fapi2::P9_TOD_INIT_NOT_RUNNING(),
+ "STEP errors were detected or the external TOD oscillator is not operating properly");
+
+ //------Move TOD value to Timebase---------
+ //Update TFMR bit(18) = b'1' move_chip_tod_to_tb. This prepares the time facility logic to accept a new value after a SYNC boundary occurred
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR to move_chip_tod_to_tb");
+ data.setBit<TFMR_MOVE_CHIP_TOD_TO_TB>();
+ FAPI_TRY(p9_tod_utils_set_tfmr_reg(coreTarget, i_thread_num, data), "Could not write TFMR to mvoe chip_tod_to_tb");
+
+ tod_init_pending_count = 0;
+
+ while(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register for polling");
+ data.extract(tfmr_state, TFMR_STATE_START_BIT, TFMR_STATE_NUM_BITS, 60);
+
+ if (tfmr_state == TFMR_STATE_TB_SYNC_WAIT)
+ {
+ FAPI_DBG("TFMR in TB_SYNC_WAIT state");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT,
+ fapi2::P9_TOD_INIT_TIMEOUT().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TFMR state machine did not go to sync wait in time!");
+
+ tod_init_pending_count = 0;
+
+ while(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register for polling");
+ data.extract(tfmr_state, TFMR_STATE_START_BIT, TFMR_STATE_NUM_BITS, 60);
+
+ if (tfmr_state == TFMR_STATE_GET_TOD)
+ {
+ FAPI_DBG("TFMR in GET_TOD state");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT,
+ fapi2::P9_TOD_INIT_TIMEOUT().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TFMR state machine did not go to get_tod in time!");
+
+
+ //Write TOD_MOVE_TOD_TO_TB_REG(@0x17)[00]=b'1'(move TOD to Timebase). The TOD transfers the TOD value to the Timebase after a SYNC boundary occurred. Note that TOD_TX_TTYPE_CTRL_REG(@0x27)[24:31] needs to be configured before issuing a TOD transfer to Timebase.The address of the PIB slave targeted by the TOD PIB master is configured as 0xNN0126a1 where NN is the configurable slave address specified in TOD_TX_TTYPE_CTRL_REG(@0x27)[24:31].
+ // TODO: read PIR and set for each core
+ data.flush<0>();
+ /*data.insertFromRight(TOD_TX_TTYPE_CTRL_REG_TX_TTYPE_PIB_MST_ADDR_CFG_C5,
+ TOD_TX_TTYPE_CTRL_REG_TX_TTYPE_PIB_MST_ADDR_CFG, TOD_TX_TTYPE_CTRL_REG_TX_TTYPE_PIB_MST_ADDR_CFG_LEN);*/
+ data.insertFromRight(0x2E010AA310000000, 0, 64);
+ //data.setBit<25>().setBit<27>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_TX_TTYPE_CTRL_REG, data), "Could not write PERV_TOD_TX_TTYPE_CTRL_REG");
+
+ data.flush<0>();
+ data.setBit<0>();
+ FAPI_TRY(fapi2::putScom(*target, PERV_TOD_MOVE_TOD_TO_TB_REG, data), "Could not write TOD_MOVE_TOD_TO_TB_REG");
+
+ tod_init_pending_count = 0;
+
+ while(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR register for polling");
+ data.extract(tfmr_state, TFMR_STATE_START_BIT, TFMR_STATE_NUM_BITS, 60);
+
+ if (tfmr_state == TFMR_STATE_TB_RUNNING)
+ {
+ FAPI_DBG("TFMR in TB_RESET state");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT,
+ fapi2::P9_TOD_INIT_TIMEOUT().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TFMR state machine did not go to TB_RUNNING in time!");
+
+ tod_init_pending_count = 0;
+
+ //Poll for TFMR bit(18) = b'0'. Hardware clears the bit when the operation is complete.
+ while(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT)
+ {
+ FAPI_TRY(fapi2::delay(P9_TOD_UTILS_HW_NS_DELAY, P9_TOD_UTILS_SIM_CYCLE_DELAY), "fapiDelay error");
+ FAPI_TRY(p9_tod_utils_get_tfmr_reg(coreTarget, i_thread_num, data), "Could not read TFMR");
+
+ if (!data.getBit<TFMR_MOVE_CHIP_TOD_TO_TB>())
+ {
+ FAPI_DBG("TFMR_MOVE_CHIP_TOD_TO_TB cleared.");
+ break;
+ }
+
+ ++tod_init_pending_count;
+ }
+
+ FAPI_ASSERT(tod_init_pending_count < P9_TOD_UTIL_TIMEOUT_COUNT,
+ fapi2::P9_TOD_INIT_TIMEOUT().set_TARGET(target).set_COUNT(tod_init_pending_count),
+ "TFMR_MOVE_CHIP_TOD_TO_TB did not clear in time!");
+
+ fapi_try_exit:
+ FAPI_DBG("Exiting...");
+ return fapi2::current_err;
+ }
+
+} // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.H b/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.H
new file mode 100644
index 000000000..48d66fcea
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.H
@@ -0,0 +1,84 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//-----------------------------------------------------------------------------------
+//
+/// @file p9_tod_move_tod_to_tb.H
+/// @brief Procedures to initialize the TOD to 'running' state
+///
+// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP FW Owner: Thi Tran thi@us.ibm.com
+// *HWP Team: Nest
+// *HWP Level: 2
+// *HWP Consumed by:
+// ----------------------------------------------------------------------------------
+//
+// *! ADDITIONAL COMMENTS :
+// *!
+// *!
+// *!
+//-----------------------------------------------------------------------------------
+
+#ifndef _P9_TOD_MOVE_TOD_TO_TB_H_
+#define _P9_TOD_MOVE_TOD_TO_TB_H_
+
+//-----------------------------------------------------------------------------------
+// Includes
+//-----------------------------------------------------------------------------------
+
+#include <fapi2.H>
+#include <p9_tod_utils.H>
+
+//-----------------------------------------------------------------------------------
+// Structure definitions
+//-----------------------------------------------------------------------------------
+
+//function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode
+(*p9_tod_move_tod_to_tb_FP_t) (const tod_topology_node*, const uint8_t,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* );
+
+//-----------------------------------------------------------------------------------
+// Constant definitions
+//-----------------------------------------------------------------------------------
+
+extern "C" {
+
+//-----------------------------------------------------------------------------------
+// Function prototype
+//-----------------------------------------------------------------------------------
+
+ /// @brief move_tod_to_tb
+ /// @param[in] i_tod_node => Reference to TOD topology (FAPI targets are included in this)
+ /// @param[in] i_failingTodProc => Pointer to the fapi target, the memory location addressed by this parameter will be populated with processor target which is not able ot receive proper signals from OSC. Caller needs to look at this parameter only when p9_tod_move_tod_to_tb fail and reason code indicated OSC failure. Defaulted to NULL.
+ /// @param[in] i_thread_num => the thread number to complete the transaction on
+ /// @return FAPI_RC_SUCCESS if TOD topology is successfully initialized else FAPI or ECMD error is sent through
+ fapi2::ReturnCode p9_tod_move_tod_to_tb(const tod_topology_node* i_tod_node,
+ const uint8_t i_thread_num,
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>* i_failingTodProc = NULL);
+
+} //extern "C"
+
+#endif //_P9_TOD_MOVE_TOD_TO_TB_H_
+
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.mk b/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.mk
new file mode 100644
index 000000000..48a170630
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.mk
@@ -0,0 +1,28 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/import/chips/p9/procedures/hwp/nest/p9_tod_move_tod_to_tb.mk $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_tod_move_tod_to_tb
+OBJS+=p9_tod_utils.o
+$(call BUILD_PROCEDURE)
+
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_tod_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_tod_errors.xml
new file mode 100644
index 000000000..f574a5801
--- /dev/null
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_tod_errors.xml
@@ -0,0 +1,110 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_tod_errors.xml $ -->
+<!-- -->
+<!-- OpenPOWER HostBoot Project -->
+<!-- -->
+<!-- Contributors Listed Below - COPYRIGHT 2016 -->
+<!-- [+] International Business Machines Corp. -->
+<!-- -->
+<!-- -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
+<!-- you may not use this file except in compliance with the License. -->
+<!-- You may obtain a copy of the License at -->
+<!-- -->
+<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
+<!-- -->
+<!-- Unless required by applicable law or agreed to in writing, software -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
+<!-- implied. See the License for the specific language governing -->
+<!-- permissions and limitations under the License. -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
+<hwpErrors>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_SETUP_INVALID_NODE_DELAY</rc>
+ <description>
+ Procedure: p9_tod_setup
+ The delay is not between 0 and 255
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>DELAY</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_SETUP_INVALID_TOPOLOGY</rc>
+ <description>
+ Procedure: p9_tod_setup
+ Either the oscilattor that is selected is NONE or
+ the tx or rx bus is NONE
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>OSCSEL</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_INIT_NOT_RUNNING</rc>
+ <description>
+ Procedure: p9_tod_init
+ TOD never asserted that TOD_FSM_REG tod is running and there was a timeout
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>COUNT</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_INIT_M_PATH_0_STEP_CHECK_ERROR</rc>
+ <description>
+ Procedure: p9_tod_init
+ There is a master path 0 step check error so the bit was set
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>DATA</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_INIT_M_PATH_1_STEP_CHECK_ERROR</rc>
+ <description>
+ Procedure: p9_tod_init
+ There is a master path 1 step check error so the bit was set
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>DATA</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_INIT_ERROR</rc>
+ <description>
+ Procedure: p9_tod_init
+ There is some error set in the TOD_ERROR_REG, check DATA to see what
+ errors were set
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>DATA</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_TOD_INIT_TIMEOUT</rc>
+ <description>
+ Procedure: p9_tod_move_tod_to_tb
+ There is a timeout going from one state to another
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>COUNT</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_INVALID_THREAD_NUM</rc>
+ <description>
+ Procedure: p9_tod_utils
+ There is an invalid thread number
+ </description>
+ <ffdc>TARGET</ffdc>
+ <ffdc>THREADNUMBER</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+</hwpErrors>
+
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