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| author | Thi Tran <thi@us.ibm.com> | 2016-08-24 09:53:33 -0500 |
|---|---|---|
| committer | Stephen M. Cprek <smcprek@us.ibm.com> | 2016-08-25 12:39:24 -0400 |
| commit | 46aaef527c685d0869804b18fed7f81e29a66b5e (patch) | |
| tree | 75ced601cb67cbf25a78ba419d9c6c06b81f294e /src/import/chips/p9/procedures | |
| parent | 3549c1bedff0df384c522c08b0773e8511a9ef08 (diff) | |
| download | talos-hostboot-46aaef527c685d0869804b18fed7f81e29a66b5e.tar.gz talos-hostboot-46aaef527c685d0869804b18fed7f81e29a66b5e.zip | |
Fix hw/ekb master build break
Change-Id: I3875c19406a7fe860808603a7611c2b1640e6af1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28728
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28734
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C index 17a03ff34..b56e51b0d 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C @@ -156,8 +156,7 @@ p9_setup_bars_mcd(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, p9_setup_bars_addr_range l_nm_range[2]; p9_setup_bars_addr_range l_m_range; bool l_enable_mcd = false; - fapi2::ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING_Type l_mirror_ctl; - + fapi2::ATTR_MRW_HW_MIRRORING_ENABLE_Type l_mirror_ctl; // determine range of NM memory which MCD needs to cover on this chip { fapi2::ATTR_PROC_MEM_BASES_ACK_Type l_nm_bases; @@ -223,10 +222,10 @@ p9_setup_bars_mcd(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, } - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING, i_target_sys, l_mirror_ctl), - "Error from FAPI_ATTR_GET (ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING)"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MRW_HW_MIRRORING_ENABLE, i_target_sys, l_mirror_ctl), + "Error from FAPI_ATTR_GET (ATTR_MRW_HW_MIRRORING_ENABLE)"); - if (l_mirror_ctl == fapi2::ENUM_ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING_FALSE) + if (l_mirror_ctl == fapi2::ENUM_ATTR_MRW_HW_MIRRORING_ENABLE_TRUE) // determine range of M memory which MCD needs to cover on this chip { |
