Make p9_mpipl_chip_cleanup to be a no-op

In p8 we were required to disable and then re-enabled MCD_recovery
during the MPIPL because we were performing a checkstop, now that
we no long perform a checkstop there is no reason to disable
MCD_recovery, since it is never disabled this HWP is no invalid.
Leaving the shell here as a placeholder for future needed workarounds

Change-Id: I6288af4b0558c6c3712b0d801a6e0019a7fa399d
RTC:157653
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32438
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32450
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

2 files changed, 38 insertions, 25 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C b/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C
index 038b63a09..d6e156fe7 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C
@@ -34,9 +34,6 @@
 //
 //  Additional Note(s):
 //
-//   Checks to see if MCD recovery is already enabled by checking bit 0 of the
-//   even and odd MCD config registers, which is the recovery enable bit.
-//   If the bits are 0, then the procedure enables them to start MCD recovery
 //
 //
 //------------------------------------------------------------------------------
@@ -45,8 +42,6 @@
 // Includes
 //------------------------------------------------------------------------------
 #include <p9_mpipl_chip_cleanup.H>
-#include <p9_misc_scom_addresses.H>
-#include <p9_misc_scom_addresses_fld.H>
 
 extern "C"
 {
@@ -58,6 +53,23 @@ extern "C"
     // name: p9_mpipl_chip_cleanup
     //------------------------------------------------------------------------------
     // purpose:
+    // Place holder
+    //
+    //------------------------------------------------------------------------------
+    fapi2::ReturnCode p9_mpipl_chip_cleanup(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+    {
+        //This is currently a no-op , leaving it in as a placeholder.
+        return fapi2::current_err;
+    }
+
+
+//Commenting out the old functionality of this code. Was going to delete it but will
+//leave it here incase we need logic like this in the future for some reason
+#if 0
+    //------------------------------------------------------------------------------
+    // name: p9_mpipl_chip_cleanup (DEPRECATED)
+    //------------------------------------------------------------------------------
+    // purpose:
     // To enable MCD recovery
     //
     // Note: PHBs are left in ETU reset state after executing proc_mpipl_nest_cleanup, which runs before this procedure.  PHYP releases PHBs from ETU reset post HostBoot IPL.
@@ -92,9 +104,11 @@ extern "C"
         };
 
 
-        // HW386071:  INT unit has a defect that might result in fake ecc errors.  Have to do these four writes and reads to scom registers
-        FAPI_TRY(fapi2::putScom(i_target, PU_INT_VC_VSD_TABLE_ADDR, w_data),
-                 "putScom error selecting address 1");
+    HW386071:
+
+        INT unit has a defect that might result in fake ecc errors.  Have to do these four writes and reads to scom registers
+            FAPI_TRY(fapi2::putScom(i_target, PU_INT_VC_VSD_TABLE_ADDR, w_data),
+                     "putScom error selecting address 1");
 
         FAPI_TRY(fapi2::getScom(i_target, C_INT_VC_VSD_TABLE_DATA, r_data),
                  "getScom error reading from address 1");
@@ -106,31 +120,32 @@ extern "C"
         w_data.flush<0>();
         FAPI_TRY(fapi2::putScom(i_target, C_INT_VC_VSD_TABLE_DATA, w_data),
                  "putScom error writing to address 0");
-        // HW386071
+        HW386071
 
-        //Verify MCD recovery was previously disabled for even and odd slices
-        //If not, this is an error condition
+        Verify MCD recovery was previously disabled for even and odd slices
+        If not, this is an error condition
         for (uint8_t counter = 0; counter < MAX_MCD_DIRS; counter++)
-        {
-            FAPI_DBG("Verifying MCD %s Recovery is disabled", ARY_MCD_DIR_STRS[counter]);
-            FAPI_TRY(fapi2::getScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data[counter]),
-                     "getScom error veryfing that MCD recovery is disabled");
+            {
+                FAPI_DBG("Verifying MCD %s Recovery is disabled", ARY_MCD_DIR_STRS[counter]);
+                FAPI_TRY(fapi2::getScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data[counter]),
+                         "getScom error veryfing that MCD recovery is disabled");
 
 
-            FAPI_ASSERT(!fsi_data[counter].getBit<PU_BANK0_MCD_REC_ENABLE>(),
-                        fapi2::P9_MPIPL_CHIP_CLEANUP_MCD_NOT_DISABLED().set_TARGET(i_target).set_ADDRESS(
-                            ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter]).set_DATA(fsi_data[counter]), "MCD recovery not disabled as expected");
-        }
+                FAPI_ASSERT(!fsi_data[counter].getBit<PU_BANK0_MCD_REC_ENABLE>(),
+                            fapi2::P9_MPIPL_CHIP_CLEANUP_MCD_NOT_DISABLED().set_TARGET(i_target).set_ADDRESS(
+                                ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter]).set_DATA(fsi_data[counter]), "MCD recovery not disabled as expected");
+            }
+
+        Assert bit 0 of MCD Recovery Ctrl regs to enable MCD recovery
 
-        //Assert bit 0 of MCD Recovery Ctrl regs to enable MCD recovery
         for (int counter = 0; counter < MAX_MCD_DIRS; counter++)
         {
             FAPI_DBG("Enabling MCD %s Recovery", ARY_MCD_DIR_STRS[counter]);
 
-            //Assert bit 0 of MCD Even or Odd Recovery Control reg to enable recovery
+            Assert bit 0 of MCD Even or Odd Recovery Control reg to enable recovery
             fsi_data[counter].setBit<PU_BANK0_MCD_REC_ENABLE>();
 
-            //Write data to MCD Even or Odd Recovery Control reg
+            Write data to MCD Even or Odd Recovery Control reg
             FAPI_TRY(fapi2::putScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data[counter]),
                      "putScom error assert bit 0 of MCD recovery control register");
         }
@@ -140,7 +155,7 @@ extern "C"
         FAPI_DBG("Exiting...");
         return fapi2::current_err;
     }
-
+#endif
 
 
 } // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.H b/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.H
index 33a7bde3d..d462c4e89 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.H
@@ -57,9 +57,7 @@ typedef fapi2::ReturnCode (*p9_mpipl_chip_cleanup_FP_t) (fapi2::Target<fapi2::TA
 extern "C"
 {
     ///  @brief To enable MCD recovery
-
     ///  @param[in] 'i_target' Reference to processor chip target
-
     ///  @return FAPI_RC_SUCCESS if the mpipl_chip_cleanup completes successfully
     fapi2::ReturnCode p9_mpipl_chip_cleanup(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
 } //extern "C"