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| author | LiuYangFan <shliuyf@cn.ibm.com> | 2016-10-28 02:49:29 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-11-04 22:30:47 -0400 |
| commit | 14e5db03ce5f25a3fd6c69c5f7555d311e4c4e1f (patch) | |
| tree | ac3cae7aa6b06d9f16b522dd2462e2b3861cec40 /src/import/chips/p9/procedures | |
| parent | 188ebfe49375b350936f22c6530cf34428f7205f (diff) | |
| download | talos-hostboot-14e5db03ce5f25a3fd6c69c5f7555d311e4c4e1f.tar.gz talos-hostboot-14e5db03ce5f25a3fd6c69c5f7555d311e4c4e1f.zip | |
Fix ramming procedure issue
Change-Id: Iae4d922782c91240e8d004585b0e92c442a89b21
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31944
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31946
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C index 244c0490f..caf8c0981 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C @@ -193,7 +193,7 @@ fapi2::ReturnCode RamCore::ram_setup() //1.setup SPRC to use SCRO as SPRD l_data.flush<0>(); FAPI_TRY(fapi2::getScom(iv_target, C_SPR_MODE, l_data)); - FAPI_TRY(l_data.setBit(C_SPR_MODE_MODEREG_SPRC_LT0_SEL + iv_thread)); + l_data.insertFromRight<C_SPR_MODE_MODEREG_SPRC_LT0_SEL, 8>(0xFF); FAPI_TRY(fapi2::putScom(iv_target, C_SPR_MODE, l_data)); l_data.flush<0>(); FAPI_TRY(fapi2::getScom(iv_target, C_SCOMC, l_data)); @@ -243,7 +243,7 @@ fapi2::ReturnCode RamCore::ram_cleanup() // setup SPRC to use SCRO as SPRD FAPI_TRY(fapi2::getScom(iv_target, C_SPR_MODE, l_data)); - FAPI_TRY(l_data.setBit(C_SPR_MODE_MODEREG_SPRC_LT0_SEL + iv_thread)); + l_data.insertFromRight<C_SPR_MODE_MODEREG_SPRC_LT0_SEL, 8>(0xFF); FAPI_TRY(fapi2::putScom(iv_target, C_SPR_MODE, l_data)); l_data.flush<0>(); FAPI_TRY(fapi2::getScom(iv_target, C_SCOMC, l_data)); |
