diff options
| author | Brian Silver <bsilver@us.ibm.com> | 2016-08-22 08:44:42 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-24 23:45:46 -0400 |
| commit | e6059f6594051106f13391d2967ef7f37aa4ec29 (patch) | |
| tree | c4c66edfb8803d7598bfe3b671fb588114131156 /src/import/chips/p9/procedures/xml | |
| parent | 04b10dfde23c8c88e8036ac7f70bab8c308000fd (diff) | |
| download | talos-hostboot-e6059f6594051106f13391d2967ef7f37aa4ec29.tar.gz talos-hostboot-e6059f6594051106f13391d2967ef7f37aa4ec29.zip | |
Add f/w implementation of PHY duty cycle distortion cal
Change-Id: Ie15b5e674ed4285e8d76ca1583b9b1feaf120c3d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28605
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28606
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_ddr_phy_reset.xml | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_ddr_phy_reset.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_ddr_phy_reset.xml index e62924b6a..3a2489c60 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_ddr_phy_reset.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_ddr_phy_reset.xml @@ -465,4 +465,22 @@ </deconfigure> </hwpError> +<hwpError> + <rc>RC_MSS_DUTY_CLOCK_DISTORTION_CAL_FAILED</rc> + <description> + The ADR duty clock distortion calibration algorithm failed + </description> + <ffdc>CURRENT_ADJUST</ffdc> + <ffdc>SIDE</ffdc> + <ffdc>REGISTER</ffdc> + <ffdc>REGISTER_VALUE</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>TARGET</target> + </deconfigure> +</hwpError> + </hwpErrors> |
