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author | Greg Still <stillgs@us.ibm.com> | 2018-03-01 10:56:01 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-03-16 13:37:35 -0400 |
commit | 9b5cfe7260efe3cb7b66c8c14c38ea1ba9595e46 (patch) | |
tree | 9b1aafde98cd8137c7e309333eb3b922703a143c /src/import/chips/p9/procedures/xml | |
parent | 68f67bd7aab5d3f3713da2a2078a85187778ec3a (diff) | |
download | talos-hostboot-9b5cfe7260efe3cb7b66c8c14c38ea1ba9595e46.tar.gz talos-hostboot-9b5cfe7260efe3cb7b66c8c14c38ea1ba9595e46.zip |
PM: Enhance p9_pm_pss_init for reset error logging
- Added informational error logs if failures were detected but the reset to the
hardware proceeded anyway
- Done based on a P8 field observation where such logs would have been
beneficial
Change-Id: I334887b178a0974def353fe2b98362fe87afd6ae
CQ: SW419455
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54941
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54943
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_pm_pss_errors.xml | 40 |
1 files changed, 39 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_pss_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_pss_errors.xml index 4e830f492..fe96bed21 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_pss_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_pss_errors.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2015,2017 --> +<!-- Contributors Listed Below - COPYRIGHT 2015,2018 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -55,6 +55,44 @@ </hwpError> <!-- *********************************************************************** --> <hwpError> + <rc>RC_PM_PSS_ADC_WRITE_WHILE_BUSY</rc> + <description>SPI ADC was written while the bridge was busy. Cleared with + coming reset. + </description> + <ffdc>CHIP</ffdc> + <ffdc>POLLCOUNT</ffdc> + <collectRegisterFfdc> + <id>PSS_FFDC_REGISTERS</id> + <target>CHIP</target> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + </collectRegisterFfdc> + <callout> + <target>CODE</target> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PM_PSS_ADC_TIMEOUT</rc> + <description>SPIADC timed waiting to be quiesced. The SPIADC will be reset + anyway so as to attempt to recover the interface. + </description> + <ffdc>CHIP</ffdc> + <ffdc>POLLCOUNT</ffdc> + <ffdc>MAXPOLLS</ffdc> + <ffdc>TIMEOUTUS</ffdc> + <collectRegisterFfdc> + <id>PSS_FFDC_REGISTERS</id> + <target>CHIP</target> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + </collectRegisterFfdc> + <callout> + <target>CHIP</target> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> <rc>RC_PM_PSS_P2S_ERROR</rc> <description>SPIP2S error bit asserted waiting for operation to complete. </description> |