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author | Ben Gass <bgass@us.ibm.com> | 2018-10-09 06:07:58 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-10-15 13:06:48 -0500 |
commit | 5d96a7778c3f538ced35e6e6b362003c08f136f1 (patch) | |
tree | 280b40f106af433cac6429c961264c6cfd774d72 /src/import/chips/p9/procedures/xml | |
parent | 4fe67dfccf8104334e234f610acb78f5cdddda40 (diff) | |
download | talos-hostboot-5d96a7778c3f538ced35e6e6b362003c08f136f1.tar.gz talos-hostboot-5d96a7778c3f538ced35e6e6b362003c08f136f1.zip |
Update Axone engd.
Revert changes in ls_dbg_ctrl
Add nv3_npu_enabled
Add npu2 to npu scom inits
Include Axone in fix for SW430383
Change-Id: I2d96225237d086a51d9e127c2ee9da1a93f74bdd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67199
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67202
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 754ee214a..5c2160bc6 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -50,24 +50,6 @@ </attribute> <!-- ********************************************************************* --> <attribute> - <id>ATTR_CHIP_EC_FEATURE_SEPARATE_CORE_DBG_CNTL</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Support for the CDIAL LS_DBG_CTRL was dropped, so individual - debug dials need to be used. See George Rohrbaugh. - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_AXONE</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - <!-- ********************************************************************* --> - <attribute> <id>ATTR_CHIP_EC_FEATURE_ONE_NPU_TOP</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -7787,6 +7769,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> |