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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2016-07-18 14:50:36 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2017-08-20 09:58:37 -0400
commit4a787205c9faccb8f31371cc0e53b05d52520b08 (patch)
treeb9b04846704baa19d8ea10eda03c9612a2984a91 /src/import/chips/p9/procedures/xml
parent5cc8ce663b10bf9ab1527395ee7fea2417b40eda (diff)
downloadtalos-hostboot-4a787205c9faccb8f31371cc0e53b05d52520b08.tar.gz
talos-hostboot-4a787205c9faccb8f31371cc0e53b05d52520b08.zip
Adding in writing to HRMOR for bootloader
Change-Id: I2e4c43767691a3c5f7e9414b63144eebcfbe5ef2 Original-Change-Id: Ib929eff7d946025537cdf7437b4d288490a7fa9d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27230 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44854 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
index 57a648603..332e3bdfa 100755
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
@@ -50,4 +50,15 @@
<ffdc>PAYLOAD_SIZE</ffdc>
</hwpError>
<!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_MASTER_CORE_NOT_FOUND</rc>
+ <description>
+ Procedure: p9_sbe_load_bootloader
+ The master core is not found from the ex master target
+ </description>
+ <ffdc>CHIP_TARGET</ffdc>
+ <ffdc>EX_TARGET</ffdc>
+ <ffdc>MASTER_CORE</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
</hwpErrors>
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